阅读说明：本技术 天线设备、天线模块及片式贴片天线 (Antenna device, antenna module and chip patch antenna ) 是由 柳正基 金楠基 郑恩英 金洪忍 朴柱亨 李杬澈 韩奎范 于 2019-10-15 设计创作，主要内容包括：本公开提供一种天线设备、天线模块及片式贴片天线。所述天线设备包括：接地面,具有通孔；馈电线,设置在接地面的下方；绝缘层,设置在馈电线与接地面之间；馈电过孔,电连接到馈电线,并且穿过通孔；以及片式贴片天线,电连接到馈电过孔。所述片式贴片天线包括：贴片天线图案,电连接到馈电过孔；上耦合图案,设置在贴片天线图案的上方；边缘耦合图案,围绕贴片天线图案的一部分；上边缘耦合图案,围绕上耦合图案的一部分；以及介电层,设置在位于贴片天线图案与上耦合图案之间的第一区域中以及位于边缘耦合图案与上边缘耦合图案之间的第二区域中,并且介电层的介电常数高于绝缘层的介电常数。(The present disclosure provides an antenna device, an antenna module, and a chip patch antenna. The antenna apparatus includes: a ground plane having a through hole; a feed line provided below the ground plane; an insulating layer disposed between the feeder line and the ground plane; a feed via electrically connected to the feed line and passing through the through-hole; and a chip patch antenna electrically connected to the feed via hole. The chip patch antenna includes: a patch antenna pattern electrically connected to the feed via; an upper coupling pattern disposed above the patch antenna pattern; an edge coupling pattern surrounding a portion of the patch antenna pattern; an upper edge coupling pattern surrounding a portion of the upper coupling pattern; and a dielectric layer disposed in a first region between the patch antenna pattern and the upper coupling pattern and a second region between the edge coupling pattern and the upper edge coupling pattern, and having a dielectric constant higher than that of the insulating layer.)

1. An antenna apparatus, the antenna apparatus comprising:

a ground plane having a through hole;

a feeder line provided below the ground plane;

an insulating layer disposed between the feed line and the ground plane;

a feed via having a first end electrically connected to the feed line and passing through the through-hole; and

a chip patch antenna electrically connected to a second end of the feed via, and including:

a patch antenna pattern electrically connected to the feed via;

an upper coupling pattern disposed above the patch antenna pattern;

an edge coupling pattern surrounding a portion of the patch antenna pattern;

an upper edge coupling pattern surrounding a portion of the upper coupling pattern; and

a dielectric layer disposed in a first region between the patch antenna pattern and the upper coupling pattern and a second region between the edge coupling pattern and the upper edge coupling pattern, and having a dielectric constant higher than that of the insulating layer.

2. The antenna device of claim 1, further comprising an electrical connection structure electrically connected in series to the feed via on the ground plane and having a melting point lower than that of the feed via.

3. The antenna device according to claim 1, wherein a portion of the dielectric layer corresponding to the first region and a portion of the dielectric layer corresponding to the second region are integrated with each other, and

wherein the dielectric layer has a thickness corresponding to a distance between the patch antenna pattern and the upper coupling pattern.

4. The antenna device of claim 1, wherein the patch antenna pattern, the upper coupling pattern, the edge coupling pattern, and the upper edge coupling pattern are spaced apart from each other.

5. The antenna device of claim 4, wherein the patch antenna pattern and the edge coupling pattern are disposed on a same layer, and,

wherein the upper coupling pattern and the upper edge coupling pattern are disposed on another same layer.

6. The antenna device of claim 5, wherein each of the edge-coupling patterns is smaller than the patch antenna pattern, and

wherein each of the upper edge coupling patterns is smaller than the upper coupling pattern.

7. The antenna device of claim 5, wherein a distance between adjacent ones of the edge coupling patterns is less than a distance between each of the edge coupling patterns and the patch antenna pattern, and

wherein a distance between adjacent ones of the upper edge coupling patterns is less than a distance between each of the upper edge coupling patterns and the upper coupling pattern.

8. The antenna device according to claim 1, wherein the edge coupling pattern is arranged to form a polygon,

wherein an outer boundary of an edge coupling pattern of the edge coupling patterns that is closest to a vertex of the polygon comprises a groove.

9. The antenna device as claimed in claim 1, wherein portions of the patch antenna pattern located at both sides of a point of the patch antenna pattern connected by the feeding via are recessed, and

wherein a width of each of the recessed portions of the patch antenna pattern is greater than a distance between the recessed portions of the patch antenna pattern.

10. The antenna device of claim 1, wherein a thickness of the dielectric layer is greater than a thickness of the insulating layer.

11. The antenna device of claim 10, wherein the dielectric layer is disposed to isolate the patch antenna pattern from the upper coupling pattern and is disposed to isolate the edge coupling pattern from the upper edge coupling pattern.

12. The antenna device of claim 11, wherein an area between the edge coupling pattern and the ground plane is formed using a non-conductive material or air.

13. The antenna device as in claim 11, further comprising an encapsulant disposed on an upper side of the upper edge coupling pattern and an upper side of the upper coupling pattern, and

wherein a region between the upper edge coupling pattern and the encapsulant and a region between the upper coupling pattern and the encapsulant do not include a conductive layer.

14. An antenna module, the antenna module comprising:

a ground plane having a through hole;

a feeder line provided below the ground plane;

an insulating layer disposed between the feed line and the ground plane;

feed vias each having a first end electrically connected to a respective one of the feed lines and passing through a respective one of the through-holes; and

a chip patch antenna electrically connected to second ends of respective ones of the feed vias, respectively,

wherein at least one of the chip patch antennas comprises:

a patch antenna pattern electrically connected to respective ones of the feed vias;

an upper coupling pattern disposed above the patch antenna pattern;

an edge coupling pattern surrounding the patch antenna pattern;

an upper edge coupling pattern surrounding the upper coupling pattern; and

a dielectric layer disposed in a first region between the patch antenna pattern and the upper coupling pattern and a second region between the edge coupling pattern and the upper edge coupling pattern, and having a dielectric constant higher than that of the insulating layer.

15. The antenna module of claim 14, wherein the dielectric layer is disposed to isolate the patch antenna pattern from the upper coupling pattern and is disposed to isolate the edge coupling pattern from the upper edge coupling pattern.

16. The antenna module of claim 14, further comprising electrical connection structures electrically connected to the feed vias on the ground plane, respectively, and having a melting point lower than that of the feed vias.

17. The antenna module of claim 14, further comprising:

an integrated circuit disposed below the feeder line;

wiring vias electrically connecting the feeder lines and the integrated circuits to each other, respectively; and

a core member isolated from the feeder line and including a core via electrically connected to the integrated circuit, and surrounding the integrated circuit.

18. A chip patch antenna, the chip patch antenna comprising:

a feed port;

a second dielectric layer disposed on the feed port;

a feed via extending through the second dielectric layer and having a first end electrically connected to the feed port;

a patch antenna pattern disposed on the second dielectric layer and electrically connected to a second end of the feed via;

an upper coupling pattern disposed above the patch antenna pattern;

an edge coupling pattern surrounding at least a portion of the patch antenna pattern;

an upper edge coupling pattern surrounding at least a portion of the upper coupling pattern; and

a first dielectric layer disposed in a first region between the patch antenna pattern and the upper coupling pattern and a second region between the edge coupling pattern and the upper edge coupling pattern, and having a dielectric constant equal to or greater than 5.

19. The chip patch antenna as claimed in claim 18, wherein the dielectric constant of the first dielectric layer is greater than the dielectric constant of the second dielectric layer.

20. The chip patch antenna according to claim 18, wherein the patch antenna pattern, the upper coupling pattern, the edge coupling pattern, and the upper edge coupling pattern are spaced apart from each other.

21. The chip patch antenna according to claim 20, wherein each of the edge coupling patterns is smaller than the patch antenna pattern,

wherein each of the upper edge coupling patterns is smaller than the upper coupling pattern,

wherein a distance between adjacent ones of the edge coupling patterns is smaller than a distance between each of the edge coupling patterns and the patch antenna pattern, and

wherein a distance between adjacent ones of the upper edge coupling patterns is less than a distance between each of the upper edge coupling patterns and the upper coupling pattern.

22. The chip patch antenna according to claim 18, wherein portions of the patch antenna pattern located at both sides of a point of the patch antenna pattern connected by the feeding via hole are recessed, and

wherein a width of each of the recessed portions of the patch antenna pattern is greater than a distance between the recessed portions of the patch antenna pattern.

23. The chip patch antenna according to claim 18, wherein the edge coupling pattern is arranged to form a polygon, and

wherein an outer boundary of an edge coupling pattern of the edge coupling patterns that is closest to a vertex of the polygon comprises a groove.

24. The chip patch antenna according to claim 18, wherein the edge coupling pattern is disposed in a polygonal path around the patch antenna pattern, and

wherein a groove is formed in a corner region of the edge coupling pattern that is closest to a vertex of the polygonal path among the edge coupling patterns.

25. The chip patch antenna according to claim 18, wherein the upper edge coupling pattern is disposed around the upper coupling pattern in a circular path.

26. The chip patch antenna according to claim 25, wherein the upper coupling pattern has a circular shape.

27. The chip patch antenna according to claim 18, wherein the patch antenna pattern and the edge coupling pattern are disposed at a first vertical position, and wherein the upper coupling pattern and the upper edge coupling pattern are disposed at a second vertical position, the second vertical position being above the first vertical position.

Technical Field

The following description relates to an antenna device, an antenna module, and a chip patch antenna provided in the antenna device and the antenna module.

Background

Data traffic for mobile communications is rapidly increasing every year. Technological developments are underway to support this leap of data volume for real-time transmission in wireless networks. For example, applications of internet of things (IoT) -based data, live VR/AR combined with Augmented Reality (AR), Virtual Reality (VR), and Social Networking Services (SNS), autonomous navigation, synchronized windows (real-time images from the perspective of a user are transmitted using a subminiature camera), and the like, require communications (e.g., fifth generation (5G) communications, millimeter wave (mmWave) communications, and the like) that support the exchange of large amounts of data.

Therefore, millimeter wave (mmWave) communication including 5G communication has been studied, and research has been conducted to commercialize/standardize an antenna device to smoothly realize such millimeter wave (mmWave) communication.

For example, Radio Frequency (RF) signals in high frequency bands of 24GHz, 28GHz, 36GHz, 39GHz, 60GHz, and the like are easily absorbed during transmission and cause loss. Therefore, the quality of communication may be drastically degraded. Therefore, an antenna for communication in a high frequency band requires a different method from the related art antenna technology, and may require special technical development, such as technical development for a separate power amplifier for ensuring antenna gain, integration of an antenna and a Radio Frequency Integrated Circuit (RFIC), Effective Isotropic Radiated Power (EIRP), and the like.

Disclosure of Invention

This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

In one general aspect, an antenna apparatus includes: a ground plane having a through hole; a feeder line provided below the ground plane; an insulating layer disposed between the feed line and the ground plane; a feed via having a first end electrically connected to the feed line and passing through the through-hole; and a patch antenna electrically connected to the second end of the feed via. The chip patch antenna includes: a patch antenna pattern electrically connected to the feed via; an upper coupling pattern disposed above the patch antenna pattern; an edge coupling pattern surrounding a portion of the patch antenna pattern; an upper edge coupling pattern surrounding a portion of the upper coupling pattern; and a dielectric layer disposed in a first region between the patch antenna pattern and the upper coupling pattern and a second region between the edge coupling pattern and the upper edge coupling pattern, and having a dielectric constant higher than that of the insulating layer.

The antenna device may further include an electrical connection structure electrically connected to the feed via in series on the ground plane, and having a melting point lower than that of the feed via.

A portion of the dielectric layer corresponding to the first region and a portion of the dielectric layer corresponding to the second region may be integrated with each other. The dielectric layer may have a thickness corresponding to a distance between the patch antenna pattern and the upper coupling pattern.

The patch antenna pattern, the upper coupling pattern, the edge coupling pattern, and the upper edge coupling pattern may be spaced apart from each other.

The patch antenna pattern and the edge coupling pattern may be disposed on the same layer. The upper coupling pattern and the upper edge coupling pattern may be disposed on another same layer.

Each of the edge-coupling patterns may be smaller than the patch antenna pattern. Each of the upper edge coupling patterns may be smaller than the upper coupling pattern.

A distance between adjacent ones of the edge coupling patterns may be less than a distance between each of the edge coupling patterns and the patch antenna pattern. A distance between adjacent ones of the upper edge coupling patterns may be less than a distance between each of the upper edge coupling patterns and the upper coupling pattern.

The edge coupling pattern may be arranged to form a polygon. An outer boundary of an edge coupling pattern of the edge coupling patterns closest to vertices of the polygon may include a groove.

Portions of the patch antenna pattern on both sides of a point of the patch antenna pattern connected by the feeding via may be recessed. A width of each of the recessed portions of the patch antenna pattern may be greater than a distance between the recessed portions of the patch antenna pattern.

The dielectric layer may have a thickness greater than a thickness of the insulating layer.

The dielectric layer may be disposed to isolate the patch antenna pattern from the upper coupling pattern, and may be disposed to isolate the edge coupling pattern from the upper edge coupling pattern.

The area between the edge coupling pattern and the ground plane may be formed using a non-conductive material or air.

The antenna device may further include an encapsulant disposed on an upper side of the upper edge coupling pattern and an upper side of the upper coupling pattern. The region between the upper edge coupling pattern and the encapsulant and the region between the upper coupling pattern and the encapsulant may not include a conductive layer.

In another general aspect, an antenna module includes: a ground plane having a through hole; a feeder line provided below the ground plane; an insulating layer disposed between the feed line and the ground plane; feed vias each having a first end electrically connected to a respective one of the feed lines and passing through a respective one of the through-holes; and a chip patch antenna electrically connected to second ends of respective ones of the feed vias, respectively. At least one of the chip patch antennas includes: a patch antenna pattern electrically connected to respective ones of the feed vias; an upper coupling pattern disposed above the patch antenna pattern; an edge coupling pattern surrounding the patch antenna pattern; an upper edge coupling pattern surrounding the upper coupling pattern; and a dielectric layer disposed in a first region between the patch antenna pattern and the upper coupling pattern and a second region between the edge coupling pattern and the upper edge coupling pattern, and having a dielectric constant higher than that of the insulating layer.

The dielectric layer may be disposed to isolate the patch antenna pattern from the upper coupling pattern, and may be disposed to isolate the edge coupling pattern from the upper edge coupling pattern.

The antenna module may further include electrical connection structures electrically connected to the feeding vias on the ground planes, respectively, and having a melting point lower than that of the feeding vias.

The antenna module may further include: an Integrated Circuit (IC) disposed below the feeder line; wiring vias electrically connecting the feeder lines and the ICs to each other, respectively; and a core member isolated from the feeder line and including a core via electrically connected to the IC, and surrounding the IC.

In another general aspect, a chip patch antenna includes: a feed port; a second dielectric layer disposed on the feed port; a feed via extending through the second dielectric layer and having a first end electrically connected to the feed port; a patch antenna pattern disposed on the second dielectric layer and electrically connected to a second end of the feed via; an upper coupling pattern disposed above the patch antenna pattern; an edge coupling pattern surrounding at least a portion of the patch antenna pattern; an upper edge coupling pattern surrounding at least a portion of the upper coupling pattern; and a first dielectric layer disposed in a first region between the patch antenna pattern and the upper coupling pattern and a second region between the edge coupling pattern and the upper edge coupling pattern, and having a dielectric constant equal to or greater than 5.

The dielectric constant of the first dielectric layer may be greater than the dielectric constant of the second dielectric layer.

The patch antenna pattern, the upper coupling pattern, the edge coupling pattern, and the upper edge coupling pattern may be spaced apart from each other.

Each of the edge-coupling patterns may be smaller than the patch antenna pattern. Each of the upper edge coupling patterns may be smaller than the upper coupling pattern. A distance between adjacent ones of the edge coupling patterns may be less than a distance between each of the edge coupling patterns and the patch antenna pattern. A distance between adjacent ones of the upper edge coupling patterns may be less than a distance between each of the upper edge coupling patterns and the upper coupling pattern. Portions of the patch antenna pattern on both sides of a point of the patch antenna pattern connected by the feeding via may be recessed. A width of each of the recessed portions of the patch antenna pattern may be greater than a distance between the recessed portions of the patch antenna pattern.

The edge coupling pattern may be arranged to form a polygon. An outer boundary of an edge coupling pattern of the edge coupling patterns closest to vertices of the polygon may include a groove.

The edge coupling pattern may be disposed in a polygonal path around the patch antenna pattern. Grooves may be formed in corner regions of the edge-coupling pattern that are closest to vertices of the polygonal path.

The upper edge coupling pattern may be arranged in a circular path around the upper coupling pattern.

The upper coupling pattern may have a circular shape.

The patch antenna pattern and the edge coupling pattern may be disposed at a first vertical position, and the upper coupling pattern and the upper edge coupling pattern may be disposed at a second vertical position, which is above the first vertical position.

Other features and aspects will be apparent from the following detailed description, the accompanying drawings, and the claims.

Drawings

Fig. 1 is a perspective view of an antenna apparatus according to an example.

Fig. 2A is a side view illustrating the antenna apparatus of fig. 1 according to an example.

Fig. 2B is a side view of an antenna module including an antenna apparatus according to an example.

Fig. 2C is a side view of a patch antenna according to an example.

Fig. 3A is a plan view illustrating a first layer of a chip patch antenna of an antenna apparatus according to an example.

Fig. 3B is a plan view illustrating a second layer of the chip patch antenna of fig. 3A according to an example.

Fig. 3C is a plan view of a ground plane of an antenna device according to an example.

Fig. 3D is a plan view showing a form of an antenna device according to an example.

Fig. 4A is a plan view of an antenna module according to an example.

Fig. 4B is a plan view illustrating a ground plane under the chip patch antenna of fig. 4A.

Fig. 4C is a plan view showing a feed line under the ground plane of fig. 4B.

Fig. 4D is a plan view illustrating the second ground plane and the routing via under the feeder line of fig. 4C.

Fig. 4E is a plan view illustrating an IC arrangement area and an end fire antenna under the second ground plane of fig. 4D.

Fig. 5 is a diagram showing an equivalent circuit of an antenna device and an antenna module according to an example.

Fig. 6A and 6B are side views illustrating a lower structure of a connection member included in an antenna apparatus and an antenna module according to an example.

Fig. 7 is a side view showing the structures of an antenna device and an antenna module according to an example.

Fig. 8A to 8C are plan views illustrating arrangements of an antenna device and an antenna module in an electronic apparatus according to an example.

Like reference numerals refer to like elements throughout the drawings and detailed description. The figures may not be drawn to scale and the relative sizes, proportions and depictions of the elements in the figures may be exaggerated for clarity, illustration and convenience.

Detailed Description

The following detailed description is provided to assist the reader in obtaining a thorough understanding of the methods, devices, and/or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatus, and/or systems described herein will be apparent to those skilled in the art upon review of the disclosure of this application. For example, the order of operations described herein is merely an example and is not limited to the order set forth herein, but rather, variations may be made in addition to operations which must occur in a particular order which will be apparent upon understanding the disclosure of the present application. Moreover, descriptions of features known in the art may be omitted for greater clarity and conciseness.

The features described herein may be embodied in different forms and should not be construed as limited to the examples described herein. Rather, the examples described herein have been provided merely to illustrate some of the many possible ways to implement the methods, devices, and/or systems described herein that will be apparent after understanding the disclosure of the present application.

Here, it is noted that the use of the term "may" with respect to an example or embodiment (e.g., with respect to what an example or embodiment may include or implement) means that there is at least one example or embodiment that includes or implements such a feature, and all examples and embodiments are not limited thereto.

Throughout the specification, when an element (such as a layer, region, or substrate) is described as being "on," connected to, "or" coupled to "another element, the element may be directly" on, "connected to," or "coupled to" the other element, or one or more other elements may be present therebetween. In contrast, when an element is referred to as being "directly on," "directly connected to" or "directly coupled to" another element, there may be no intervening elements present.

As used herein, the term "and/or" includes any one of the associated listed items and any combination of any two or more of the items.

Although terms such as "first", "second", and "third" may be used herein to describe various elements, components, regions, layers or sections, these elements, components, regions, layers or sections are not limited by these terms. Rather, these terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed in connection with the examples described herein could be termed a second element, component, region, layer or section without departing from the teachings of the examples.

For ease of description, spatial relational terms, such as "above," "upper," "lower," and "lower," may be used herein to describe one element's relationship to another element as illustrated in the figures. Such spatial relationship terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "above" or "upper" relative to another element would then be "below" or "lower" relative to the other element. Thus, the term "above" includes both an orientation of "above" and "below" depending on the spatial orientation of the device. The device may also be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative terms used herein will be interpreted accordingly.

The terminology used herein is for the purpose of describing various examples only and is not intended to be limiting of the disclosure. The singular is intended to include the plural unless the context clearly dictates otherwise. The terms "comprises," "comprising," and "having" specify the presence of stated features, quantities, operations, elements, components, and/or combinations thereof, but do not preclude the presence or addition of one or more other features, quantities, operations, components, elements, and/or combinations thereof.

The shapes of the illustrations as a result of manufacturing techniques and/or tolerances may vary. Accordingly, the examples described herein are not limited to the particular shapes shown in the drawings, but include changes in shapes that occur during manufacturing.

The features of the examples described herein may be combined in various ways that will be apparent after understanding the disclosure of the present application. Further, while the examples described herein have a variety of configurations, other configurations are possible that will be apparent after understanding the disclosure of this application.

Fig. 1 is a perspective view of an antenna device 10 according to an example. Fig. 2A is a side view illustrating the antenna device 10 according to an example.

Referring to fig. 1 and 2A, the antenna device 10 includes a ground plane 125, a feeder line 221, an insulating layer 250, a feed via 120, and a chip patch antenna 100.

The ground plane 125 has a through hole TH. The ground plane 125 may provide boundary conditions to the chip patch antenna 100 and thus may reflect Radio Frequency (RF) signals radiated from the chip patch antenna 100. Accordingly, since the radiation pattern of the chip patch antenna 100 may be relatively more concentrated in the Z direction, the gain and/or directivity of the chip patch antenna 100 may be improved. The shield via 126 may be disposed around the through hole TH.

Furthermore, since the ground plane 125 may substantially block a gap between the chip patch antenna 100 and the power feed line 221, electromagnetic isolation between the chip patch antenna 100 and the power feed line 221 may be improved. Accordingly, noise introduced during an RF signal transmission process between the chip patch antenna 100 and the Integrated Circuit (IC)300 may be reduced.

The feed line 221 is disposed below the ground plane 125 (e.g., in the Z direction). A Radio Frequency (RF) signal may flow in a horizontal direction (e.g., X-direction and/or Y-direction) through the feeding line 221. Accordingly, the plurality of chip patch antennas 100 may be effectively disposed above the ground plane 125. One end of the feeder line 221 may be electrically connected to the routing via 231.

The feed via 120 is disposed such that one end of the feed via 120 is electrically connected to the feed line 221 and penetrates the through hole TH. RF signals may flow in the Z direction through the feed via 120. For example, the feed via 120 may be formed in an integrated manner as in the case of a through hole, or may be implemented as a plurality of vias connected in series with each other.

The insulating layer 250 is provided between the feed line 221 and the ground plane 125, and isolates the feed line 221 from the ground plane 125. When the thickness T2 of the insulating layer 250 is reduced, the entire thickness of the connection member 200 and the energy loss of the RF signal flowing between the chip patch antenna 100 and the IC300 may be reduced. For example, the insulating layer 250 may be formed using an insulating material having a relatively low dielectric loss (Df), thereby reducing energy loss of the RF signal passing through the feeding line 221.

As such, the design of the insulating layer 250 may be more focused on energy efficiency and size in terms of electrical connection between the chip patch antenna 100 and the IC 300.

When the antenna device 10 and the antenna module including the antenna device 10 include the patch antenna 100 of the sheet type designed to be relatively more focused on antenna performance (e.g., bandwidth, gain, directivity, size, etc.), the overall antenna performance can be improved without substantially deteriorating energy efficiency and size in terms of electrical connection.

Referring to fig. 1 and 2A, the chip patch antenna 100 includes a patch antenna pattern 110, an upper coupling pattern 115, an edge coupling pattern 131, an upper edge coupling pattern 132, and a dielectric layer 150.

The patch antenna pattern 110 is electrically connected to the feed via 120. The patch antenna pattern 110 may receive an RF signal from the feed via 120 and may transmit the received RF signal in the Z direction, and may transmit the RF signal received in the Z direction to the feed via 120. The patch antenna pattern 110 may have a natural resonant frequency (e.g., 28GHz or 39GHz) according to inherent elements of the insulating layer such as shape, size, height, and dielectric constant.

For example, the patch antenna pattern 110 is connected to the plurality of feed vias 120, and thus, a horizontal pole (H pole) RF signal and a vertical pole (V pole) RF signal as polarized waves may be transmitted and received. The H-pole RF signal may flow through a portion of the plurality of feed vias 120, and the V-pole RF signal may flow through the remaining portion of the plurality of feed vias 120.

The upper coupling pattern 115 is disposed above the patch antenna pattern 110 (e.g., in the + Z direction). According to the electromagnetic coupling of the upper coupling pattern 115 and the patch antenna pattern 110, the chip patch antenna 100 may have an additional resonance frequency adjacent to the natural resonance frequency, and thus may have a relatively wider bandwidth than that of a configuration in which the upper coupling pattern 115 is not disposed.

An optimal feeding point (e.g., based on impedance matching) of the feeding via 120 in the patch antenna pattern 110 may be adjacent to an edge of the patch antenna pattern 110 according to the electromagnetic coupling of the upper coupling pattern 115. For example, when the plurality of feed vias 120 are disposed adjacent to different sides of the patch antenna pattern 110, a surface current corresponding to an H-pole RF signal and a surface current corresponding to a V-pole RF signal flow perpendicular to each other to easily flow in the patch antenna pattern 110. Accordingly, the upper coupling pattern 115 may provide an environment advantageous to achieve polarization of the chip patch antenna 100.

The edge coupling pattern 131 is disposed to surround at least a portion of the patch antenna pattern 110, and may be electromagnetically coupled to the patch antenna pattern 110. Accordingly, the bandwidth of the chip patch antenna 100 may be further widened with respect to a configuration in which the edge coupling pattern 131 is not provided.

The upper edge coupling pattern 132 is disposed to surround at least a portion of the upper coupling pattern 115, and thus, the upper edge coupling pattern 132 may be electromagnetically coupled to the upper coupling pattern 115. The upper edge coupling pattern 132 may also be electromagnetically coupled to the edge coupling pattern 131.

Accordingly, since the patch antenna pattern 110, the upper coupling pattern 115, the edge coupling pattern 131, and the upper edge coupling pattern 132 may be coupled to each other in a balanced manner, the bandwidth of the chip patch antenna 100 may be greatly increased compared to the size of the chip patch antenna 100.

Further, when the optimal feeding point of the feeding via 120 in the patch antenna pattern 110 is close to the edge of the patch antenna pattern 110 in the first direction (e.g., 0 degree direction) of the patch antenna pattern 110, the surface current flowing through the patch antenna pattern 110 may flow in the third direction (e.g., 180 degree direction) of the patch antenna pattern 110 according to RF signal transmission/reception of the patch antenna pattern 110. In this case, the surface current may be dispersed in the second direction (e.g., 90-degree direction) and in the fourth direction (e.g., 270-degree direction). In this case, when the surface current is dispersed in the second and fourth directions, the edge coupling pattern 131 and the upper edge coupling pattern 132 may guide the laterally leaked RF signal to the upper surface in the upper direction. Accordingly, since the radiation pattern of the patch antenna pattern 110 may be relatively more concentrated in the upper surface direction, the antenna performance of the patch antenna pattern 110 may be improved.

For example, the edge coupling patterns 131 may be repeatedly arranged in the same shape, and the upper edge coupling patterns 132 may be repeatedly arranged in the same shape. Accordingly, the edge coupling pattern 131 and the upper edge coupling pattern 132 may have electromagnetic band gap characteristics, and may have a negative refractive index for an RF signal in a specific frequency band. Accordingly, the edge coupling pattern 131 and the upper edge coupling pattern 132 may further guide the path of the RF signal of the patch antenna pattern 110 in the Z direction.

On the other hand, the edge coupling pattern 131 and the upper edge coupling pattern 132 are spaced apart from the ground plane 125, respectively, and thus, may have more adaptive characteristics with respect to an RF signal having a frequency adjacent to the frequency band of the patch antenna pattern 110, thereby further widening a bandwidth.

The dielectric layer 150 includes a first region 151 between the patch antenna pattern 110 and the upper coupling pattern 115 and a second region 152 between the edge coupling pattern 131 and the upper edge coupling pattern 132, and the dielectric constant (Dk) of the dielectric layer 150 may be higher than that of the insulating layer 250.

For example, the insulating layer 250 may include a material having a dielectric constant (Dk) less than 5, such as a prepreg, FR-4, and/or a Copper Clad Laminate (CCL), and the dielectric layer 150 may include a ceramic material, such as a low temperature co-fired ceramic (LTCC), or a material having a dielectric constant (Dk) equal to or greater than 5, such as glass.

The effective wavelength of the RF signal in the chip patch antenna 100 may be reduced according to the relatively high dielectric constant Dk of the dielectric layer 150. Since the overall size of the chip patch antenna 100 has a relatively high correlation with the length of the effective wavelength of the RF signal, the chip patch antenna 100 includes the dielectric layer 150 having a high dielectric constant (Dk) and thus may have a reduced size without substantially degrading antenna performance.

The chip of the chip patch antenna 100 indicates that the overall size of the chip patch antenna 100 is reduced according to the high dielectric constant Dk of the dielectric layer 150.

The overall size of the chip patch antenna 100 may correspond to the number of arrays of chip patch antennas 100 per unit size of the ground plane 125. As the number of chip patch antennas 100 per unit size of the array increases, the gain and/or directivity of the antenna device 10 and the gain and/or directivity of the antenna module including the antenna device 10 may improve.

Accordingly, as the overall size of the chip patch antenna 100 is reduced, the antenna apparatus 10 and the antenna module including the antenna apparatus 10 may improve gain and/or directivity.

As a result, based on the coupling structure of the patch antenna pattern 110, the upper coupling pattern 115, the edge coupling pattern 131, and the upper edge coupling pattern 132, the chip patch antenna 100 may have an improved bandwidth compared to the size, and the chip patch antenna 100 may ensure overall advantages related to gain, directivity, and/or size in a balanced manner according to the high dielectric constant (Dk) of the dielectric layer 150 combined with the coupling structure.

For example, the patch antenna 100 may be designed to employ a single dielectric layer 150 and two conductive layers to have a significantly reduced thickness and a bandwidth of 3GHz or greater in the 28GHz and/or 39GHz frequency bands (e.g., a frequency range with a return S parameter of-10 dB or less).

In the dielectric layer 150, a portion corresponding to the first region 151 and a portion corresponding to the second region 152 may be integrated with each other. For example, the dielectric layer 150 may include a third region 153 located between the first region 151 and the second region 152. For example, the presence or absence of integration can be confirmed by Scanning Electron Microscopy (SEM).

In addition, the thickness T1 of the dielectric layer 150 may be the same as the distance between the patch antenna pattern 110 and the upper coupling pattern 115. Accordingly, in the case of the coupling structure of the patch antenna pattern 110, the upper coupling pattern 115, the edge coupling pattern 131, and the upper edge coupling pattern 132, the high dielectric constant Dk of the dielectric layer 150 may be more effectively utilized, and thus, may contribute to increasing the bandwidth of the antenna device 10 and the bandwidth of the antenna module compared to the size.

The patch antenna pattern 110, the upper coupling pattern 115, the edge coupling pattern 131, and the upper edge coupling pattern 132 may be spaced apart from each other.

Accordingly, since the equivalent capacitance and the equivalent inductance of the chip patch antenna 100 may be distributed in a balanced manner, a plurality of resonance frequencies of the chip patch antenna 100 may be efficiently designed, and the bandwidth of the chip patch antenna 100 may be more easily increased.

The dielectric layer 150 may have a thickness greater than that of the insulating layer 250, and the dielectric layer 150 may be disposed to provide isolation between the patch antenna pattern 110 and the upper coupling pattern 115 and isolation between the edge coupling pattern 131 and the upper edge coupling pattern 132.

Accordingly, the high dielectric constant Dk of the dielectric layer 150 may be more easily achieved, and the implementation cost and the defective rate of the chip patch antenna 100 may be reduced. For example, glass or ceramic series materials with high dielectric constants (Dk), such as LTCC, may be relatively difficult to implement in a stacked structure compared to the case of the insulating layers of a Printed Circuit Board (PCB), or may be relatively difficult to implement to provide large intensity values compared to the layer thicknesses. However, in the case of the chip patch antenna 100, a dielectric material having a high dielectric constant (Dk) may be more easily included in the chip patch antenna 100 by reducing the number of layers in the laminated structure using the dielectric layer 150 having a relatively large thickness.

Fig. 2B is a side view of the antenna module 1 including the antenna device according to an example.

Referring to fig. 2B, the antenna module 1 may include an antenna apparatus including chip patch antennas 100a and 100B.

For example, the chip patch antennas 100a and 100b may be implemented together, or may be implemented separately with respect to the connection member 200.

In this case, the plurality of chip patch antennas 100a and 100b are disposed above the ground plane 125, electrically connected to the feeding via 120, and may be electrically coupled to the connection member 200 by an electrical connection structure 141 having a melting point lower than that of the feeding via 120.

Therefore, the high dielectric constant Dk of the dielectric layer 150 of the chip patch antennas 100a and 100b can be more easily achieved.

For example, the electrical connection structures 141 may be commonly disposed on the feed via connection points 142 previously disposed in the connection member 200, and may be implemented using solder including Sn-Cu-Ag alloy paste.

The chip patch antennas 100a and 100b may further include an encapsulant 155, the encapsulant 155 being disposed on an upper side of the upper edge coupling pattern and an upper side of the upper coupling pattern.

In this case, the regions between the plurality of upper edge coupling patterns and the encapsulant 155 and the regions between the upper coupling patterns and the encapsulant 155 may not include the conductive layer. Accordingly, since the total number of conductive layers of the chip patch antennas 100a and 100b may be reduced, the chip patch antennas 100a and 100b may have a relatively reduced thickness and may also exhibit improved antenna performance.

Referring to fig. 2B, the connection member 200 includes an insulation layer 250, a power feed line 221, a routing via 231, a routing ground plane 202, a second ground plane 203, and a base signal line 241.

The wiring ground plane 202 can be disposed to surround the power feed line 221 in a horizontal direction (e.g., X-direction and/or Y-direction) to improve electromagnetic isolation of the power feed line 221 and reduce noise of the RF signal.

The second ground plane 203 may improve electromagnetic isolation between the feed line 221 and the IC300 and reduce noise of the RF signal.

The base signal line 241 may provide a transmission path of an Intermediate Frequency (IF) signal or a baseband signal. The IF signal or the baseband signal is a basic signal of the RF signal and is an analog signal transmitted between the IC300 and the communication modem.

The core member 410 may be disposed under the connection member 200, and may include a core via 411, a core wiring layer 412, and a core insulating layer 413, and may be implemented by a fan-out type board level package (FOPLP) method, but the core member 410 is not limited to this example. The core via 411 may be electrically connected to the base signal line 241 and may provide a transmission path for the IF signal or the baseband signal.

The core member 410 may be mounted on the connection member 200 by a first core electrical connection structure 414 and may be mounted on the stack plate by a second core electrical connection structure 415.

The core member 410 may have a structure surrounding a cavity, and the cavity may serve as a space in which the IC300 and the passive component 350 are disposed.

Fig. 2C is a side view of the patch antennas 100a and 100b according to an example.

Referring to fig. 2C, the chip patch antennas 100a and 100b may be manufactured separately from a connection member (e.g., the connection member 200). Accordingly, the dielectric layer 150 having a high dielectric constant (Dk) (of 5 or more) may be more effectively disposed on the chip patch antennas 100a and 100b without considering compatibility with the insulating layer of the connection member 200.

In addition, the chip patch antennas 100a and 100b may further include a second dielectric layer 154 disposed under the dielectric layer 150.

For example, the second dielectric layer 154 may be formed using the same material as that of the dielectric layer 150 to have a relatively high dielectric constant Dk compared to that of the insulating layer 250. As a result, the effective wavelength of the RF signal in the chip patch antennas 100a and 100b can be reduced, and thus, the miniaturization of the chip patch antennas 100a and 100b can be more facilitated.

For example, the second dielectric layer 154 may be configured to have a dielectric constant lower than that of the dielectric layer 150. Accordingly, the interface between the second dielectric layer 154 and the dielectric layer 150 and the boundary condition between the combination of the edge coupling pattern 131 and the upper edge coupling pattern 132 further concentrate the RF signal in the vertical direction (e.g., in the Z direction).

The chip patch antennas 100a and 100b may include a feeding port 143, and the feeding port 143 is disposed under the second dielectric layer 154 to be electrically connected to the connection member 200.

The second dielectric layer 154 may provide a surface for stable placement of the feed port 143. The feed port 143 may have a shape similar to that of the electrode pad to have a horizontal area larger than that of the feed via 120, but the shape of the feed port 143 is not limited to this example.

For example, in a state where the chip patch antennas 100a and 100b are disposed on the connection member 200, solder such as Sn-Cu-Ag alloy paste is provided to the feeding port 143, and the feeding port 143 may be bonded to the connection member 200 by reflow.

Fig. 3A is a plan view illustrating a first layer of the chip patch antenna 100-1 of the antenna apparatus according to an example.

Referring to fig. 3A, the upper coupling patterns 115 and the upper edge coupling patterns 132 may be disposed in a single first layer.

For example, a dimension (e.g., length or width) L32 of each of the upper edge coupling patterns 132 may be less than a dimension (e.g., length or width) L15 of the upper coupling patterns 115, and a distance G32 between adjacent upper edge coupling patterns 132 may be less than a distance D32 between the upper coupling patterns 115 and each of the upper edge coupling patterns 132. Accordingly, the upper edge coupling pattern 132 may more easily have an electromagnetic band gap characteristic having a negative refractive index with respect to a frequency of the RF signal, and the bandwidth of the chip patch antenna 100-1 may be relatively widened.

Fig. 3B is a plan view illustrating a second layer of the chip patch antenna 100-1 according to an example.

Referring to fig. 3B, the patch antenna pattern 110 and the edge coupling pattern 131 may be disposed on a single second layer.

For example, a size (e.g., length or width) L31 of each of the plurality of edge coupling patterns 131 may be smaller than a size (e.g., length or width) L10 of the patch antenna pattern 110, and a distance G31 between adjacent edge coupling patterns 131 may be smaller than a distance D31 between the patch antenna pattern 110 and each of the edge coupling patterns 131. Accordingly, the edge coupling pattern 131 may more easily have an electromagnetic band gap characteristic having a negative refractive index with respect to a frequency of the RF signal, and the bandwidth of the chip patch antenna 100-1 may be widened.

When the plurality of edge coupling patterns 131 are arranged to have a polygonal shape, the outer boundary of the edge coupling pattern 131 closest to the vertex of the polygon may have a groove GR 2. That is, the groove GR2 may be formed in a corner region of the edge coupling pattern 131 closest to a vertex of the polygon. The edge coupling pattern 131 including the groove GR2 may have a structure more suitable for the high dielectric constant Dk of the dielectric layer.

Both sides R2 and R3 of the patch antenna pattern 110 connecting the point P1 at the feeding via 120 are recessed, and a width WR of each of the recessed sides R2 and R3 in the patch antenna pattern 110 may be greater than a distance WP between the recessed side R2 and the recessed side R3 in the patch antenna pattern 110. Accordingly, the patch antenna pattern 110 has a structure more suitable for the high dielectric constant Dk of the dielectric layer than the conventional patch antenna pattern, and thus may have a wider bandwidth.

Fig. 3C is a plan view of the ground plane 125 of the antenna device according to an example.

Referring to fig. 3C, the ground plane 125 may have a through hole TH1 through which the feed via 120a passes and a through hole TH2 through which the feed via 120b passes. One of the feed vias 120a and 120b may provide a transmission path for H-pole RF signals, and the other of the feed vias 120a and 120b may provide a transmission path for V-pole RF signals.

In this case, the ground plane 125 does not include an electrical connection path for the edge coupling pattern 131. For example, the region between the edge coupling pattern 131 and the ground plane 125 may be formed using a non-conductive material or air. Therefore, the bandwidth of the antenna device and the antenna module can be further improved.

Fig. 3D is a plan view showing the form of the antenna device 10-1 according to the example.

Referring to fig. 3D, the upper coupling pattern 115e may be circular, and the upper edge coupling pattern 130e may be arranged in a circular pattern surrounding the upper coupling pattern 115 e. The first shielded via 126e included in the ground plane 125e may be arranged differently from the arrangement of the upper edge coupling pattern 130 e. For example, the shapes of the respective components of the antenna device and the antenna module are not limited to the quadrangular shape.

Fig. 4A is a plan view of an antenna module 1-1 according to an example.

Referring to fig. 4A, the sheet type patch antennas 100a and 100b may be disposed in a first direction (e.g., X direction). For example, the chip patch antennas 100a and 100b may be arranged in a 1 × n structure. In this case, n is a natural number of 2 or more. Thus, the antenna module 1-1 can be effectively disposed at the edge of the electronic device.

The chip patch antennas 100a and 100b may be arranged in an m × n structure according to design. In this case, m and n are natural numbers of 2 or more. Thus, the antenna module 1-1 may be disposed adjacent to a corner of the electronic device.

The upper edge coupling patterns 132 may be arranged to surround each of the upper coupling patterns 115.

Fig. 4B is a plan view illustrating the ground plane 125a under the chip patch antennas 100a and 100B of fig. 4A. Fig. 4C is a plan view showing the feed line 221a under the ground plane of fig. 4B. Fig. 4D is a plan view illustrating the routing via 231a and the second ground plane 203a under the feeder line 221a of fig. 4C. Fig. 4E is a plan view illustrating an IC arrangement area and an end fire antenna below the second ground plane 203a of fig. 4D.

Referring to fig. 4B, the ground plane 125a may have a through hole through which the feed via 120a passes, and may electromagnetically shield the patch antenna pattern 110a from the feed line. The second shielded via 185a may extend downward (e.g., in the Z-direction).

Referring to fig. 4C, the wiring ground plane 202a may surround at least a portion of the end-fire antenna feed line 220a and the feed line 221 a. The end-fire antenna feed line 220a may be electrically connected to the second routing via 232a, and the feed line 221a may be electrically connected to the first routing via 231 a. The wiring ground plane 202a may electromagnetically shield the end-fire antenna feed line 220a from the feed line 221 a. One end of the endfire antenna feed line 220a may be connected to the second feed via 211 a.

Referring to fig. 4D, the second ground plane 203a may have a through hole through which the first routing via 231a passes and a through hole through which the second routing via 232a passes, and may have a coupling ground pattern 235 a. The second ground plane 203a may electromagnetically shield the feed line 221a from the IC310a (fig. 4E).

Referring to fig. 4E, the IC ground plane 204a may have a through hole through which the first routing via 231a passes and a through hole through which the second routing via 232a passes. The IC310a may be disposed below the IC ground plane 204a and may be electrically connected to the first and second routing vias 231a and 232 a. The end-ray antenna pattern 210a and the director pattern 215a may be disposed at substantially the same height as the height of the IC ground plane 204 a.

IC ground plane 204a may provide a ground for IC310a and/or passive components for the circuitry and/or passive components of IC310 a. Depending on the design, IC ground plane 204a may provide a transmission path for power and signals for IC310a and/or passive components. Thus, IC ground plane 204a may be electrically connected to IC310a and/or passive components.

The routing ground plane 202a, the second ground plane 203a, and the IC ground plane 204a may have a recessed shape to provide a cavity. Thus, the end-ray antenna pattern 210a may be disposed relatively close to the IC ground plane 204 a.

On the other hand, the longitudinal relationship and the shape of the wired ground plane 202a, the second ground plane 203a, and the IC ground plane 204a may be changed according to design.

Fig. 5 is a diagram showing an equivalent circuit of an antenna device and an antenna module according to an example.

Referring to fig. 5, the patch antenna pattern 110b of the antenna apparatus may transmit an RF signal to a source SRC2 (such as an IC) or may receive an RF signal, and may have a resistance value R2 and inductances L3 and L4.

The upper edge coupling pattern 130b may have capacitances C5 and C12 with respect to the patch antenna pattern 110b, capacitances C6 and C10 between the upper edge coupling pattern 130b, inductances L5 and L6 of the upper edge coupling pattern 130b, and capacitances C7 and C11 between the upper edge coupling pattern 130b and the ground plane, respectively.

The capacitance and inductance of the above-described edge coupling pattern may be determined according to a principle similar to that of the upper edge coupling pattern 130 b.

The frequency band and bandwidth of the antenna device may be determined by the above-mentioned resistance value, capacitance and inductance.

Fig. 6A and 6B are side views illustrating a lower structure of a connection member 200 included in an antenna apparatus and an antenna module according to an example.

Referring to fig. 6A, the antenna apparatus and the antenna module include at least a portion of a connection member 200-1, an IC310, an adhesive member 320, an electrical connection structure 330, an encapsulant 340, a passive component 350, and a core member 410.

The connection member 200-1 may have a structure similar to that of the connection member 200 described above with reference to fig. 1 to 5.

The IC310 may be the same IC as the IC310a described in the foregoing example, and may be disposed below the connection member 200-1. The IC310 may be electrically connected to the wiring of the connection member 200-1 to transmit or receive an RF signal, and may be electrically connected to the ground plane of the connection member 200-1 to receive a ground. For example, IC310 may perform at least a portion of frequency conversion, amplification, filtering, phase control, and power generation to produce a converted signal.

The adhesive member 320 may bond the IC310 and the connection member 200-1 to each other.

The electrical connection structure 330 may electrically connect the IC310 and the connection member 200-1 to each other. For example, the electrical connection structure 330 may have a structure such as a solder ball, a pin, a pad, or a solder pad. The electrical connection structure 330 has a melting point lower than that of the ground plane with respect to the wiring of the connection member 200-1, and thus, the connection member 200-1 and the IC310 can be electrically connected to each other by using the above-described predetermined process of the lower melting point.

Encapsulant 340 may encapsulate at least a portion of IC310 and may improve heat radiation performance and impact protection performance of IC 310. For example, the encapsulant 340 may be implemented by a photosensitive encapsulant (PIE), ABF (Ajinomoto Build-up Film), Epoxy Molding Compound (EMC), or the like.

The passive components 350 may be disposed on the lower surface of the connection member 200-1 and may be electrically connected to the wiring and/or ground plane of the connection member 200-1 through the electrical connection structure 330. For example, the passive components 350 may include at least a portion of a capacitor (e.g., a multilayer ceramic capacitor (MLCC)), an inductor, and a chip resistor.

The core member 410 may be disposed under the connection member 200-1, and may be electrically connected to the connection member 200-1 to receive an Intermediate Frequency (IF) signal or a baseband signal from the outside thereof and transmit the signal to the IC310, or to receive an IF signal or a baseband signal from the IC310 and transmit the signal to the outside. In this case, the frequency of the RF signal (e.g., a frequency of 24GHz, 28GHz, 36GHz, 39GHz, or 60 GHz) is greater than the frequency of the IF signal (e.g., a frequency of 2GHz, 5GHz, or 10 GHz).

For example, the core member 410 may transmit or receive an IF signal or a baseband signal to or from the IC310 through wiring included in the IC ground plane of the connection member 200-1. Since the first ground plane of the connection member 200-1 is disposed between the IC ground plane and the wiring, the IF signal or the baseband signal may be isolated from the RF signal in the antenna device and the antenna module.

Referring to fig. 6B, according to an example, the antenna apparatus and the antenna module may include at least a portion of the shielding member 360, the connector 420, and the chip endfire antenna 430.

The shielding member 360 may be disposed under the connection member 200-1, and may be configured together with the connection member 200-1 such that the IC310 may be confined therebetween. For example, the shielding member 360 may be arranged to cover the IC310 and the passive component 350 together, e.g. in a conformal shielding manner, or to cover the IC310 and the passive component 350, respectively, e.g. in a compartment shielding manner. For example, the shielding member 360 may have a hexahedral form with one surface opened, and may have a hexahedral receiving space by being combined with the connection member 200-1. The shielding member 360 may be implemented using a material of high conductivity, such as copper, to have a relatively short skin depth, and may be electrically connected to the ground plane of the connection member 200-1. Accordingly, the shielding member 360 may reduce electromagnetic noise that may be received by the IC310 and the passive components 350.

The connector 420 may have a connection structure of a cable, such as a coaxial cable, or a flexible Printed Circuit Board (PCB), and may be electrically connected to the IC ground plane of the connection member 200-1. For example, connector 420 may receive IF signals, baseband signals, and/or power from the cable, or may provide IF signals and/or baseband signals to the cable.

The chip endfire antenna 430 may transmit or receive RF signals to support the antenna apparatus and antenna module. For example, the chip endfire antenna 430 may include: a dielectric block having a dielectric constant greater than that of the insulating layer; and electrodes disposed on both surfaces of the dielectric block. One of the electrodes may be electrically connected to the wiring of the connection member 200-1 and the other of the electrodes may be electrically connected to the ground plane of the connection member 200-1.

Fig. 7 is a side view showing the structures of an antenna device and an antenna module according to an example.

Referring to fig. 7, the antenna device and the antenna module have a structure in which the end-fire antenna 100f, the patch antenna pattern 1110f, the IC310 f, and the passive component 350f are integrated with the connection member 500 f.

The end fire antenna 100f and the patch antenna pattern 1110f may be designed in the same manner as the antenna device and the patch antenna pattern, respectively. The end-fire antenna 100f and the patch antenna pattern 1110f may receive an RF signal from the IC310 f to transmit the received RF signal, or may transmit the received RF signal to the IC310 f.

The connection member 500f may have a structure (e.g., a structure of a printed circuit board) in which at least one conductive layer 510f and at least one insulating layer 520f are stacked. As described above, the conductive layer 510f may have a ground plane and a feeder line.

In addition, the antenna apparatus and the antenna module may further include a flexible connection member 550 f. The flexible connecting member 550f may include: a first flexible region 570f vertically overlapped with the connection member 500 f; and a second flexible region 580f not vertically overlapped with the connection member 500 f.

The second flexible region 580f can be flexibly bent in the vertical direction. Thus, the second flexible region 580f may be flexibly connected to the connector of the gang board and/or the antenna device adjacent thereto.

The flexible connecting member 550f may include a signal line 560 f. Intermediate Frequency (IF) signals and/or baseband signals may be transmitted to IC310 f via signal line 560f or to an adjacent antenna device and/or connector of a gang board via signal line 560 f.

Fig. 8A to 8C are plan views illustrating arrangements of an antenna apparatus and an antenna module in an electronic device according to an example.

Referring to fig. 8A, an antenna apparatus and an antenna module including the chip patch antenna 100g may be disposed on a set board 600g of an electronic device 700g adjacent to a side boundary of the electronic device 700 g.

The electronic device 700g may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet PC, a laptop computer, a netbook, a television, a video game player, a smart watch, an automotive component, and so forth, but is not limited to such examples.

A communication module 610g and a baseband circuit 620g may also be provided on the group board 600 g. The antenna apparatus may be electrically connected to the communication module 610g and/or the baseband circuit 620g through a coaxial cable 630 g.

The communication module 610g may include at least a portion of the following to perform digital signal processing: memory chips such as volatile memory (e.g., Dynamic Random Access Memory (DRAM)), nonvolatile memory (e.g., Read Only Memory (ROM)), flash memory, and the like; an application processor chip, such as a central processing unit (e.g., Central Processing Unit (CPU)), a graphics processor (e.g., Graphics Processing Unit (GPU)), a digital signal processor, a cryptographic processor, a microprocessor, a microcontroller, or the like; and logic chips such as analog-to-digital converters (ADCs), Application Specific Integrated Circuits (ASICs), and the like.

The baseband circuit 620g may perform analog-to-digital conversion, amplification for analog signals, filtering, and frequency conversion to generate a base signal. The base signal input/output from the baseband circuit 620g may be transmitted to the antenna apparatus via a cable.

For example, the underlying signals may be transmitted to the IC through electrical connection structures, core vias, and wiring. The IC may convert the base signal to an RF signal in the millimeter wave (mmWave) band.

Referring to fig. 8B, an antenna apparatus and an antenna module, each including the patch antenna 100h, may be disposed on a gang board 600h of an electronic device 700h adjacent to one side boundary of the electronic device 700h and the other side boundary of the electronic device 700h, respectively. A communication module 610h and a baseband circuit 620h may also be provided on the group board 600 h. The antenna apparatus and antenna module may be electrically connected to the communication module 610h and/or baseband circuitry 620h by a coaxial cable 630 h.

Referring to fig. 8C, an antenna apparatus and an antenna module, each including a patch antenna 100i of a sheet type, may be disposed on a set board 600i of an electronic device 700i adjacent to a center of a side of the electronic device 700i having a polygonal shape, respectively. A communication module 610i and a baseband circuit 620i may also be provided on the group board 600 i. The antenna apparatus and the antenna module may be electrically connected to the communication module 610i and/or the baseband circuit 620i through a coaxial cable 630 i.

The patch antenna pattern, the upper coupling pattern, the edge coupling pattern, the upper edge coupling pattern, the feed via, the shield via, the routing via, the feed line, the ground plane, the end-fire antenna pattern, the leader pattern, the coupling ground pattern, and the electrical connection structure described herein may include a metal material such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), or a conductive material such as an alloy of Cu, Al, Ag, Sn, Au, Ni, Pb, and Ti, and may be formed by a plating method such as Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), sputtering, a subtractive process, an additive process, a semi-additive process (SAP), and a modified semi-additive process (MSAP), etc. However, the present disclosure is not limited to these examples.

The insulating layers and dielectric layers described herein may also be realized by FR4, Liquid Crystal Polymer (LCP), low temperature co-fired ceramic (LTCC), thermosetting resin such as epoxy resin, thermoplastic resin such as polyimide, or resin (e.g., prepreg material, ABF (Ajinomoto Build-up Film), Bismaleimide Triazine (BT) resin, photo dielectric (PID) resin, Copper Clad Laminate (CCL), insulating material of glass or ceramic series, etc.) formed by impregnating these resins together with inorganic filler in a core material such as glass fiber, glass cloth, glass fabric, etc. The insulating layer and the dielectric layer may fill at least a portion of the antenna device as disclosed herein where no patch antenna pattern, upper coupling pattern, edge coupling pattern, upper edge coupling pattern, feed via, shield via, wire via, feed line, ground plane, end-fire antenna pattern, director pattern, coupling ground pattern, and electrical connection structure are provided.

The RF signals described herein may be used under various communication protocols such as: Wi-Fi (IEEE802.11 family, etc.), WiMAX (IEEE 802.16 family, etc.), IEEE 802.20, Long Term Evolution (LTE), Ev-DO, HSPA +, HSDPA +, HSUPA +, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3 rd generation (3G), 4G, 5G, and various wireless and wired protocols specified after the above protocols, but the disclosure is not limited to these examples.

As set forth above, according to an example, in the case of an antenna device, an antenna module, and a sheet patch pattern provided in the antenna device and the antenna module, antenna performance related to gain, bandwidth, directivity, antenna size, and the like can be improved without substantially deteriorating energy efficiency and size in terms of electrical connection.

The communication modules 610g, 610h, and 610i in fig. 8A, 8B, and 8C, which perform the operations described herein, are implemented by hardware components configured to perform the operations described herein as being performed by the hardware components. Examples of hardware components that may be used to perform the operations described herein where appropriate include controllers, sensors, generators, drivers, memories, comparators, arithmetic logic units, adders, subtractors, multipliers, dividers, integrators, and any other electronic components configured to perform the operations described herein. In other examples, one or more of the hardware components that perform the operations described herein are implemented by computing hardware, e.g., by one or more processors or computers. A processor or computer may be implemented by one or more processing elements (such as an array of logic gates, controllers and arithmetic logic units, digital signal processors, microcomputers, programmable logic controllers, field programmable gate arrays, programmable logic arrays, microprocessors, or any other device or combination of devices configured to respond to and execute instructions in a defined manner to achieve a desired result). In one example, a processor or computer includes or is connected to one or more memories storing instructions or software for execution by the processor or computer. The hardware components implemented by the processor or computer may execute instructions or software, such as an Operating System (OS) and one or more software applications running on the OS, to perform the operations described herein. The hardware components may also access, manipulate, process, create, and store data in response to execution of instructions or software. For simplicity, the singular terms "processor" or "computer" may be used in the description of the examples described in this application, but in other examples, multiple processors or computers may be used, or a processor or computer may include multiple processing elements or multiple types of processing elements, or both. For example, a single hardware component or two or more hardware components may be implemented by a single processor, or two or more processors or a processor and a controller. One or more hardware components may be implemented by one or more processors or processors and controllers, and one or more other hardware components may be implemented by one or more other processors or another processor and another controller. One or more processors or a processor and a controller may implement a single hardware component or two or more hardware components. The hardware components may have any one or more of different processing configurations, examples of which include single processors, independent processors, parallel processors, Single Instruction Single Data (SISD) multiprocessing, Single Instruction Multiple Data (SIMD) multiprocessing, Multiple Instruction Single Data (MISD) multiprocessing, and Multiple Instruction Multiple Data (MIMD) multiprocessing.

Instructions or software for controlling computing hardware (e.g., one or more processors or computers) to implement the hardware components and perform the methods described above may be written as computer programs, code segments, instructions, or any combination thereof, for individually or collectively instructing or configuring the one or more processors or computers to operate as a machine or special purpose computer to perform the operations performed by the hardware components and methods described above. In one example, the instructions or software include machine code that is executed directly by one or more processors or computers, such as machine code produced by a compiler. In another example, the instructions or software comprise high-level code that is executed by one or more processors or computers using an interpreter. Instructions or software may be written in any programming language based on the block diagrams and flow diagrams shown in the figures and the corresponding description in the specification, which disclose algorithms for performing operations performed by hardware components and methods as described above.

Instructions or software for controlling computing hardware (e.g., one or more processors or computers) to implement the hardware components and perform the methods described above, as well as any associated data, data files, and data structures, may be recorded, stored, or fixed in or on one or more non-transitory computer-readable storage media. Examples of non-transitory computer-readable storage media include read-only memory (ROM), random-access memory (RAM), flash memory, CD-ROM, CD-R, CD + R, CD-RW, CD + RW, DVD-ROM, DVD-R, DVD + R, DVD-RW, DVD + RW, DVD-RAM, BD-ROM, BD-R, BD-R LTH, BD-RE, magnetic tape, floppy disk, magneto-optical data storage, hard disk, solid state disk, and any other device configured to store instructions or software and any associated data, data files, and data structures in a non-transitory manner and to provide the instructions or software and any associated data, data files, and data structures to one or more processors or computers so that the one or more processors or computers can execute the instructions. In one example, the instructions or software and any associated data, data files, and data structures are distributed over a network of networked computer systems such that the instructions and software and any associated data, data files, and data structures are stored, accessed, and executed in a distributed fashion by one or more processors or computers.

While the present disclosure includes particular examples, it will be apparent, after understanding the disclosure of the present application, that various changes in form and detail may be made therein without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered in a descriptive sense only and not for purposes of limitation. The description of features or aspects in each example will be considered applicable to similar features or aspects in other examples. Suitable results may be obtained if the described techniques were performed in a different order and/or if components in the described systems, architectures, devices, or circuits were combined in a different manner and/or replaced or supplemented by other components or their equivalents. Therefore, the scope of the present disclosure is defined not by the detailed description but by the claims and their equivalents, and all modifications within the scope of the claims and their equivalents are to be construed as being included in the present disclosure.