阅读说明：本技术 电源控制装置以及开关电源 (Power supply control device and switching power supply ) 是由 井上胜己 青木贯司 于 2020-03-19 设计创作，主要内容包括：本发明涉及电源控制装置以及开关电源。电源控制装置包含：起动电路,其通过接通而使输入到第1节点的全波整流电压充入到与第2节点连接的电容器中；第1检测电路,其检测第1节点是否小于第1电压；第2检测电路,其检测第2节点是否小于第2电压、以及检测第2节点是否成为比第2电压高的第3电压以上；放电电路,其通过接通而使第1节点所蓄积的电荷释放；控制电路,其在第1节点的电压小于第1电压时使起动电路接通,在第2节点小于第2电压时使放电电路接通,在第2节点的电压成为第3电压以上时使放电电路断开。(The invention relates to a power supply control device and a switching power supply. The power supply control device includes: a start circuit that charges a full-wave rectified voltage input to a 1 st node into a capacitor connected to a 2 nd node by being turned on; a 1 st detection circuit that detects whether the 1 st node is less than a 1 st voltage; a 2 nd detection circuit for detecting whether the 2 nd node is lower than the 2 nd voltage and whether the 2 nd node is higher than the 2 nd voltage by a 3 rd voltage or more; a discharge circuit that discharges the charge accumulated in the 1 st node by being turned on; and a control circuit for turning on the starter circuit when the voltage of the 1 st node is less than the 1 st voltage, turning on the discharge circuit when the voltage of the 2 nd node is less than the 2 nd voltage, and turning off the discharge circuit when the voltage of the 2 nd node is equal to or more than the 3 rd voltage.)

1. A power control device, comprising:

a start circuit that charges a full-wave rectified voltage input to a 1 st node into a capacitor connected to a 2 nd node by being turned on;

a 1 st detection circuit that detects whether a voltage of the 1 st node is less than a 1 st voltage;

a 2 nd detection circuit that detects whether or not the voltage of the 2 nd node falls and becomes lower than a 2 nd voltage, and that detects whether or not the voltage of the 2 nd node rises and becomes equal to or higher than a 3 rd voltage higher than the 2 nd voltage;

a discharge circuit that is turned on to discharge the charge accumulated in the 1 st node; and

and a control circuit that turns on the starting circuit when the 1 st detection circuit detects that the voltage of the 1 st node is less than the 1 st voltage during a period from when the 2 nd detection circuit detects that the voltage of the 2 nd node decreases to be less than the 2 nd voltage to when the voltage of the 2 nd node increases to reach the 3 rd voltage, and turns on the discharge circuit during a part of the period or during the entire period.

2. The power supply control device according to claim 1,

the control circuit turns off the start circuit when the voltage of the 1 st node becomes equal to or higher than the 1 st voltage.

3. The power supply control device according to claim 1,

the control circuit turns off the starter circuit when a predetermined time or more has elapsed since turning on the starter circuit.

4. The power supply control device according to claim 1,

the control circuit intermittently turns on the discharge circuit during a part of the period.

5. The power supply control device according to claim 4,

the end period of the part is when the voltage of the 1 st node is less than the 1 st voltage.

6. The power supply control device according to claim 4 or 5,

the beginning period of the period is after the voltage of the 1 st node reaches the peak value.

7. A switching power supply, comprising:

the power supply control device according to any one of claims 1 to 6;

a first rectifier circuit 1 rectifying an alternating voltage;

a 2 nd rectifying circuit that full-wave rectifies the alternating-current voltage and supplies the full-wave rectified voltage to the 2 nd node;

a transformer having a primary winding, a secondary winding, and an auxiliary winding;

a switching element provided in series with the primary winding between two output terminals in the 1 st rectifier circuit;

a 1 st output circuit that rectifies and smoothes a voltage induced in the secondary winding and outputs the rectified and smoothed voltage; and

a 2 nd output circuit which rectifies and smoothes a voltage induced in the auxiliary winding and outputs the rectified and smoothed voltage to the 2 nd node,

the power supply control device controls switching of the switching element.

Technical Field

The present invention relates to, for example, a power supply control device and a switching power supply.

Background

Conventionally, the following switching power supplies are known: a dc voltage obtained by rectifying an ac voltage of an ac power supply is turned on/off by a switching element, supplied to a primary winding of a transformer, and a voltage induced in a secondary winding of the transformer is rectified and smoothed, thereby generating an output voltage. Here, the on/off of the switching element is generally controlled by a power supply control device integrated in a semiconductor.

The power supply of such a power supply control device uses a voltage induced in the auxiliary winding of the transformer by turning on/off a switching element. Specifically, the power supply of the power supply control apparatus uses a voltage that rectifies a voltage induced in the auxiliary winding and is charged into the capacitor.

Here, the following techniques are disclosed: when the charging voltage of the capacitor is insufficient for some reason, a starter circuit provided inside the power supply control device is turned on to charge the capacitor with a full-wave rectified voltage of the ac power supply (see, for example, patent document 1).

In this technique, when the starter circuit is turned on in a state where the full-wave rectified voltage is high, the loss increases, and therefore, the starter circuit is turned on when the voltage of the node to which the full-wave rectified voltage is input is smaller than the threshold value.

Patent document 1: japanese patent laid-open publication No. 2011-244602

However, in the above-described technique, when the starter circuit is turned off, the load on the node to which the full-wave rectified voltage is input is reduced, and when the full-wave rectification is lowered, the following property of the node is deteriorated by the parasitic capacitance of the node, and the voltage of the node may not be lower than the threshold value. In this case, since the capacitor cannot be charged, there is a problem that the power supply control device using the charging voltage as a power supply may not be operated.

Disclosure of Invention

In order to solve the above problem, a power supply control device according to one aspect includes: a start circuit that charges a full-wave rectified voltage input to a 1 st node into a capacitor connected to a 2 nd node by being turned on; a 1 st detection circuit that detects whether a voltage of the 1 st node is less than a 1 st voltage; a 2 nd detection circuit that detects whether or not the voltage of the 2 nd node falls and becomes lower than a 2 nd voltage, and that detects whether or not the voltage of the 2 nd node rises and becomes equal to or higher than a 3 rd voltage higher than the 2 nd voltage; a discharge circuit that is turned on to discharge the charge accumulated in the 1 st node; and a control circuit that turns on the starting circuit when the 1 st detection circuit detects that the voltage of the 1 st node is less than the 1 st voltage during a period from when the 2 nd detection circuit detects that the voltage of the 2 nd node falls and is less than the 2 nd voltage to when the voltage of the 2 nd node rises and reaches the 3 rd voltage, and turns on the discharge circuit during a part of the period or during the entire period.

Drawings

Fig. 1 is a diagram showing a switching power supply including a power supply control device according to embodiment 1.

Fig. 2 is a diagram showing a power supply control device according to embodiment 1.

Fig. 3 is a diagram showing a step-down circuit and the like in the power supply control device.

Fig. 4 is a diagram showing a voltage waveform of the node VH input to the power supply control device.

Fig. 5 is a diagram showing the charging operation for the voltages of nodes VH and Vcc.

Fig. 6 is a diagram showing a voltage waveform of the node VH.

Fig. 7 is a diagram illustrating a charging operation with respect to the voltage of the node VH.

Fig. 8 is a diagram showing the charging operation and the discharging operation with respect to the voltages of nodes VH and Vcc.

Fig. 9 is a diagram showing a power supply control device according to embodiment 2.

Fig. 10 is a diagram showing the charging operation and the discharging operation with respect to the voltages of nodes VH and Vcc.

Fig. 11 is a diagram showing the charging operation and the discharging operation with respect to the voltages of nodes VH and Vcc.

Fig. 12 is a diagram showing a power supply control device of a comparative example.

Description of the reference symbols

1: a switching power supply; 40: a transformer; 100: a power supply control device; 102. 104: a comparator; 110: a control circuit; 120: a voltage reduction circuit; 130: a start-up circuit; 140: a discharge circuit; q11, 122, 134, 144: a transistor; d11, d12, d13, d 14: a diode; c11, C12, C14: and a capacitor.

Detailed Description

Hereinafter, a drive control device according to an embodiment will be described with reference to the drawings. In the drawings, the dimensions and scales of the respective members are appropriately different from those in the actual case. In the following description, the scope of the present invention is not limited to the embodiments described below unless otherwise specified, although various technically preferable limitations are imposed on the embodiments.

Fig. 1 is a diagram showing a switching power supply 1 including a power supply control device 100 according to embodiment 1. As shown in the drawing, the switching power supply 1 is a so-called flyback system. Specifically, the switching power supply 1 is configured to generate a Direct Current (DC) voltage Vout by passing a current through the primary winding P of the transformer 40 by turning on the transistor Q11 to accumulate energy, outputting the accumulated energy from the secondary winding S of the transformer 40 through the diode d14 by turning off the transistor Q11, and smoothing the energy by the capacitor C14.

The diode bridge Db as an example of the first rectifier circuit 1 rectifies the ac voltage of the ac power supply 10. The positive terminal of the diode bridge Db is connected to one end of the primary winding P in the transformer 40 and one end of the capacitor C11, and the negative terminal of the diode bridge Db and the other end of the capacitor C11 are grounded at a node Gnd at which the voltage is zero.

The transformer 40 has a secondary winding S and an auxiliary winding D in addition to a primary winding P, the other end of which is connected to the drain node of the transistor Q11. The transistor Q11, which is an example of a switching element, is an N-channel MOSFET, for example, and the source node is connected to one end of the resistor element R12. The other end of the resistor element R12 is grounded at a node Gnd. Therefore, the primary winding P and the transistor Q11 are provided in series between the positive side terminal and the negative side terminal in the diode bridge Db.

In addition, the snubber circuit Snb is provided between one end and the other end of the primary winding P in the transformer 40, and absorbs a transient voltage generated in the primary winding P due to on/off of the transistor Q11.

One end of the secondary winding S is connected to the anode of the diode d 14. The capacitor C14 is connected between the cathode of the diode d14 and the other end of the secondary winding S, and the voltage smoothed by the capacitor C14 is output as Vout. Therefore, the diode d14 and the capacitor C14 function as an example of the 1 st output circuit that rectifies and smoothes the voltage induced in the secondary winding S.

The positive electrode of a light emitting diode Pct in the photocoupler is connected to the negative electrode of a diode d14, and the negative electrode of the light emitting diode Pct is connected to the error amplifier 50.

The error amplifier 50 causes a current corresponding to a deviation between the voltage Vout and an internal reference voltage to flow through the light emitting diode Pct.

One end of the auxiliary winding D in the transformer 40 is connected to the anode of a diode D13, and the cathode of the diode D13 is connected to a node Vcc, which is a power supply terminal of the power supply control device 100, and one end of a capacitor C12. The other end of the auxiliary winding D and the other end of the capacitor C12 are grounded at a node Gnd.

The voltage induced in the auxiliary winding D of the transformer 40 is rectified by the diode D13, smoothed by the capacitor C12, charged, and supplied to the node Vcc as the power supply voltage of the power supply control device 100. Therefore, the diode D13 and the capacitor C12 function as an example of a 2 nd output circuit that rectifies and smoothes the voltage induced in the auxiliary winding D.

Note that the node Vcc is an example of the 2 nd node. Note that the capacitor C12 may be charged with a voltage obtained by rectifying the voltage induced in the auxiliary winding D by the diode D13, or with a voltage supplied via a node VH described later.

The emitter of phototransistor Pcr of the photocoupler is grounded at node Gnd, and the collector is connected to node Fb in power supply control device 100. The capacitor C13 is connected in parallel with the phototransistor Pcr.

The power supply control apparatus 100 is integrated in a semiconductor, for example, and generates a voltage based on a current flowing to the phototransistor Pcr at the node Fb after being resistance-pulled up from an internal power supply voltage. Therefore, a voltage corresponding to the deviation of the voltage Vout is generated at the node Fb. Although not particularly shown, the power supply control device 100 detects the voltage at the node Fb, and controls on/off of the transistor Q11 in a direction in which the deviation indicated by the voltage is zero. Specifically, the power supply control device 100 generates a PWM signal in a direction such that the deviation becomes zero, and supplies the PWM signal to the gate node of the transistor Q11.

In fig. 1, the transistor Q11 is separate from the power supply control device 100, but may be integrated into the power supply control device 100.

Further, the alternating-current voltage of the alternating-current power supply 10 is full-wave rectified by the diodes d11 and d12, and applied to the node VH in the power supply control device 100. Therefore, the diodes d11 and d12 are an example of the 2 nd rectifier circuit.

In the case immediately after the ac power supply 10 is connected or in the case immediately after the power supply is turned on, the capacitor C12 is not charged with a sufficient voltage. Further, when the transistor Q11 is turned off for some reason, no voltage is induced in the auxiliary winding D, and therefore, the voltage charged in the capacitor C12 decreases, and the charging voltage becomes insufficient. In this case, power supply control device 100 also performs control for charging capacitor C12 using the voltage applied to node VH.

Fig. 2 is a diagram showing an example of such a power supply control device 100. As shown in the drawing, the power supply control device 100 includes resistance elements R21, R22, R31, R32, comparators 102, 104, a control circuit 110, a voltage step-down circuit 120, a start circuit 130, and a discharge circuit 140.

The voltage-lowering circuit 120 lowers the voltage of the node VH and applies it to the node N. Note that the node VH is an example of the 1 st node. When turned on, the starter circuit 130 charges the capacitor C12 by passing a constant current from the node N to the node Vcc. When turned on, the discharge circuit 140 discharges the charge accumulated in the capacitor parasitic on the node VH via the node N.

Fig. 3 is a diagram showing an example of the configuration of the step-down circuit 120, the start circuit 130, and the discharge circuit 140.

In this figure, the voltage step-down circuit 120 is formed of, for example, a transistor 122 of a JFET. The voltage step-down circuit 120 drops the voltage of the node VH by the pinch-off component of the transistor 122 and applies the voltage to the node N.

The start circuit 130 includes, for example, a resistor element 132 and a transistor 134 connected in series between the node N and the node Vcc. A signal St output from the control circuit 110 is supplied to a gate node of the transistor 134, and on/off of charging to the capacitor C12 via the node Vcc is controlled by the signal St. When the starter circuit 130 is turned on, the voltage applied to the node VH is stepped down by the step-down circuit 120 and then applied to the node Vcc.

The discharge circuit 140 includes, for example, a resistance element 142 and a transistor 144 connected in series between the node N and the node Gnd. A signal Dsc output from the control circuit 110 is supplied to a gate node of the transistor 144, and on/off of the transistor 144 is controlled by the signal Dsc. When the transistor 144 is turned on, the charge accumulated in the capacitor parasitic on the node VH is discharged to the node Gnd via the transistor 122 and the resistance element 142.

Returning the description to fig. 2 again, the resistance elements R21, R22 divide the voltage at node VH and apply it to the negative input (-) of the comparator 102. The voltage Vref1 is applied to the positive input (+) of comparator 102.

The comparator 102 outputs a signal of H level in the case where the voltage of the negative input terminal (-) is smaller than the voltage Vref1 applied to the positive input terminal (+), and otherwise, the comparator 102 outputs a signal of L level. Here, when the voltage of the node VH is the threshold Vth _ ac, the voltage Vref1 corresponds to a voltage obtained by dividing the voltage of the node VH by the resistance elements R21 and R22. Therefore, the comparator 102 is an example of the 1 st detection circuit that detects whether or not the voltage of the node VH is smaller than the threshold Vth _ ac. The threshold Vth _ ac is an example of the 1 st voltage.

The resistor elements R31, R32 divide the voltage at the node Vcc and apply it to the negative input (-) of the comparator 104. A voltage Vref2 is applied to the positive input (+) of comparator 104.

The comparator 104 is a hysteresis comparator, and a threshold value applied in the case where the voltage at the negative input terminal (-) falls is different from a threshold value applied in the case where the voltage rises. In detail, in the case where the voltage of the negative input terminal (-) falls, if the voltage of the negative input terminal (-) is smaller than the voltage (Vref2- α) after shifting the voltage Vref2 applied to the positive input terminal (+) by α to the lower side, the comparator 104 outputs a signal of H level. When the voltage at the negative input terminal (-) rises, the comparator 104 outputs a signal at the L level if the voltage at the negative input terminal (-) is equal to or higher than the voltage (Vref2+ α) obtained by shifting the voltage Vref2 applied to the positive input terminal (+) by α to the high side.

Here, when the voltage of the node Vcc is the threshold value Vdet _ L, the voltage (Vref2 — α) corresponds to a voltage obtained by dividing the voltage of the node Vcc by the resistance elements R31 and R32. Similarly, when the voltage of the node Vcc is the threshold value Vdet _ U, the voltage (Vref2+ α) corresponds to a voltage obtained by dividing the voltage of the node Vcc by the resistance elements R31 and R32.

In addition, the threshold value Vdet _ L, Vdet _ U has the following relationship.

Vdet_L<Vdet_U

Here, threshold value Vdet _ L is an example of the 2 nd voltage, and threshold value Vdet _ U is an example of the 3 rd voltage.

The comparator 104 is an example of a 2 nd detection circuit that detects whether the voltage of the node Vcc falls and the voltage is smaller than the threshold Vdet _ L, and detects whether the voltage of the node Vcc rises and the voltage reaches the threshold Vdet _ U or more.

The control circuit 110 controls the start circuit 130 and the discharge circuit 140 based on the detection results of the comparators 102 and 104. Although the details will be described later, control circuit 110 turns on discharge circuit 140 during a period from when the voltage of node Vcc falls to threshold value Vdet _ L to when the voltage rises to threshold value Vdet _ U, and turns on starter circuit 130 when the voltage of node VH is smaller than threshold value Vth _ ac during this period.

Here, in the present embodiment, a process of adopting the configuration shown in fig. 2 will be described.

When the voltage of the node Vcc is insufficient, the control circuit 110 charges the capacitor C12 with the voltage of the node VH. More specifically, when the voltage at the node Vcc is insufficient, the control circuit 110 turns on the starter circuit 130 when it detects the input of the voltage waveform applied to the node VH, more specifically, the full-wave rectified voltage waveform shown in fig. 4. Thus, the voltage applied to the node VH is stepped down by the step-down circuit 120 and charged in the capacitor C12, and therefore, the voltage of the node Vcc rises. When detecting that the voltage of the node Vcc reaches, for example, the threshold value Vdet _ U, the control circuit 110 turns off the starter circuit 130, and causes the transistor Q11 to start on/off. By this switching, a voltage is induced in the auxiliary winding D, and the induced voltage is rectified by the diode D13 and charged into the capacitor C12.

When the transistor Q11 is switched, the control circuit 110 stops the on/off of the transistor Q11 when an abnormal state or the like is detected. When the on/off of the transistor Q11 is stopped, no voltage is induced in the auxiliary winding D, and therefore the charging voltage of the capacitor C12, that is, the voltage of the node Vcc, drops.

Even if the on/off of the transistor Q11 is stopped due to an abnormal state or the like, the voltage of the node Vcc needs to be controlled so as to be within a predetermined range, specifically, a voltage range that can be controlled by an IC.

Therefore, in the comparative example to the present embodiment, it is considered to execute the following control. Fig. 12 is a diagram showing a power supply control device of a comparative example, and does not include the discharge circuit 140, as compared with the configuration of the present embodiment of fig. 2. Further, the control circuit 110 also has a different control content from the configuration of fig. 2 because it does not have the discharge circuit 140.

In the comparative example, when the voltage of the node Vcc falls and is less than the threshold value Vdet _ L, the control circuit 110 turns on the starter circuit 130.

Thus, the voltage applied to the node VH is stepped down by the step-down circuit 120, applied to the node Vcc via the start circuit 130 that is turned on, and charged in the capacitor C12, so the voltage of the node Vcc rises. When the voltage of node Vcc reaches threshold Vdet _ U or more, control circuit 110 turns off starter circuit 130. Thus, even if the on/off of the transistor Q11 is stopped, the voltage of the node Vcc is controlled to converge to a range of the threshold value Vdet _ L or more and less than the threshold value Vdet _ U.

However, in such control, the following control is performed in consideration of the fact that the loss of the step-down circuit 120 is large particularly in a state where the voltage of the node VH is relatively high. Specifically, as shown in fig. 5, control circuit 110 turns on starter circuit 130 when node VH is less than threshold value Vth _ ac in a period from when the voltage of node Vcc is lower than threshold value Vdet _ L to when it is lower than threshold value Vdet _ U.

In fig. 5, the signal St does not show a logic level, but shows the on/off state of the starter circuit 130 based on St.

It is considered that the loss in the step-down circuit 120 is reduced by the turn-on of the start circuit 130, and therefore, the power consumption can be reduced.

However, such control is premised on a full-wave rectified waveform in which the voltage waveform of the node VH is ideal. In fact, when the starter circuit 130 is turned off, the load on the node Vcc side is reduced when viewed from the node VH, and therefore, the capacitance component parasitic on the node VH is significant. As shown in fig. 6, the capacitance component when the starter circuit 130 is turned off deteriorates the followability when the full-wave rectification is dropped in the voltage waveform of the node VH.

When the following property of the node VH is deteriorated by the capacitance component, the voltage of the node VH may not be smaller than the threshold Vth _ ac as shown in fig. 7. In this case, since the control circuit 110 cannot turn on the starter circuit 130, the voltage of the node Vcc continues to drop, the power supply control device 100 cannot operate, and the switching power supply 1 may cause a system error.

Therefore, in the present embodiment, the discharge circuit 140 is provided and a function of controlling the discharge circuit 140 is added to the control circuit 110. Specifically, as shown in fig. 8, when the voltage of node Vcc is in the range of not less than threshold value Vdet _ L and less than threshold value Vdet _ U, control circuit 110 turns on discharge circuit 140.

In fig. 8, the signal Dsc is not shown in logic level, but shows the on/off state of the discharge circuit 140 based on the Dsc.

When the discharge circuit 140 is turned on, the electric charges accumulated in the capacitance component parasitic on the node VH are discharged, and therefore, the voltage waveform of the node VH improves the followability when the full-wave rectification is lowered, and a preferable state is obtained. In this state, when the voltage of the node VH is smaller than the threshold Vth _ ac, the control circuit 110 turns on the starter circuit 130.

The following is shown in fig. 8. In detail, the following is shown: first, the voltage at node Vcc drops, and reaches threshold value Vdet _ L at time t11, and discharge circuit 140 turns on. Second, the following performance when the full-wave rectification falls in the voltage waveform of the node VH is in a good state by turning on the discharge circuit 140. Third, when the voltage of the node VH is smaller than the threshold Vth _ ac in this state, the starter circuit 130 is turned on. Fourth, the voltage of the node Vcc rises due to the repeated turn-on of the starter circuit 130, and reaches the threshold value Vdet _ U at time t12, turning off the discharge circuit 140.

According to power supply control device 100 of embodiment 1, since starter circuit 130 is turned on when node VH is smaller than threshold value Vth _ ac when the voltage of node Vcc is within a range smaller than threshold value Vdet _ U after being lower than threshold value Vdet _ L, a part of loss generated when the voltage of node VH is charged can be suppressed, and accordingly, power consumption can be reduced.

Further, according to the present embodiment, when the capacitance component parasitic on node VH is significant, discharge circuit 140 is turned on, and the influence of the capacitance component is reduced, so that it is possible to more reliably control the voltage of node Vcc to be in a range smaller than threshold value Vdet _ U after the voltage of node Vcc becomes lower than threshold value Vdet _ L.

The turning on of the discharge circuit 140 is a loss because the electric charge accumulated in the capacitance component is discharged. Therefore, from the viewpoint of reducing power consumption, there is room for improvement in a configuration in which discharge circuit 140 is turned on for the entire period in a range smaller than threshold value Vdet _ U after the voltage of node Vcc is smaller than threshold value Vdet _ L.

Therefore, embodiment 2 in which this aspect is improved will be described.

Fig. 9 is a diagram showing an example of the power supply control device 100 according to embodiment 2. In embodiment 2 shown in fig. 9, in contrast to embodiment 1 shown in fig. 2, a peak detection circuit 150 is provided and a function of controlling the discharge circuit 140 in accordance with the detection result of the peak detection circuit 150 is added to the control circuit 110.

The peak detection circuit 150 detects a peak of a voltage waveform obtained by dividing the voltage of the node VH, and notifies the control circuit 110 of the timing of the detected peak.

When the voltage of node Vcc falls within a range smaller than threshold value Vdet _ U after falling below threshold value Vdet _ L, control circuit 110 intermittently turns on discharge circuit 140 after the timing of the peak detected by peak detection circuit 150.

Further, the control circuit 110 turns on the starter circuit 130 when the voltage of the node VH is smaller than the threshold Vth _ ac, which is similar to embodiment 1. Here, since the load on the node VH increases when the starter circuit 130 is turned on, it can be said that the voltage waveform of the node VH has good followability when full-wave rectification falls, and the necessity of turning on the discharge circuit 140 is low. Therefore, in the present embodiment, control circuit 110 intermittently turns on discharge circuit 140 during a period from when the peak value of the voltage at node VH is detected to when the voltage is smaller than threshold Vth _ ac and starter circuit 130 is turned on.

However, when the voltage of the node Vcc falls and reaches the threshold value Vdet _ L, it is necessary to detect the voltage of the node VH in a state of good followability at the time of fall of the full-wave rectification. Therefore, control circuit 110 is configured to turn on discharge circuit 140 exceptionally regardless of the voltage of node VH when the voltage of node Vcc reaches threshold value Vdet _ L, and to not turn on discharge circuit 140 intermittently when the voltage of node VH is smaller than threshold value Vth _ ac and starter circuit 130 is turned on.

Fig. 10 is a diagram illustrating an operation of the power supply control device 100 according to embodiment 2.

As shown in the figure, when the voltage of the node Vcc falls and reaches the threshold Vdet _ L at time t21, the discharge circuit 140 is exceptionally turned on without intermittence. When the voltage waveform of the node VH is lower than the threshold Vth _ ac at time t22, the starter circuit 130 is turned on and the discharge circuit 140 is turned off.

After the voltage of the node VH reaches a peak at time t23, the discharge circuit 140 is intermittently turned on. When the voltage at node VH is less than threshold Vth _ ac at time t24 when discharge circuit 140 is on, starter circuit 130 is turned on, and intermittent on/off of discharge circuit 140 is interrupted to switch to off.

When the voltage of the node VH reaches the peak again at time t25, the intermittent turning-on of the discharge circuit 140 is resumed. When the voltage at the node VH is smaller than the threshold Vth _ ac, the starter circuit 130 is turned on, whereas the intermittent turning-on of the discharge circuit 140 is interrupted to turn off. This operation is repeated until the voltage of node Vcc reaches threshold value Vdet _ U at time t 26.

According to the power supply control device 100 of embodiment 2, as compared with embodiment 1, the intermittent turn-on of the discharge circuit 140 can reduce the loss, and accordingly, the power consumption can be further reduced.

In embodiment 4, control circuit 110 may be configured to continue the intermittent on-state without turning off discharge circuit 140 when starting up circuit 130. That is, in embodiment 4, control circuit 110 may be configured to turn on discharge circuit 140 intermittently a predetermined number of times after the voltage at node VH reaches the peak value.

In embodiments 1 and 2, the following configurations are provided: when the voltage of the node VH is smaller than the threshold Vth _ ac, the starter circuit 130 is turned on, and when the voltage of the node VH is equal to or higher than the threshold Vth _ ac, the starter circuit 130 is turned off. Not limited to this configuration, as shown in fig. 11, the timing of turning off the starter circuit 130 may be set to a timing when a predetermined period T1 has elapsed since the starter circuit 130 was turned on. In such a configuration, the period from on to off is changed according to the magnitude of the load on the node Vcc. Specifically, the period from on to off is set to be long as the load on the node Vcc increases.

In embodiment 1 and embodiment 2, the voltage-reducing circuit 120 is not necessarily required. In the case where the voltage-decreasing circuit 120 is not provided, the node Vcc and the node N may be regarded as the same.

Note that, although the starter circuit 130 may be turned on every time the voltage of the node VH is smaller than the threshold Vth _ ac, the starter circuit 130 may be turned on 1 time per time when the voltage of the node VH is smaller than the threshold Vth _ ac.

In addition, in the case where the voltage of the node VH is smaller than the threshold Vth _ ac and is located near zero, the voltage between the source node and the gate node in the transistor 134 becomes insufficient and thus does not conduct. Therefore, strictly speaking, when the voltage of the node VH is near zero, the capacitor C12 is not charged, and therefore the voltage of the node Vcc is flat without increasing. However, in fig. 5, 8, 10, and 11, it is shown for simplicity of explanation that if the voltage of the node VH is smaller than the threshold Vth _ ac, the voltage of the node Vcc increases at a fixed rate even if it is near zero.