阅读说明：本技术 一种基于收发组件模数信号处理的发射检波电路 (Transmitting and detecting circuit based on receiving and transmitting assembly analog-digital signal processing ) 是由 谭尊林 曹徵鉴 何恒志 史跃跃 于 2020-07-22 设计创作，主要内容包括：本发明公开了一种基于收发组件模数信号处理的发射检波电路,通过设置信号处理设备、FPGA逻辑控制电路、DAC模块、ADC模块、射频发射通道、射频接收通道、收发切换开关和收发天线。本发明在射频通道的基础上,配备设置用于检波控制的信号处理设备、用以进行射频发射的DAC模块、用以进行检波标志信号返回的ADC模块和进行检波结果判断输出的FPGA逻辑控制电路。旨在解决现有技术中存在的信号在收发组件上发射成功的判断精度不高的技术问题。(The invention discloses a transmitting and detecting circuit based on analog-digital signal processing of a transmitting and receiving component. The invention is provided with a signal processing device for detecting control, a DAC module for carrying out radio frequency emission, an ADC module for returning a detection mark signal and an FPGA logic control circuit for judging and outputting a detection result on the basis of a radio frequency channel. The method aims to solve the technical problem that the judgment accuracy of successful transmission of signals on the transceiving component is not high in the prior art.)

1. A transmit-detect circuit based on transceiver module analog-to-digital signal processing, the transmit-detect circuit comprising: the device comprises signal processing equipment, an FPGA logic control circuit, a DAC module, an ADC module, a radio frequency transmitting channel, a radio frequency receiving channel, a transmitting-receiving switch and a transmitting-receiving antenna; the first signal output end of the signal processing equipment is connected with the input end of a DAC module, the second signal output end of the signal processing equipment is connected with the first input end of an FPGA logic control circuit, the output end of the DAC module is connected with the input end of a radio frequency transmitting channel, the output end of the radio frequency receiving channel is connected with the input end of an ADC module, the output end of the ADC module is connected with the second input end of the FPGA logic control circuit, the output end of the FPGA logic control circuit is connected with the signal input end of the signal processing equipment, and the output end of the radio frequency transmitting channel and the input end of the radio frequency receiving channel are connected with a transmitting and receiving antenna through a; wherein:

the signal processing equipment transmits a transmitting signal for transmitting by a transmitting-receiving antenna to the DAC module through the first signal output end, and provides a transmitting detection control signal to the FPGA logic control circuit through the second signal output end so as to realize a transmitting detection process in the transmitting-receiving component;

the radio frequency transmitting channel transmits signals through the receiving and transmitting antenna according to the received digital transmitting signals transmitted by the DAC module; the radio frequency receiving channel transmits the detection mark signal returned by the receiving channel to the ADC module, and the signal is processed by the FPGA logic control circuit;

the FPGA logic control circuit is connected with the ADC module and the signal processing equipment, and is used for transmitting the detection mark digital signal transmitted by the ADC module to the signal processing equipment, receiving the detection control signal transmitted by the signal processing equipment and outputting a transmission detection judgment signal.

2. The transmitting and detecting circuit based on the analog-to-digital signal processing of the transceiving component of claim 1, wherein the rf transmitting channel and the rf receiving channel are respectively connected to a first power supply through an rf power switch circuit; wherein: and the radio frequency power supply switch circuit transmits a detection control signal to perform connection control through the signal processing equipment.

3. The transmitting and detecting circuit based on the analog-to-digital signal processing of the transceiving component of claim 1, further comprising a detecting circuit, wherein the detecting circuit is connected to the output end of the transmitting channel, detects the output signal, and returns the detection flag signal to the FPGA logic control circuit through the ADC module via the receiving channel.

4. The transmit-detector circuit based on the analog-to-digital signal processing of the transceiver module as claimed in claim 1, wherein said signal processing device comprises a detection control terminal and a transmission signal source; the detection control terminal is used for sending a detection control instruction to the FPGA logic control circuit and receiving a detection mark signal returned by the FPGA logic control circuit, and the transmission signal source is used for sending a transmission signal to the DAC module.

5. The transmitter-detector circuit based on transceiver module analog-to-digital signal processing as claimed in claim 1, wherein said ADC module comprises an ADC chip, an ADC power switch circuit and a second power supply; the ADC chip performs analog-to-digital conversion on the transmitted detection mark signal and transmits the detection mark signal to the FPGA logic control circuit; and the ADC power switch circuit controls the connection and the access of the ADC chip and a second power supply.

6. The transmit-detector circuit based on transceiver module analog-to-digital signal processing as claimed in claim 1, wherein said DAC module comprises a DAC chip, a DAC power switch circuit and a third power supply; the DAC chip receives a clock signal and a chip control signal sent by the signal processing equipment, converts a transmitted digital transmitting signal into an analog transmitting signal and transmits the analog transmitting signal to the radio frequency channel; and the DAC power switch circuit controls the connection and the access of the DAC chip and a third power supply.

7. The transmit-receive detector circuit based on analog-to-digital signal processing of the transmit-receive module of claim 1, wherein the transmit-receive switch receives a transmit-receive switching control signal from the signal processing device to control the access of the rf transmit channel and the rf receive channel to the transmit-receive antenna.

8. The transmit-detector circuit based on the analog-to-digital signal processing of the transceiver module as claimed in claim 7, wherein the detection control signal comprises a transmit-receive switching control signal TR and a transmit power switch control signal AM; the FPGA logic control circuit receives the detection mark signal sent by the radio frequency receiving channel according to the receiving and sending switching control signal TR and the transmitting power switch control signal AM.

Technical Field

The invention relates to the field of communication, in particular to a transmitting and detecting circuit based on the analog-digital signal processing of a receiving and transmitting assembly.

Background

When the transceiver module performs normal transmission operation, it needs to know whether the signal is really transmitted, and detection (amplitude demodulation) is the inverse process of amplitude modulation, and it can know whether the signal is transmitted through the antenna through detection operation.

At present, circuits for realizing detection are all analog circuits, and the detection circuit mainly comprises three parts, namely: a high-frequency modulated signal source, a nonlinear device and an RC low-pass filter. The output of such a detector will depend on the amplitude of the signal (without a defined threshold), and the amplitude of the modulated wave position signal will be uncertain when the transceiver module is transmitting normally, and the false alarm rate will be high if it is determined by the output of such a detector alone. Therefore, how to improve the accuracy of determining the success of signal transmission on the transceiver module is a technical problem that needs to be solved.

The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.

Disclosure of Invention

The invention mainly aims to provide a transmitting and detecting circuit based on the analog-digital signal processing of a receiving and transmitting assembly, and aims to solve the technical problem that the judgment accuracy of successful transmission of signals on the receiving and transmitting assembly is low in the prior art.

In order to achieve the above object, the present invention provides a transmission detector circuit based on analog-to-digital signal processing of a transceiver module, the transmission detector circuit comprising: the device comprises signal processing equipment, an FPGA logic control circuit, a DAC module, an ADC module, a radio frequency transmitting channel, a radio frequency receiving channel, a transmitting-receiving switch and a transmitting-receiving antenna; the first signal output end of the signal processing equipment is connected with the input end of a DAC module, the second signal output end of the signal processing equipment is connected with the first input end of an FPGA logic control circuit, the output end of the DAC module is connected with the input end of a radio frequency transmitting channel, the output end of the radio frequency receiving channel is connected with the input end of an ADC module, the output end of the ADC module is connected with the second input end of the FPGA logic control circuit, the output end of the FPGA logic control circuit is connected with the signal input end of the signal processing equipment, and the output end of the radio frequency transmitting channel and the input end of the radio frequency receiving channel are connected with a transmitting and receiving antenna through a; wherein:

preferably, the signal processing device transmits a transmitting signal for transmitting by the transmitting-receiving antenna to the DAC module through the first signal output terminal, and provides a transmitting detection control signal to the FPGA logic control circuit through the second signal output terminal, so as to implement a transmitting detection process in the transmitting-receiving component;

preferably, the radio frequency transmitting channel transmits signals via the transceiving antenna according to the received digital transmitting signals transmitted by the DAC module; the radio frequency receiving channel transmits the detection mark signal returned by the receiving channel to the ADC module, and the signal is processed by the FPGA logic control circuit;

preferably, the FPGA logic control circuit is connected to the ADC module and the signal processing device, and is configured to transmit the detection flag digital signal transmitted by the ADC module to the signal processing device, and receive the detection control signal transmitted by the signal processing device to output the emission detection decision signal.

Preferably, the radio frequency transmitting channel and the radio frequency receiving channel are respectively connected with a first power supply through a radio frequency power supply switch circuit; wherein: and the radio frequency power supply switch circuit transmits a detection control signal to perform connection control through the signal processing equipment.

Preferably, the transmitting detection circuit further comprises a detection circuit, the detection circuit is connected with the output end of the transmitting channel, detects the output signal, and returns the detection mark signal to the FPGA logic control circuit through the ADC module by the receiving channel.

Preferably, the signal processing device comprises a detection control terminal and a transmission signal source; the detection control terminal is used for sending a detection control instruction to the FPGA logic control circuit and receiving a detection mark signal returned by the FPGA logic control circuit, and the transmission signal source is used for sending a transmission signal to the DAC module.

Preferably, the ADC module includes an ADC chip, an ADC power switch circuit, and a second power supply; the ADC chip performs analog-to-digital conversion on the transmitted detection mark signal and transmits the detection mark signal to the FPGA logic control circuit; and the ADC power switch circuit controls the connection and the access of the ADC chip and a second power supply.

Preferably, the DAC module comprises a DAC chip, a DAC power switch circuit, and a third power supply; the DAC chip receives a clock signal and a chip control signal sent by the signal processing equipment, converts a transmitted digital transmitting signal into an analog transmitting signal and transmits the analog transmitting signal to the radio frequency channel; and the DAC power switch circuit controls the connection and the access of the DAC chip and a third power supply.

Preferably, the receiving and transmitting switch receives a receiving and transmitting switching control signal sent by the signal processing device, and controls the access of the radio frequency transmitting channel and the radio frequency receiving channel to the receiving and transmitting antenna.

Preferably, the detection control signal comprises a transmit-receive switching control signal TR and a transmit power switch control signal AM; the FPGA logic control circuit receives the detection mark signal sent by the radio frequency receiving channel according to the receiving and sending switching control signal TR and the transmitting power switch control signal AM.

According to the invention, by arranging the signal processing equipment, the FPGA logic control circuit, the DAC module, the ADC module, the radio frequency transmitting channel, the radio frequency receiving channel, the transmitting and receiving switch and the transmitting and receiving antenna, the signal processing equipment is used for transmitting a transmitting signal for transmitting the transmitting and receiving antenna to the DAC module through the first signal output end, and a transmitting and detecting control signal is provided for the FPGA logic control circuit through the second signal output end, so that a transmitting and detecting process in the transmitting and receiving component is realized; then, the radio frequency transmitting channel transmits signals through the receiving and transmitting antenna according to the received digital transmitting signals transmitted by the DAC module; the radio frequency receiving channel transmits the detection mark signal returned by the receiving channel to the ADC module, and the signal is processed by the FPGA logic control circuit; and finally, the FPGA logic control circuit is connected with the ADC module and the signal processing equipment and is used for transmitting the detection mark digital signal transmitted by the ADC module to the signal processing equipment and receiving the detection control signal transmitted by the signal processing equipment to output a transmission detection judgment signal. The invention is provided with a signal processing device for detecting control, a DAC module for carrying out radio frequency emission, an ADC module for returning a detection mark signal and an FPGA logic control circuit for judging and outputting a detection result on the basis of a radio frequency channel. The method aims to solve the technical problem that the judgment accuracy of successful transmission of signals on the transceiving component is not high in the prior art.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a transmitting and detecting circuit based on analog-to-digital signal processing of a transceiver module according to the present invention;

fig. 2 is a schematic operation step diagram of an embodiment of a transmitting and detecting circuit based on the analog-to-digital signal processing of the transceiver module according to the present invention.

The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.

Detailed Description

It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that all the directional indicators (such as up, down, left, right, front, and rear … …) in the embodiment of the present invention are only used to explain the relative position relationship between the components, the movement situation, etc. in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly.

In addition, the descriptions related to "first", "second", etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should be considered to be absent and not within the protection scope of the present invention.

The present invention provides an embodiment, referring to fig. 1, fig. 1 is a schematic structural diagram of a transmitting and detecting circuit based on analog-to-digital signal processing of a transceiver module according to the present invention.

As shown in fig. 1, in this embodiment, a transmission detector circuit based on analog-to-digital signal processing of a transceiver module includes: the device comprises signal processing equipment, an FPGA logic control circuit, a DAC module, an ADC module, a radio frequency transmitting channel, a radio frequency receiving channel, a transmitting-receiving switch and a transmitting-receiving antenna; the first signal output end of the signal processing equipment is connected with the input end of a DAC module, the second signal output end of the signal processing equipment is connected with the first input end of an FPGA logic control circuit, the output end of the DAC module is connected with the input end of a radio frequency transmitting channel, the output end of the radio frequency receiving channel is connected with the input end of an ADC module, the output end of the ADC module is connected with the second input end of the FPGA logic control circuit, the output end of the FPGA logic control circuit is connected with the signal input end of the signal processing equipment, and the output end of the radio frequency transmitting channel and the input end of the radio frequency receiving channel are connected with a transmitting and receiving antenna through a; wherein:

it should be noted that the signal processing device transmits a transmission signal for transmitting by the transceiving antenna to the DAC module through the first signal output terminal, and provides a transmission detection control signal to the FPGA logic control circuit through the second signal output terminal, so as to implement a transmission detection process in the transceiving component;

it should be noted that, the radio frequency transmitting channel transmits signals via the transceiving antenna according to the received digital transmitting signals transmitted by the DAC module; the radio frequency receiving channel transmits the detection mark signal returned by the receiving channel to the ADC module, and the signal is processed by the FPGA logic control circuit;

the FPGA logic control circuit is connected to the ADC module and the signal processing device, and is configured to transmit the detection flag digital signal transmitted by the ADC module to the signal processing device, and receive the detection control signal transmitted by the signal processing device to output a transmission detection decision signal.

Further, the radio frequency transmitting channel and the radio frequency receiving channel are respectively connected with a first power supply through a radio frequency power supply switch circuit; wherein: and the radio frequency power supply switch circuit transmits a detection control signal to perform connection control through the signal processing equipment.

Furthermore, the transmitting detection circuit also comprises a detection circuit, wherein the detection circuit is connected with the output end of the transmitting channel, detects the output signal and returns the detection mark signal to the FPGA logic control circuit through the ADC module through the receiving channel.

In another embodiment, the signal processing device comprises a detection control terminal and a transmission signal source; the detection control terminal is used for sending a detection control instruction to the FPGA logic control circuit and receiving a detection mark signal returned by the FPGA logic control circuit, and the transmission signal source is used for sending a transmission signal to the DAC module.

In this embodiment, the ADC module includes an ADC chip, an ADC power switch circuit, and a second power supply; the ADC chip performs analog-to-digital conversion on the transmitted detection mark signal and transmits the detection mark signal to the FPGA logic control circuit; and the ADC power switch circuit controls the connection and the access of the ADC chip and a second power supply.

In this embodiment, the DAC module includes a DAC chip, a DAC power switch circuit, and a third power supply; the DAC chip receives a clock signal and a chip control signal sent by the signal processing equipment, converts a transmitted digital transmitting signal into an analog transmitting signal and transmits the analog transmitting signal to the radio frequency channel; and the DAC power switch circuit controls the connection and the access of the DAC chip and a third power supply.

In this embodiment, the transceiving switch receives a transceiving switching control signal sent by the signal processing device, and controls the access of the radio frequency transmitting channel and the radio frequency receiving channel to the transceiving antenna.

Furthermore, the detection control signal comprises a receiving and sending switching control signal TR and a transmitting power switch control signal AM; the FPGA logic control circuit receives the detection mark signal sent by the radio frequency receiving channel according to the receiving and sending switching control signal TR and the transmitting power switch control signal AM.

It should be understood that, as shown in fig. 2, the transmission detection method of the present embodiment mainly includes the following steps:

s1, setting the transceiving function of a transceiving component to be controlled by control signals TR and AM:

TR is a receiving and transmitting switching control signal, and when TR is 1, switching to a transmitting state is indicated; when TR is 0, switching to a receiving state is indicated;

the AM is a control signal of a transmitting power switch, the transmitting power switch is turned on when the AM is 1, and the transmitting power switch is turned off when the AM is 0;

s2, before signal transmission, firstly enabling TR to be 1, switching to a transmission state, then enabling a control signal AM to be 1, turning on a transmission power switch, and starting signal transmission;

s3, when the signal is transmitted out through the radio frequency channel, the radio frequency channel can output a detection mark signal (if the mark signal is directly used as a final judgment result of transmission and detection, the judgment can be unstable and even wrong);

and S4, after the signal transmission is finished, firstly setting the AM to be 0, then setting the control signal TR to be 0, entering a receiving state, and waiting for the coming of the next transmission process.

And S5, executing a program running state machine by the controller (FPGA) according to the amplitude value of the transmission signal I/Q and the detection mark signal obtained in the S3, and finally outputting a transmission detection judgment signal.

In the embodiment of the present application, if the transmitting power supply is in the on state (AM ═ 1) and switches to the receiving state (TR ═ 0), in this case, the transmitting signal will wander in the transmitting channel, eventually burning the device, so this must be avoided; therefore, in the receiving state (TR ═ 0), the transmission power switch (AM ═ 0) must be turned off some time ahead (1 us in the embodiment of the present application).

In the receiving state, no signal is sent to the radio frequency channel through a digital-to-analog converter (DAC), and it is normal that the radio frequency channel does not output the emission detection mark signal in the receiving state. The procedure must therefore avoid the decision to transmit detect in the receive state.

To this end, we first set a fixed threshold d0 according to the bit width of the DAC, and on one hand, many experiments have proved that: if the digital-to-analog converter is sent to the DAC according to the value of d0 and is transmitted out through a radio frequency channel, the FPGA can receive a transmission detection mark signal; on the other hand, the I/Q values sent to the DAC in the receiving state are both 0, and the amplitude value cannot exceed d0, so that the judgment of emission detection in the receiving state is effectively avoided. In addition, to obtain a stable and correct final decision result, the number of detections needs to be accumulated, so the program uses a state machine to implement this process, specifically:

specifically, the implementation of step S5 includes the following steps:

s501, calculating(I_maxAnd Q_maxAre determined by the bit width of the DAC, I is 14 bits_max＝16384，Q_max＝16384，d0＝5793)。

S502, the program sets a detection counter, which sets a fixed initial value c0 (in this example, c0 is 40) when the power supply is reset.

S503. in the time of TR ═ 1 and AM ═ 1The controller (FPGA) calculates the amplitude value of the transmission data I/Q

S504. for each transmission, if d1> -d 0, the transmitted I/Q data is considered as valid detected data, and the program state machine will check the detection flag signal returned by the rf channel in the next state and count into the detection counter: c0+1 when the detection flag is detected (the detection counter sets the maximum detection count c1, in this example, c1 is equal to 250), and c0-1 when the detection flag is not detected (the detection counter sets the minimum detection count c2, in this example, c2 is equal to 10), until the transmission process is finished; if d1< d0, the transmitted I/Q data is considered invalid detected data, and the program state machine will remain in the current state until the end of the transmission (no matter what relationship between d1 and d0, the I/Q data is still transmitted normally).

And S505, when the system normally transmits (generally, multiple times of continuous transmission), if the detection counter value is lower than c2, judging that the transmission detection is fault, otherwise, judging that the transmission detection is normal.

In the embodiment of the present application, the specific transmission detection implementation principle of the transmission detection circuit based on the transceiver component detection flag signal processing is as follows:

the FPGA is arranged at the output end of an ADC in the transceiving component, the signal output by the ADC is processed, and the obtained signal is output to a signal processing device, wherein TR and AM signals are generated by a baseband processing device or an external device in the embodiment; the TR signal is used for controlling a receiving and transmitting change-over switch, and when the TR is 0, the receiving and transmitting change-over switch is switched to a receiving channel and is connected with a receiving and transmitting antenna; when TR is 1, the receiving and transmitting switch is switched to a transmitting channel to connect the transmitting channel with a receiving and transmitting antenna; in the whole embodiment, power is supplied by an external power supply, and except for the transmitting channel and the DAC, power is uniformly and directly supplied only after the transmitting and receiving assembly is started; the external power supply supplies power to the transmitting channel and the DAC through the transmitting power switch, and the on-off of the transmitting power switch is controlled by an AM signal; when AM is 1, the transmitting power switch is turned on, and when AM is 0, the transmitting power switch is turned off; in this embodiment, TR and AM signals generated by the signal processing device or the external device need to be transmitted to the FPGA at the same time.

The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.