Communication device and communication signal generation method

文档序号:1117349 发布日期:2020-09-29 浏览:6次 中文

阅读说明:本技术 通信装置及通信信号生成方法 (Communication device and communication signal generation method ) 是由 古贺久雄 米仓诚 池田浩二 于 2019-02-25 设计创作,主要内容包括:本发明提供用于自适应地进行有线电力线通信的通信装置和通信信号生成方法,通过该有线电力线通信获得满足用户的需要的期望通信特性。该通信装置设置有:选择单元,用于选择用以定义在规定的频带中准备的且要用于经由有线介质与其它通信装置进行的通信的一个或多个信道的数量的模式、以及该模式下所述通信所要使用的信道;以及信号处理单元,用于通过根据所选择的模式和信道对输入数据进行信号处理来生成所述通信所要使用的通信。(The present invention provides a communication apparatus and a communication signal generation method for adaptively performing wired power line communication by which desired communication characteristics satisfying the needs of a user are obtained. The communication device is provided with: a selection unit configured to select a mode for defining the number of one or more channels prepared in a prescribed frequency band and to be used for communication with other communication devices via a wired medium, and a channel to be used for the communication in the mode; and a signal processing unit for generating a communication to be used for the communication by performing signal processing on input data according to the selected mode and channel.)

1. A communication device, comprising:

a selection unit configured to select a mode for specifying the number of one or more channels prepared in a prescribed frequency band and to be used for communication with another communication apparatus via a wired medium, and a channel to be used for the communication in the mode; and

a signal processing unit for generating a communication frame to be used for the communication by performing signal processing on input data according to the selected mode and channel.

2. The communication device as set forth in claim 1,

wherein the signal processing unit performs the signal processing by sampling input data after multiplying a sampling period of the input data and resampling the sampled input data.

3. The communication device according to claim 2, wherein,

wherein the signal processing unit further performs the signal processing by performing processing to convert a frequency band of the resampled input data into a frequency band corresponding to the selected channel.

4. The communication device according to claim 3, wherein,

wherein the signal processing unit performs the signal processing by performing additional processing to resample the converted input data.

5. The communication device of any one of claims 1 to 4,

the selection unit also selects a clock frequency of the own device which can be multiplied; and

the signal processing unit performs the signal processing on the input data based on the selected clock frequency.

6. The communication device according to claim 1, further comprising a communication unit for communicating with the other communication device via a wired medium,

wherein the communication unit receives the transmission line information transmitted from the other communication apparatus using each of the one or more channels, and

the selection unit selects a channel to be used for communication between the own device and the other communication device based on the received transmission line information of each channel.

7. The communication device of claim 1, further comprising:

a first communication unit for communicating with the other communication apparatus via a wired medium; and

a second communication unit for communicating with an external apparatus via a wired medium, the external apparatus for determining a channel to be used for communication between the own device and the other communication device,

wherein the first communication unit receives transmission line information transmitted from the other communication apparatus using each of the one or more channels,

the second communication unit transmits the received transmission line information of each channel transmitted from the other communication apparatus to the external device, and receives, from the external device, information on a channel determined by the external device and to be used for the communication, an

The selection unit selects a channel to be used for the communication between the own device and the other communication device based on the received information on the channel to be used for the communication.

8. A communication signal generation method of a communication apparatus, the communication signal generation method comprising the steps of:

selecting a mode for specifying the number of one or more channels prepared in a specified frequency band and to be used for communication with other communication apparatuses via a wired medium, and a channel to be used for the communication in the mode; and

a communication frame to be used for the communication is generated by signal processing input data according to the selected mode and channel.

Technical Field

The present invention relates to a communication device and a communication signal generation method for generating a communication signal for wired power line communication.

Background

In a conventional standard technique of IEEE (institute of electrical and electronics engineers) 1901 as a communication standard related to power line communication such as high-speed power line communication, wired communication using wavelet OFDM (orthogonal frequency division multiplexing) is known (for example, refer to non-patent document 1). Such wired communication uses a single communication channel (hereinafter, simply referred to as "channel") having a frequency band (i.e., a frequency band of 2MHz to 30MHz) that can be used in high-speed power line communication.

Disclosure of Invention

Problems to be solved by the invention

However, there are problems as follows: depending on the situation of a wired transmission line between an electronic device capable of accommodating the above-described Power Line Communication (PLC) (hereinafter also referred to as "PLC device") and another PLC device as a communication partner, the desired communication characteristics may not be sufficiently obtained to the extent that they satisfy the user's demands due to the attenuation characteristics or noise characteristics of the communication signal using only the above-described single channel.

The concept of the present invention has been conceived in view of the above circumstances, and the present invention provides a communication apparatus and a communication signal generation method that adaptively perform wired power line communication to which a desired communication characteristic at a level satisfying a user demand is given.

Means for solving the problems

The present invention provides a communication device, comprising: a selection unit configured to select a mode for specifying the number of one or more channels prepared in a prescribed frequency band and to be used for communication with another communication apparatus via a wired medium, and a channel to be used for the communication in the mode; and a signal processing unit for generating a communication frame to be used for the communication by performing signal processing on input data according to the selected mode and channel.

The present invention also provides a communication signal generation method of a communication apparatus, the communication signal generation method including the steps of: selecting a mode for specifying the number of one or more channels prepared in a specified frequency band and to be used for communication with other communication apparatuses via a wired medium, and a channel to be used for the communication in the mode; and generating a communication frame to be used for the communication by signal processing the input data according to the selected mode and channel.

ADVANTAGEOUS EFFECTS OF INVENTION

The present invention makes it possible to adaptively perform wired power line communication to which a desired communication characteristic at a level satisfying a user demand is given.

Drawings

Fig. 1 is a block diagram showing an exemplary structure of a wired communication system according to a first embodiment.

Fig. 2 is a block diagram showing an exemplary hardware configuration of each PLC device according to the first embodiment.

Fig. 3 is an explanatory diagram schematically showing an example of how resampled data is distributed on the time axis and the frequency axis when the clock frequency is multiplied.

Fig. 4A is a table showing an example of available frequency ranges (f1 to f2), frequency bands (fc1 to fc2) of the respective channels, and frequency ranges (fr1 to fr2) of the sampled data.

Fig. 4B is a table showing examples of fc1, fc2, fr1, and fr2 corresponding to the case of 1 time the clock frequency and 1/2 mode and the case of 1 time the clock frequency and 1/4 mode, respectively.

Fig. 4C is a table showing examples of fc1, fc2, fr1, and fr2 corresponding to the case of the 2-times clock frequency and 1/2 mode and the case of the 2-times clock frequency and 1/4 mode, respectively.

Fig. 4D is a table showing examples of fc1, fc2, fr1, and fr2 corresponding to the case of the 4-times clock frequency and 1/2 mode and the case of the 4-times clock frequency and 1/4 mode, respectively.

Fig. 5 is a flowchart showing an exemplary operation procedure of digital signal processing by each PLC device according to the first embodiment.

Fig. 6 is an explanatory diagram showing an exemplary method of frequency-shifting resampled data.

Fig. 7 is an explanatory diagram outlining an example of the processing of step St4 corresponding to the case of the 1/2 mode and the channel CH 1.

Fig. 8 is an explanatory diagram outlining an example of the processing of step St4 corresponding to the case of the 1/2 mode and the channel CH 2.

Fig. 9 is an explanatory diagram outlining an example of the processing of step St4 corresponding to the case of the 1/4 mode and the channel CH 1.

Fig. 10 is an explanatory diagram outlining an example of the processing of step St4 corresponding to the case of the 1/4 mode and the channel CH 2.

Fig. 11 is an explanatory diagram outlining an example of the processing of step St4 corresponding to the case of the 1/4 mode and the channel CH 3.

Fig. 12 is an explanatory diagram outlining an example of the processing of step St4 corresponding to the case of the 1/4 mode and the channel CH 4.

Fig. 13A is a flowchart showing a first exemplary operation procedure related to channel selection followed by a PLC parent device according to the first embodiment.

Fig. 13B is a flowchart illustrating a first exemplary operational procedure related to channel selection followed by the PLC sub-apparatus according to the first embodiment.

Fig. 14A is a flowchart showing an exemplary operational procedure relating to channel selection by the control apparatus employed in the first embodiment.

Fig. 14B is a flowchart showing a second exemplary operation procedure relating to channel selection by the PLC parent device according to the first embodiment.

Fig. 14C is a flowchart showing a second exemplary operation procedure relating to channel selection by the PLC sub-apparatus according to the first embodiment.

Detailed Description

Embodiments of a communication apparatus and a communication signal generation method according to the present invention disclosed in a specific manner will be described in detail with reference to the accompanying drawings as necessary. However, unnecessary detailed description may be avoided. For example, detailed descriptions of already well-known items and repetitive descriptions of substantially the same constituent elements as those already described may be omitted. This is to prevent the following description from becoming unnecessarily redundant, thereby facilitating understanding by those skilled in the art. The following description and drawings are provided to enable those skilled in the art to better understand the present invention and are not intended to limit the subject matter recited in the claims.

Fig. 1 is a block diagram showing an exemplary structure of a wired communication system 1000 according to the first embodiment. For example, the wired communication system 1000 is configured to include three PLC (power line communication) devices 10A, 10B, and 10C and the control apparatus 50. In the wired communication system 1000, the number of installed PLC devices 10 (each of which is an example of the term "communication device") is not limited to three.

The control apparatus 50 is connected to a PLC device 10 (for example, PLC device 10A) having the role of a parent device of the power line communication among the three PLC devices 10A, 10B, and 10C through a communication cable LN1, and can perform wired communication (for example, LAN (local area network) communication) with the parent PLC device 10. On the other hand, in the wired communication system 1000 shown in fig. 1, the control apparatus 50 is not connected to the PLC devices 10 (for example, the PLC devices 10B and 10C) each having the role of a sub-device of the power line communication among the three PLC devices 10A, 10B, and 10C through the communication cable LN1, and thus cannot perform wired communication (communication described above) with the sub-PLC devices 10. As with the parent device, the PLC devices 10 (for example, PLC devices 10B and 10C) serving as child devices may be connected to the control apparatus 50 through a communication cable LN 1. Alternatively, the control apparatus 50 may communicate with all or part of the three PLC devices 10A, 10B, and 10C by wireless communication.

In the wired communication system 1000, a plurality of PLC devices 10 are connected to a wired medium (e.g., power line 1A) to enable power line communication. For example, in fig. 1, each of the three PLC devices 10A, 10B, and 10C can perform power line communication with other PLC devices (an example of the term "other communication device"). As described later in detail with reference to fig. 2, the internal structures of the PLC devices 10A, 10B, and 10C are the same. In the following description, the PLC devices 10A, 10B, and 10C are generally referred to as "PLC device 10" in the case where the PLC devices 10A, 10B, and 10C are not distinguished from each other particularly in operation (processing). The PLC device 10 can perform power line communication in accordance with a communication standard such as IEEE (institute of electrical and electronics engineers) 1901.

For example, each PLC device 10 is a PLC modem or an electronic device including a PLC modem. Such electronic equipment may include any one of home appliances such as a television receiver, a telephone, a video rotating disk device (deck), or a set-top box, or office equipment such as a Personal Computer (PC), a facsimile machine, or a printer. Alternatively, each PLC device 10 may include infrastructure equipment such as an intercom, an automatic door locking system, a smart meter, an in-building energy management system, an in-factory energy management system, or a demand response compatible device, or IoT (internet of things) equipment such as an intelligent street light, a security camera (in other words, a surveillance camera), an air conditioning control device, a lighting control device, or a sensor device.

Therefore, it is assumed as an exemplary use of each PLC device 10 according to the first embodiment that a high-speed power line communication is required to meet the needs of a user (e.g., a customer) of the PLC device 10, that a power line communication capable of a long-distance communication is required, and that both of them are required. Each PLC device 10 according to the first embodiment can perform power line communication that can accommodate the above-described arbitrary use, and can realize wired communication that meets user needs, is comfortable to use, and has high expandability.

As described in detail later, the control apparatus 50 determines a communication channel (hereinafter simply referred to as "channel") to be used when each PLC device 10 performs power line communication. The control device 50 is configured using, for example, a Personal Computer (PC), and data based on a signal transmitted from a mouse or a keyboard capable of receiving a user operation can be input to the control device 50. The control apparatus 50 is configured to include a communication interface 51, a memory 52, a processor 53, an input/output interface 54, and a storage device 55.

The communication interface 51 is configured using a communication circuit that performs wired communication with the PLC device 10A as a PLC parent device and transmits and receives data or information with respect to the PLC device 10A. In fig. 1, the communication interface 51 is abbreviated as "communication I/F" to simplify the expression.

The memory 52 is configured using, for example, a RAM (random access memory) and a ROM (read only memory), and holds programs and data necessary for the operation of the control device 50, and also temporarily holds data or information generated during the operation of the control device 50. The RAM is a work memory used, for example, during operation of the control device 50. The ROM stores and holds, for example, programs and data for controlling the control device 50 in advance. The ROM holds a program having an algorithm for determining a channel (described later) to be used by the PLC device 10 when performing power line communication (in other words, determines a program written according to such an algorithm).

The processor 53 is configured using a CPU (central processing unit), an MPU (micro processing unit), a DSP (digital signal processor), or an FPGA (field programmable gate array). Serving as a controller that controls the operation of the control apparatus 50, the processor 53 performs control processing for monitoring the operation of each unit of the control apparatus 50, data input/output processing, data operation (calculation) processing, and data storage processing with each unit of the control apparatus 50 in a centralized manner. The processor 53 operates according to programs and data stored in the memory 52. The processor 53 uses the memory 52 during its operation, and may temporarily store data or information generated or obtained by the processor 53 in the memory 52.

The input/output interface 54 receives data based on a signal transmitted from a device capable of receiving a user operation of the above-described mouse or keyboard, and outputs the data held in the memory 52 to an external device (not shown) connected to the control device 50. In fig. 1, the input/output interface 54 is abbreviated as "input/output I/F" to simplify the expression.

The storage device 55 is configured using a semiconductor memory such as a flash memory, an HDD (hard disk drive), or an SSD (solid state drive), and records data or information generated or acquired by the processor 53. Details of the operation of the control device 50 will be described later with reference to fig. 14A, 14B, and 14C.

Fig. 2 is a block diagram showing an exemplary hardware configuration of each PLC device 10 according to the first embodiment. The PLC device 10 is configured to include a switching power supply 20 and a circuit module 30.

The switching power supply 20 supplies DC voltages (e.g., +1.2V, +3.3V, and +12V) suitable as driving power supplies for the respective loads to the various loads in the circuit module 30. For example, the switching power supply 20 includes a switching transformer (not shown) and a DC-DC converter (not shown). The power of the switching power supply 20 is supplied from the power connector 21 via an upper impedance (impedance upper)27 and an AC-DC converter 24. In fig. 2, the AC-DC converter 24 is abbreviated as "AC/DC" to simplify the expression. For example, the power connector 21 is provided on the back surface of the main body 100 of the PLC device 10.

The circuit module 30 is configured to include a main IC (integrated circuit) 11, an AFE IC (analog front end integrated circuit) 12, a Low Pass Filter (LPF)13, a driver IC 15, a coupler 16, a Band Pass Filter (BPF)17, and a memory 18. The circuit module 30 further includes a wired PHY IC (physical layer integrated circuit) 19 capable of accommodating wired communication of Ethernet (registered trademark) or the like, and an AC cycle detector 60.

The coupler 16 is connected to a power supply connector 21 (an example of the term "first communication unit"), and is also connected to the power line 1A via a power supply cable 1B, a power plug 25, and a receptacle 2. An LED (light emitting diode) 23 operating as a display unit of the PLC device 10 is connected to the main IC 11. LAN cables 26 for connecting to various devices (e.g., personal computers such as the control device 50) are connected to the modular jack 22 (an example of the term "second communication unit"). For example, modular jack 22 is disposed on the back of body 100. For example, the LED 23 is disposed on the front surface of the main body 100.

The host IC 11 (an example of the term "communication device") includes a CPU 11A, PLC MAC (power line communication medium access control layer) blocks 11C1 and 11C2, and PLC PHY (power line communication physical layer) blocks 11B1 and 11B 2.

For example, the CPU 11A is provided with a 32-bit RISC (reduced instruction set computer) type processor. The PLC MAC block 11C2 manages a MAC layer (medium access control layer) that transmits signals (e.g., manages execution of selection (determination) of a channel (described later)). The PLC MAC block 11C1 manages the MAC layer of the received signal. The PLC PHY block 11B2 manages a PHY layer (physical layer) of a transmission signal (e.g., manages execution of frequency multiplication and resampling of a clock signal (described later)). The PLC PHY block 11B1 manages the PHY layer (physical layer) of the received signal.

The AFE IC 12 includes a DA converter (DAC: digital-to-analog converter) 12A, AD converter (ADC: analog-to-digital converter) 12D and Variable Gain Amplifiers (VGAs) 12B and 12C.

Coupler 16 includes a coil transformer 16A and coupling capacitors 16B and 16C. The CPU 11A controls the operations of the PLC MAC blocks 11C1 and 11C2 and the PLC PHY blocks 11B1 and 11B2 while referring to the data or information stored in the memory 18 and controls the entire PLC device 10.

In the example of fig. 2, the PLC device 10 has the PLC MAC block 11C1 and the PLC PHY block 11B1 as reception blocks, and also has the PLC MAC block 11C2 and the PLC PHY block 11B2 as transmission blocks. Alternatively, the PLC device 10 may include a PLC MAC block 11C and a PLC PHY block 11B (shown by dotted lines in fig. 2) for both transmission and reception.

PLC MAC blocks 11C1 and 11C2 may be collectively referred to as PLC MAC block 11C, and PLC PHY blocks 11B1 and 11B2 may be collectively referred to as PLC PHY block 11B.

The main IC 11 is an electric circuit (LSI: large scale integration) that performs signal processing including, for example, basic control for data communication or modulation and demodulation, as in a commonly known modem. For example, the main IC 11 modulates various digital signal processes (e.g., clock multiplication, resampling in frequency shift, and resampling (described later)) and modulation of data received from a communication terminal (e.g., a PC) via the modular jack 22, and outputs a digital transmission signal (an example of the term "communication frame") generated by the digital signal processes to the AFE IC 12. Further, the main IC 11 demodulates the reception signal by performing digital signal processing on the signal received from the power line 1A via the AFE IC 12, and outputs the demodulated reception signal to a communication terminal (for example, PC) via the modular jack 22.

The AC cycle detector 60 generates a synchronization signal required for the PLC devices 10 to operate in synchronization with each other. The AC cycle detector 60 includes a diode bridge 60a, resistors 60b and 60c, a DC (direct current) power supply unit 60e, and a capacitor 60 d.

The diode bridge 60a is connected to a resistor 60 b. The resistor 60b is connected in series to the resistor 60 c. The connection point between the resistors 60b and 60c is connected to one terminal of the capacitor 60 d. The DC power supply unit 60e is connected to the other terminal of the capacitor 60 d.

More specifically, the AC cycle detector 60 generates the synchronization signal in the following manner. The AC cycle detector 60 detects a zero-cross point of an AC power waveform AC (i.e., an AC waveform of a sine wave of 50Hz or 60 Hz) of the commercial power supply supplied to the power line 1A, and generates a synchronization signal using the timing of the zero-cross point as a reference. An exemplary synchronization signal is a rectangular wave composed of a plurality of pulses synchronized with the zero crossings of the AC power waveform. The AC cycle detector 60 may be omitted. In this case, in order to synchronize the operation of the PLC device 10, for example, a synchronization signal included in a communication signal transmitted from an external device is used.

For example, the PLC device 10 generally performs power line communication as follows.

For example, at the time of transmission, data input from the modular jack 22 is transmitted to the host IC 11 via the wired PHY IC 19 compatible with Ethernet (registered trademark), and then digital signal processing (for example, at least resampling in clock frequency multiplication, resampling, and frequency shift (described above)) is performed on the data, thereby generating a digital transmission signal. The generated digital transmission signal is converted into an analog transmission signal by the DA converter 12A of the AFEIC 12. The converted analog transmission signal is output to the power line 1A via the low-pass filter 13, the driver IC 15, the coupler 16, the power connector 21, the power cable 1B, the power plug 25, and the socket 2.

As another example, at the time of reception, the reception signal supplied and received from the power line 1A is sent to the band-pass filter 17 via the coupler 16, subjected to gain adjustment by the variable gain amplifier 12C of the AFE IC 12, and then converted into a digital reception signal by the AD converter 12D. The converted digital signal is sent to the host IC 11, and is converted into digital data by digital signal processing in the host IC 11. The converted digital data is output from the modular jack 22 via the wired PHY IC 19 compatible with Ethernet (registered trademark).

Next, digital signal processing (e.g., clock doubling, resampling, and frequency shifting) by the host IC 11 of the PLC device 10 will be described with reference to FIGS. 3-12.

Fig. 3 is an explanatory diagram schematically showing an example of how resampled data is distributed on the time axis and the frequency axis when the clock frequency is multiplied. The PLC device 10 (for example, the PLC device 10A) according to the first embodiment uses a predetermined frequency band (for example, 2MHz to 30MHz) specified in the communication standard of IEEE 1901 in wired communication with another PLC device 10 (for example, the PLC device 10B) on the power line 1A. According to the communication standard of IEEE 1901, the PLC device 10 can perform power line communication that obtains a throughput of about 240Mbps by using a frequency band of 2MHz to 30MHz as one channel (i.e., as a standard mode), for example.

The PLC device 10 according to the first embodiment can perform faster power line communication by multiplying the clock frequency (in other words, the sampling frequency) used in the above-described standard mode (in other words, a mode in which 1 time of the clock frequency (for example, 62.5MHz) is used without multiplying the clock frequency).

For simplicity of description, the following description will be made using 2MHz to 28MHz as an exemplary frequency range that can be used for power line communication by the PLC device 10. For convenience, assume that the lower limit f1 of the available frequency range is 2 MHz. Also, for convenience, it is assumed that the upper limit f2 of the usable frequency range is 28 MHz. In the following description, "f 2-28 MHz" may be read as "f 2-30 MHz".

In fig. 3, the horizontal axes of four graphs arranged in the vertical row on the left side of the paper surface represent time, and the horizontal axes of four graphs arranged in the vertical row on the right side of the paper surface represent frequency. That is, the four diagrams arranged in the vertical row on the left side of the paper each show a component on the time axis of data to be resampled by the PLC PHY block 11B2 of the main IC 11 (hereinafter referred to as "resampled data"). Also, the four diagrams arranged in the vertical row on the right side of the paper each show a component on the frequency axis of data to be resampled by the PLC PHY block 11B2 of the main IC 11 (hereinafter referred to as "resampled data").

That is, in the second part (from the top) of fig. 3, a set of components of resampled data on the time axis and the frequency axis for comparison in the case where 1 time clock frequency obtained without clock doubling is shown on the left and right sides of the paper. Also, in the third section of fig. 3, a set of components of resampled data on the time axis and the frequency axis for the case of 2 times clock multiplication is shown on the left and right sides of the paper for comparison. Also, in the fourth section (bottom) of fig. 3, a set of components of resampled data on the time axis and the frequency axis for the case of 4-times clock multiplication is shown on the left and right sides of the paper for comparison.

As shown in the top and second parts of fig. 3, the resampled data Dt1 has components with frequencies f11 (fr 11-2 MHz) to f21 (fr 21-28 MHz) without clock doubling (i.e., 1 clock frequency 62.5 MHz). The frequency component of the resampled data Dt1 is below the Nyquist frequency (fs1/2) where fs1 is the sampling frequency without clock doubling and is 62.5 MHz. The frequency fr11 is a lower limit of the frequency component of the resampled data Dt1 without clock multiplication and is, for example, 2 MHz. The frequency fr21 is an upper limit of the frequency component of the resampled data Dt1 without clock multiplication and is, for example, 28 MHz.

Similarly, as shown in the third part of fig. 3, when 2-time clock multiplication (i.e., 125MHz that is 2 times the clock frequency 62.5MHz) is performed, the resampled data Dt2 has components with frequencies fr12(═ 2 × fr11 ═ 4MHz) to fr22(═ 2 × fr21 ═ 56 MHz). The frequency component of the resampled data Dt2 is lower than the nyquist frequency (fs2/2) where fs2 is the sampling frequency in the case of 2 times the clock multiple and is 125 MHz. The frequency fr12 is a lower limit of the frequency component of the resampled data Dt2 in the case of 2 times the clock frequency multiplication and is, for example, 4 MHz. The frequency fr2 is an upper limit of the frequency component of the resampled data Dt2 in the case of 2 times the clock frequency multiplication and is, for example, 56 MHz. In addition, since the subcarriers used in the power line communication are predetermined, not only the lower limit frequency of the frequency range but also the upper limit of the frequency range is changed by 2 times clock multiplication, as in f12 and f 22.

Similarly, as shown in the bottom of fig. 3, when 4-time clock multiplication is performed (i.e., 250MHz that is 4 times the clock frequency 62.5MHz), the resampled data DT4 has components with frequencies from fr13(═ 4 × fr11 ═ 8MHz) to fr23(═ 4 × fr21 ═ 112 MHz). The frequency component of the resampled data Dt3 is lower than the nyquist frequency (fs3/2) where fs3 is the sampling frequency in the case of 4 times the clock frequency and is 250 MHz. The frequency fr13 is a lower limit of the frequency component of the resampled data DT4 in the case of 4 times clock multiplication and is, for example, 8 MHz. The frequency fr23 is an upper limit of the frequency component of the resampled data DT4 in the case of 4 times clock multiplication and is 112MHz, for example. Also, since the subcarriers used in the power line communication are predetermined, not only the lower limit frequency of the frequency range but also the upper limit of the frequency range is changed by 4 times the clock multiplication, as in f13 and f 23.

Fig. 4A is a table showing an example of available frequency ranges (f1 to f2), frequency bands (fc1 to fc2) of the respective channels, and frequency ranges (fr1 to fr2) of the sampled data. Fig. 4B is a table showing examples of fc1, fc2, fr1, and fr2 corresponding to the case of 1 time the clock frequency and 1/2 mode and the case of 1 time the clock frequency and 1/4 mode, respectively. Fig. 4C is a table showing examples of fc1, fc2, fr1, and fr2 corresponding to the case of the 2-times clock frequency and 1/2 mode and the case of the 2-times clock frequency and 1/4 mode, respectively. Fig. 4D is a table showing examples of fc1, fc2, fr1, and fr2 corresponding to the case of the 4-times clock frequency and 1/2 mode and the case of the 4-times clock frequency and 1/4 mode, respectively.

For example, tables TBL1, TBL2, TBL3, and TBL4 shown in fig. 4A, 4B, 4C, and 4D may each be maintained in memory 18. As shown in fig. 4A, in the case where clock frequency multiplication is not performed, the frequency range that can be used in power line communication is f1(═ 2MHz) to f2(═ 28MHz), the lower limit and the upper limit of the frequency band of the channel are represented by fc11 and fc21, respectively, and the lower limit and the upper limit of the frequency range of the resampled data are represented by fr11 and fr21, respectively.

When the 2-time clock multiplication is performed, the frequency range that can be used in the power line communication is f1(═ 2MHz) to f2(═ 56MHz), the lower limit and the upper limit of the channel band are represented by fc12 and fc22, respectively, and the lower limit and the upper limit of the frequency range of the resampled data are represented by fr12 and fr22, respectively.

When the 4-time clock multiplication is performed, the frequency range that can be used in the power line communication is f1(═ 2MHz) to f2(═ 112MHz), the lower limit and the upper limit of the frequency band of the channel are represented by fc13 and fc23, respectively, and the lower limit and the upper limit of the frequency range of the resampled data are represented by fr13 and fr23, respectively.

As shown in fig. 4B, in the case where clock multiplication is not performed and the mode is a mode (1/2 mode or 1/4 mode) of power line communication capable of accommodating long-distance communication, the lower limit and the upper limit of the frequency band of each channel and the lower limit and the upper limit of the frequency range of resampled data in each mode can be calculated according to equations (1) and (2) (described later). These calculations are made, for example, by the PLCPHY block 11B 2. The results of these limits calculations may be maintained in the table TBL2 shown in fig. 4B. In formula (1) and formula (2), fs1 is equal to 62.5 MHz. In equations (1) to (6), X is a number indicating a mode, and Y is a number indicating a channel (normal number). For example, for the first channel CH1 of the two channels formed in the 1/2 pattern, X and Y are equal to "2" and "1", respectively.

In the following description, the 1/2 mode is a mode in which two channels are formed in the frequency range f1 to f2 that can be used in power line communication so that the communication distance of the power line communication is longer than that of the standard mode (for example, the communication distance is increased by 1.5 times with respect to the standard mode). Also, the 1/4 mode is a mode in which four channels are formed in the frequency range f1 to f2 usable in power line communication so that the communication distance of power line communication is longer than that of the standard mode (for example, the communication distance is increased by 2 times with respect to the standard mode).

[ formula 1]

[ formula 2]

As shown in fig. 4C, in the case where clock multiplication (2 times) is performed and the mode is a power line communication mode (1/2 mode or 1/4 mode) capable of accommodating long-distance communication, the lower limit and the upper limit of the frequency band of each channel and the lower limit and the upper limit of the frequency range of resampled data in each mode can be calculated according to expressions (3) and (4) (described later). These calculations are performed by, for example, PLC PHY block 11B 2. The results of these limits calculations may be maintained in the table TBL3 shown in fig. 4C. In formula (3) and formula (4), fs2 is equal to 125(═ 2 × 62.5) MHz.

[ formula 3]

Figure BDA0002633945320000123

[ formula 4]

As shown in fig. 4D, in the case where clock multiplication (4 times) is performed and the mode is a power line communication mode (1/2 mode or 1/4 mode) capable of accommodating long-distance communication, the lower and upper limits of the frequency band of each channel and the lower and upper limits of the frequency range of resampled data in each mode can be calculated from expressions (5) and (6) (described later). These calculations are performed by, for example, PLC PHY block 11B 2. The results of these limits calculations may be maintained in the table TBL4 shown in fig. 4D. In formula (5) and formula (6), fs3 is equal to 250(═ 4 × 62.5) MHz.

[ formula 5]

[ formula 6]

Next, an operation procedure of the digital signal processing by the PLC device 10 according to the first embodiment will be described with reference to fig. 5. Fig. 5 is a flowchart showing an exemplary overall operation procedure of the PLC device 10 according to the first embodiment.

Referring to fig. 5, the PLC device 10 selects a sampling frequency (X times; X is one of 1, 2, and 4) (St 1). That is, by determining the sampling frequency (X times), the PLC device 10 determines the clock frequency corresponding to the determined sampling frequency. The PLC device 10 performs various digital signal processing (described later) according to the determined clock frequency. Although X is selected in 1, 2 or 4, these numbers are examples only. At step St1, a selection is made, for example, by the PLC MAC block 11C 2.

As described in detail later, for example (St2), the PLC device 10 selects a mode used in the power line communication based on the transmission line information transmitted from the other PLC communication device. That is, the PLC device 10 determines the number (Y: 1, 2, or 4) of channels to be prepared (i.e., formed) within the frequency range that can be used in the power line communication. Although Y is selected here in 1, 2 and 4, these numbers are only examples. In step St2, selection is made, for example, by the PLC MAC block 11C 2.

The PLC device 10 selects a channel (for example, one of CH1, CH2, CH3, and CH 4) used in power line communication with other PLC devices based on the mode (for example, 1/4 mode) selected in step St2 (St 3). That is, the PLC device 10 determines which of the channels prepared corresponding to the mode selected in step St2 should be selected for the power line communication. For example, in step St3, selection is made by the PLC MAC block 11C 2.

After step St3, the PLC device 10 performs various digital signal processes according to the modes and channels selected at steps St2 and St3, respectively, using the sampling frequency selected at step St1 (St 4). At step St4, various digital signal processing is performed, for example, by the PLC PHY block 11B 2.

More specifically, the PLC device 10 multiplies the sampling frequency (in other words, the clock frequency) selected at step St1, and operates according to the multiplied sampling frequency. The PLC device 10 multiplies the sampling period for sampling the multiplied data (i.e., the resampled data that has been input to the main IC 11) according to the pattern selected at step St2 (St 4-1).

The PLC device 10 upsamples (for example, 2 times upsampling) the resampled data whose sampling period is multiplied at step St4-1 according to the pattern selected at step St2 (St 4-2).

The PLC device 10 performs filter processing on the resampled data sampled at step St4-2 according to the channel selected at step St3, thereby acquiring resampled data having components in the frequency band of the selected channel (St 4-3). In the first embodiment, steps St4-2 and St4-3 are collectively referred to as "resampling".

After performing step St4-3, if necessary, the PLC device 10 performs frequency shift (in other words, frequency conversion) processing to convert the frequency components of the resampled data acquired at step St4-3 into the frequency band of the selected channel selected at step St3 (St 4-4). After performing step St4-4, the PLC device 10 may resample the resampled data having passed step St4-4 according to the pattern and channel selected in steps St2 and St3, respectively (i.e., the same processing as that of steps St4-2 and St 4-3).

The PLC device 10 can generate a communication frame conforming to a prescribed format for power line communication by performing the digital signal processing of step St 4. In addition, for example, each communication frame used in the power line communication of the PLC device 10 has a structure including a preamble, a frame control, and a frame body. The communication frame is formed to have a desired configuration in the time domain and the frequency domain. The data of the preamble has a fixed value (e.g., all "1"). For example, data of the preamble is used for carrier detection, synchronization, and demodulation. The data of the frame control and the data of the frame body have uncertain values.

Fig. 6 is an explanatory diagram showing an exemplary method of frequency shifting to be performed on resampled data. For example, the PLC device 10 according to the first embodiment uses, as the frequency shift performed on the resampled data, a process of subjecting the resampled data to Hilbert (Hilbert) conversion (i.e., removing negative frequency components) and then multiplying by a carrier. The hilbert transform processing shown in fig. 6 is performed by, for example, the PLC PHY block 11B 2.

As shown in fig. 6, in the hilbert transform, a signal y (t) (St11) is generated by delaying the phase of a real signal x (t) having a real part by pi/2. The real signal x (t) and the signal y (t) generated at step St11 are multiplied by a complex coefficient j (St12), and the multiplication result signal jy (t) is added to the real signal x (t), thereby generating a complex signal z (t) (St 13). The complex signal z (t) is called analytic signal and has no negative frequency components.

The real part (Re) is extracted from the result of the product between the complex signal z (t) generated at step St13 and the carrier exp (j ω t) (St 14). Thus, a real signal, i.e. frequency shifted resampled data with only a real part, is generated. As shown in detail in fig. 6, the result of the product between the real signal x (t) and the real part of the carrier exp (j ω t) (see St14-1) and the result of the product between the signal y (t) and the imaginary part of the carrier exp (j ω t) (see St14-2) are added together (St 14-3). Thus, a real signal, i.e. frequency shifted resampled data with only a real part, is generated.

In addition, the PLC device 10 may generate resampled data in the frequency band of the channel selected in step St3 using other frequency shift methods not using the hilbert transform (see fig. 6). For example, the PLC device 10 may generate resampled data suitable for the frequency band of the channel selected at step St3 by removing unnecessary frequency components by performing a method similar to that used when generating a high-frequency signal in ordinary wireless communication (for example, performing filter processing on a product result between a baseband signal and a carrier).

Fig. 7 is an explanatory diagram outlining a processing example of step St4 corresponding to the case of the 1/2 mode and the channel CH 1. Fig. 8 is an explanatory diagram outlining a processing example of step St4 corresponding to the case of the 1/2 mode and the channel CH 2.

In fig. 7 and 8, the flowchart shown on the leftmost side of the paper is the extraction part of the flowchart shown in fig. 5. A diagram showing time axis components of four resampled data is arranged in the vertical row in the middle part of the paper surface in the same manner as fig. 3. The graphs showing the frequency axis components of the four resampled data are arranged in the right-most wales of the paper surface in the same manner as fig. 3. Two sets of graphs are shown for comparison.

In the example of fig. 7, no clock multiplication is performed, so the sampling frequency fs4 is equal to 62.5 MHz. For example, when 2-time clock multiplication is performed, the sampling frequency fs4 becomes 62.5MHz × 2 — 125 MHz. For another example, when 4 times clock multiplication is performed, the sampling frequency fs4 becomes 62.5MHz × 4 — 250 MHz. The sampling frequency corresponding to other types of clock multiples is determined in a similar manner.

As shown in fig. 7, when the sampling period is doubled (St4-1), a change is made from resampled data ReD2 in a frequency range lower than the nyquist frequency (═ fs4/2) (more specifically, fr1(═ 4 MHz; see fig. 4B) to fr2(═ f2 ═ 28MHz)) to resampled data ReD21 having a frequency component f1(═ 2 MHz; see fig. 4B) to fc2(═ 14 MHz; see fig. 4B). The Nyquist frequency becomes fs 5/2. The frequency fs5(═ fs4/2) equals 31.25 MHz. For example, resampled data ReD21 has data corresponding to subcarrier numbers 10-100.

After step St4-1, a 2-fold upsampling is performed (St 4-2). For example, the PLC PHY block 11B2 performs a process of inserting 0 into the resampled data ReD 21. As a result, resampled data ReD215m, which is a folded version of resampled data ReD21, is generated on the opposite side (i.e., the high frequency side) of nyquist frequency fs5/2 with respect to resampled data ReD 21. "data" in fig. 7-12 represents folded resampled data. The Nyquist frequency becomes fs 4/2. The folded resampled data ReD215m has data obtained by inverting the arrangement of data corresponding to subcarrier numbers 10 to 100 of the resampled data ReD21 in the left-right direction (i.e., data corresponding to the subcarrier numbers 100 to 10).

After step St4-2, a filtering process using a low-pass filter is performed (St 4-3). For example, the high-frequency-side folded resampled data ReD215m is truncated by a low-pass filter (not shown) included in the PLC PHY block 11B 2. As a result, resampled data ReD21 included in the frequency bands (fc1 to fc2) of the channel CH1 is generated. The Nyquist frequency remains equal to fs4/2, the frequency before the start of step St 4-1. As a result, by performing steps St4-1, St4-2, and St4-3, the PLC device 10 can generate a digital transmission signal capable of achieving desired power line communication satisfying the user's demand, because the PLC device 10 can generate resampled data suitable for the mode and channel selected at steps St2 and St3, respectively, while satisfying the condition that should be in a frequency band lower than the nyquist frequency used for power line communication.

In the example of fig. 8, no clock multiplication is performed, so the sampling frequency fs4 is equal to 62.5 MHz.

As shown in fig. 8, when the sampling period is doubled (St4-1), a change is made from resampled data ReD2 in a frequency range lower than the nyquist frequency (═ fs4/2) (more specifically, fr1(═ 4 MHz; see fig. 4B) to fr2(═ f2 ═ 28MHz)) to resampled data ReD21 having frequency components of f1(═ 2 MHz; see fig. 4B) to fc2(═ 14 MHz; see fig. 4B). The Nyquist frequency becomes fs 5/2. For example, resampled data ReD21 has data corresponding to subcarrier numbers 10-100.

After step St4-2, a 2-fold upsampling is performed (St 4-2). For example, the PLC PHY block 11B2 performs a process of inserting 0 into the resampled data ReD 21. As a result, resampled data ReD215m, which is a folded version of resampled data ReD21, is generated on the opposite side (i.e., the high frequency side) of nyquist frequency fs5/2 with respect to resampled data ReD 21. The Nyquist frequency becomes fs 4/2.

After step St4-2, a filtering process using a low-pass filter is performed (St 4-3). For example, the high-frequency-side folded resampled data ReD215m is truncated by a low-pass filter (not shown) included in the PLC PHY block 11B 2. As a result, resampled data ReD21 included in the frequency bands (fc1 to fc2) of the channel CH1 is generated. The Nyquist frequency remains equal to fs4/2, the frequency before the start of step St 4-1.

Further, after step St4-3, the frequency shift (frequency conversion) process described above with reference to FIG. 6 is performed (St 4-4). For example, the PLC PHY block 11B2 generates the resampled data ReD21f by performing calculation according to equation (1) or equation (2) or performing frequency conversion on the frequency components of the resampled data ReD21 using the table TBL2 shown in fig. 4B to obtain the used frequency bands fc1 to fc2 of the channel CH2 selected in step St 3. As a result, by performing steps St4-1, St4-2, St4-3, and St4-4, the PLC device 10 can generate a digital transmission signal capable of achieving desired power line communication that satisfies user demands, because the PLC device 10 can generate resampled data suitable for the mode and channel selected at steps St2 and St3, respectively, while satisfying the condition that should be in a frequency band lower than the nyquist frequency used for power line communication.

Fig. 9 is an explanatory diagram outlining a processing example of step St4 corresponding to the case of the 1/4 mode and the channel CH 1. Fig. 10 is an explanatory diagram outlining a processing example of step St4 corresponding to the case of the 1/4 mode and the channel CH 2. Fig. 11 is an explanatory diagram outlining a processing example of step St4 corresponding to the case of the 1/4 mode and the channel CH 3. Fig. 12 is an explanatory diagram outlining a processing example of step St4 corresponding to the case of the 1/4 mode and the channel CH 4.

In fig. 9 to 12, the flow chart shown on the leftmost side of the paper is an extracted part of the flow chart shown in fig. 5. A diagram showing time axis components of four resampled data is arranged in the vertical row in the middle part of the paper surface in the same manner as fig. 3. The graphs showing the frequency axis components of the four resampled data are arranged in the right-most wales of the paper surface in the same manner as fig. 3. Two sets of graphs are shown for comparison.

In the example of fig. 9, no clock multiplication is performed, so the sampling frequency fs4 is equal to 62.5 MHz.

As shown in fig. 9, when the sampling period is four times (St4-1), a change is made from resampled data ReD4 in a frequency range lower than the nyquist frequency (═ fs4/2) (more specifically, fr1(═ 4 MHz; see fig. 4B) to fr2(═ f2 ═ 28MHz)) to resampled data ReD41 having frequency components of f1(═ 2 MHz; see fig. 4B) to fc2(═ 7 MHz; see fig. 4B). The Nyquist frequency becomes fs 6/2. The frequency fs6(═ fs4/4) equals 15.625 MHz. For example, resampled data ReD41 has data corresponding to subcarrier numbers 10-100 (not shown).

After step St4-1, a 2-fold upsampling is performed (St 4-2). For example, the PLC PHY block 11B2 performs a process of inserting 0 into the resampled data ReD 41. As a result, resampled data ReD416m, which is a folded version of resampled data ReD41, is generated on the opposite side (i.e., the high frequency side) of nyquist frequency fs6/2 with respect to resampled data ReD 41. The Nyquist frequency becomes fs 5/2. The folded resampled data ReD416m has data obtained by inverting the arrangement of data corresponding to subcarrier numbers 10 to 100 of the resampled data ReD41 in the left-right direction (i.e., data corresponding to the subcarrier numbers 100 to 10).

After step St4-2, a filtering process using a low-pass filter is performed (St 4-3). For example, the high-frequency-side folded resampled data ReD416m is truncated by a low-pass filter (not shown) included in the PLC PHY block 11B 2. As a result, resampled data ReD41 included in the frequency bands (fc1 to fc2) of the channel CH1 is generated. However, the Nyquist frequency remains equal to fs5/2 and is not equal to the Nyquist frequency fs4/2 before the start of step St 4-1.

Therefore, in order to return the Nyquist frequency to the Nyquist frequency fs4/2 before the start of St4-1, second resampling is performed after step St4-3 (steps St4-2 and St 4-3). For example, the PLC PHY block 11B2 performs a process of inserting 0 into the resampled data ReD 41. As a result, resampled data ReD415m, which is a folded version of resampled data ReD41, is generated on the opposite side (i.e., the high frequency side) of nyquist frequency fs5/2 with respect to resampled data ReD 41. The Nyquist frequency becomes fs 4/2. The folded resampled data ReD415m has data obtained by inverting the arrangement of data corresponding to the subcarrier numbers 10 to 100 of the resampled data ReD41 in the left-right direction (i.e., data corresponding to the subcarrier numbers 100 to 10).

After step St4-2 is performed for the second time, the second filtering process using the low-pass filter is performed (St 4-3). For example, the high-frequency-side folded resampled data ReD415m is truncated by a low-pass filter (not shown) included in the PLC PHY block 11B 2. As a result, resampled data ReD41 included in the frequency bands (fc1 to fc2) of the channel CH1 is generated. In this way, by performing steps St4-1, St4-2, St4-3, St4-2, and St4-3, the PLC apparatus 10 can generate a digital transmission signal capable of achieving desired power line communication that satisfies user demands, because the PLC apparatus 10 can generate resampled data that is suitable for the mode and channel selected at steps St2 and St3, respectively, while satisfying the condition that should be in a frequency band lower than the nyquist frequency used for power line communication.

In the example of fig. 10, no clock multiplication is performed, and therefore the sampling frequency fs4 is equal to 62.5 MHz.

As shown in fig. 10, when the sampling period is four times (St4-1), a change is made from resampled data ReD4 in a frequency range lower than the nyquist frequency (═ fs4/2) (more specifically, fr1(═ 4 MHz; see fig. 4B) to fr2(═ f2 ═ 28MHz)) to resampled data ReD41 having frequency components of f1(═ 2 MHz; see fig. 4B) to fc2(═ 7 MHz; see fig. 4B). The Nyquist frequency becomes fs 6/2. For example, resampled data ReD41 has data corresponding to subcarrier numbers 10-100 (not shown).

After step St4-1, a 2-fold upsampling is performed (St 4-2). For example, the PLC PHY block 11B2 performs a process of inserting 0 into the resampled data ReD 41. As a result, resampled data ReD416m, which is a folded version of resampled data ReD41, is generated on the opposite side (i.e., the high frequency side) of nyquist frequency fs6/2 with respect to resampled data ReD 41. The Nyquist frequency becomes fs 5/2. The folded resampled data ReD416m has data obtained by inverting the arrangement of data corresponding to subcarrier numbers 10 to 100 of the resampled data ReD41 in the left-right direction (i.e., data corresponding to the subcarrier numbers 100 to 10).

After step St4-2, a filtering process using a low-pass filter is performed (St 4-3). For example, the high-frequency-side folded resampled data ReD416m is truncated by a low-pass filter (not shown) included in the PLC PHY block 11B 2. As a result, resampled data ReD41 included in the frequency bands (fc1 to fc2) of the channel CH1 is generated. However, since the channel CH2 is selected in the example of fig. 10, the frequency shift is performed after step St 4-3. The Nyquist frequency remains equal to fs5/2 and is not equal to the Nyquist frequency fs4/2 before the start of step St 4-1.

After step St4-3, the frequency shifting (frequency conversion) described above with reference to fig. 6 is also performed (St 4-4). For example, the PLCPHY block 11B2 generates the resampled data ReD41f by performing calculation according to equation (1) or equation (2) or performing frequency conversion to the high frequency side on the frequency components of the resampled data ReD41 using the table TBL2 shown in fig. 4B to obtain the usage frequency bands fc1 to fc2 of the channel CH2 selected at step St 3.

Further, in order to return the Nyquist frequency to the Nyquist frequency fs4/2 before the start of St4-1, second resampling is performed after step St4-4 (steps St4-2 and St 4-3). For example, the PLCPHY block 11B2 performs a process of inserting 0's into the resampled data ReD41 f. As a result, resampled data ReD41f5m as a collapsed version of resampled data ReD41f is generated on the opposite side (i.e., the high frequency side) of the nyquist frequency fs5/2 with respect to the resampled data ReD41 3941 41 f. The Nyquist frequency becomes fs 4/2. The folded resampled data ReD41f5m has data obtained by inverting the arrangement of data corresponding to subcarrier numbers 10 to 100 of the resampled data ReD41 in the left-right direction (i.e., data corresponding to the subcarrier numbers 100 to 10).

After step St4-2 is performed for the second time, the second filtering process using the low-pass filter is performed (St 4-3). For example, the high-frequency-side folded resampled data ReD41f5m is truncated by a low-pass filter (not shown) included in the PLC PHY block 11B 2. As a result, resampled data ReD41f included in the frequency bands (fc1 to fc2) of the channel CH2 is generated. In this way, by performing steps St4-1, St4-2, St4-3, St4-4, St4-2, and St4-3, the PLC device 10 can generate a digital transmission signal capable of achieving desired power line communication that meets the user's demand, because the PLC device 10 can generate resampled data that is suitable for the mode and channel selected at steps St2 and St3, respectively, while satisfying the condition that should be in a frequency band lower than the nyquist frequency used for power line communication.

In the example of fig. 11, no clock multiplication is performed, and therefore the sampling frequency fs4 is equal to 62.5 MHz.

As shown in fig. 11, when the sampling period is four times (St4-1), a change is made from resampled data ReD4 in a frequency range lower than the nyquist frequency (═ fs4/2) (more specifically, fr1(═ 4 MHz; see fig. 4B) to fr2(═ f2 ═ 28MHz)) to resampled data ReD41 having frequency components of f1(═ 2 MHz; see fig. 4B) to fc2(═ 7 MHz; see fig. 4B). The Nyquist frequency becomes fs 6/2. For example, resampled data ReD41 has data corresponding to subcarrier numbers 10-100 (not shown).

After step St4-1, a 2-fold upsampling is performed (St 4-2). For example, the PLC PHY block 11B2 performs a process of inserting 0 into the resampled data ReD 41. As a result, resampled data ReD416m, which is a folded version of resampled data ReD41, is generated on the opposite side (i.e., the high frequency side) of nyquist frequency fs6/2 with respect to resampled data ReD 41. The Nyquist frequency becomes fs 5/2. The folded resampled data ReD416m has data obtained by inverting the arrangement of data corresponding to subcarrier numbers 10 to 100 of the resampled data ReD41 in the left-right direction (i.e., data corresponding to the subcarrier numbers 100 to 10).

After step St4-2, a filtering process using a low-pass filter is performed (St 4-3). For example, the low frequency side folded resampled data ReD41 is truncated by a high pass filter (not shown) included in the PLC PHY block 11B 2. As a result, folded resampled data ReD416m included in the frequency band of the channel CH2 is generated. However, the transmission of the digital transmission signal including the folded resampled data ReD416m is not preferable because the arrangement of the subcarrier numbers is opposite to the arrangement of the resampled data that has been input to the main IC 11, and thus complicated reception processing needs to be performed in the reception-side PLC device 10. The Nyquist frequency remains equal to fs5/2 and is not equal to the Nyquist frequency fs4/2 before the start of step St 4-1.

Therefore, in order to return the Nyquist frequency to the Nyquist frequency fs4/2 before the start of St4-1, second resampling is performed after step St4-3 (steps St4-2 and St 4-3). For example, the PLC PHY block 11B2 performs a process of inserting 0 into the folded resampled data ReD416 m. As a result, resampled data ReD416m5m as a collapsed version of the collapsed resampled data ReD416m is generated at the opposite side (i.e., the high frequency side) of the nyquist frequency fs5/2 with respect to the collapsed resampled data ReD416 m. The Nyquist frequency becomes fs 4/2. The resampled data ReD416m5m has data obtained by inverting the arrangement of data corresponding to subcarrier numbers 100 to 10 of the folded resampled data ReD416m in the left-right direction (i.e., data corresponding to the subcarrier numbers 10 to 100).

After step St4-2 is performed for the second time, the second filtering process using the high-pass filter is performed (St 4-3). For example, the low frequency side folded resampled data ReD416m is truncated by a high pass filter (not shown) contained in the PLC PHY block 11B 2. As a result, resampled data ReD416m5m included in the frequency bands (fc1 to fc2) of the channel CH3 is generated. In this way, by performing steps St4-1, St4-2, St4-3, St4-2, and St4-3, the PLC apparatus 10 can generate a digital transmission signal capable of achieving desired power line communication that satisfies user demands, because the PLC apparatus 10 can generate resampled data that is suitable for the mode and channel selected at steps St2 and St3, respectively, while satisfying the condition that should be in a frequency band lower than the nyquist frequency used for power line communication.

In the example of fig. 12, no clock multiplication is performed, and therefore the sampling frequency fs4 is equal to 62.5 MHz.

As shown in fig. 12, when the sampling period is four times (St4-1), a change is made from resampled data ReD4 in a frequency range lower than the nyquist frequency (═ fs4/2) (more specifically, fr1(═ 4 MHz; see fig. 4B) to fr2(═ f2 ═ 28MHz)) to resampled data ReD41 having frequency components of f1(═ 2 MHz; see fig. 4B) to fc2(═ 7 MHz; see fig. 4B). The Nyquist frequency becomes fs 6/2. For example, resampled data ReD41 has data corresponding to subcarrier numbers 10-100 (not shown).

After step St4-1, a 2-fold upsampling is performed (St 4-2). For example, the PLC PHY block 11B2 performs a process of inserting 0 into the resampled data ReD 41. As a result, resampled data ReD416m, which is a folded version of resampled data ReD41, is generated on the opposite side (i.e., the high frequency side) of nyquist frequency fs6/2 with respect to resampled data ReD 41. The Nyquist frequency becomes fs 5/2. The folded resampled data ReD416m has data obtained by inverting the arrangement of data corresponding to subcarrier numbers 10 to 100 of the resampled data ReD41 in the left-right direction (i.e., data corresponding to the subcarrier numbers 100 to 10).

After step St4-2, a filtering process using a high-pass filter is performed (St 4-3). For example, the low frequency side resampled data ReD41 is truncated by a high pass filter (not shown) contained in the PLC PHY block 11B 2. As a result, folded resampled data ReD416m included in the frequency band of the channel CH2 is generated.

Further, the frequency shift (frequency conversion) as described above with reference to FIG. 6 is performed after step St4-3 (St 4-4). For example, the PLC PHY block 11B2 generates the folded resampled data ReD416mf by performing calculation according to equation (1) or equation (2) or performing frequency conversion of the frequency components of the folded resampled data ReD416m to the low frequency side using the table TBL2 shown in fig. 4B to obtain the used frequency band of the channel CH1 selected at step St 3.

Now, as described above, the transmission of the digital transmission signal including the folded resampled data ReD416mf is not preferable because the arrangement of the subcarrier numbers is opposite to the arrangement of the resampled data that has been input to the main IC 11, and thus a complicated reception process needs to be performed in the reception-side PLC apparatus 10. The Nyquist frequency remains equal to fs5/2 and is not equal to the Nyquist frequency fs4/2 before the start of step St 4-1.

Therefore, in order to return the Nyquist frequency to the Nyquist frequency fs4/2 before the start of St4-1, a second resampling is performed after step St4-4 (steps St4-2 and St 4-3). For example, the PLC PHY block 11B2 performs a process of inserting 0 into the folded resampled data ReD416 mf. As a result, resampled data ReD416mf5m as a collapsed version of the collapsed resampled data ReD416mf is generated at the opposite side (i.e., the high frequency side) of the nyquist frequency fs5/2 with respect to the resampled data ReD416 mf. The Nyquist frequency becomes fs 4/2. The folded resampled data ReD416mf5m has data obtained by inverting the arrangement of the data corresponding to the subcarrier numbers 100 to 10 of the folded resampled data ReD416mf in the left-right direction (i.e., data corresponding to the subcarrier numbers 10 to 100).

After step St4-2 is performed for the second time, the second filtering process using the high-pass filter is performed (St 4-3). For example, the low frequency side folded resampled data ReD416mf is truncated by a high pass filter (not shown) contained in the PLC PHY block 11B 2. As a result, resampled data ReD416fm5m included in the frequency bands (fc1 to fc2) of the channel CH4 is generated. In this way, by performing steps St4-1, St4-2, St4-3, St4-4, St4-2, and St4-3, the PLC device 10 can generate a digital transmission signal capable of achieving desired power line communication that meets the user's demand, because the PLC device 10 can generate resampled data that is suitable for the mode and channel selected at steps St2 and St3, respectively, while satisfying the condition that should be in a frequency band lower than the nyquist frequency used for power line communication. In addition, in the case where the band of the channel CH4 is narrow, the PLC PHY block 11B2 may widen the band of the channel CH4 by narrowing the band of another channel (e.g., the channel CH3 adjacent to the channel CH 4).

Next, a processing procedure of selection (determination) of a channel to be used for power line communication by the PLC device 10 according to the first embodiment will be described with reference to fig. 13A, 13B, 14A, 14B, and 14C. Fig. 13A is a flowchart showing a first exemplary operation procedure related to channel selection followed by a PLC parent device according to the first embodiment. Fig. 13B is a flowchart illustrating a first exemplary operational procedure related to channel selection followed by the PLC sub-apparatus according to the first embodiment. Fig. 14A is a flowchart showing an exemplary operational procedure relating to channel selection by the control device 50 employed in the first embodiment. Fig. 14B is a flowchart showing a second exemplary operation procedure related to channel selection in the PLC parent device according to the first embodiment. Fig. 14C is a flowchart showing a second exemplary operation procedure related to channel selection in the PLC sub-apparatus according to the first embodiment.

In selecting a channel to be used for power line communication with other PLC devices 10, the PLC device 10 according to the first embodiment employs one of a first mode (see fig. 13A and 13B) in which a channel is selected (determined) in such a manner that two PLC devices 10 collectively infer a bandwidth, and a second mode (see fig. 14A, 14B, and 14C) in which a channel is selected (determined) using the control apparatus 50 and the plurality of PLC devices 10.

In the case where one PLC device 10 and the other PLC device 10 according to the first embodiment are connected to each other through the power line 1A, the higher the frequency band used for power line communication becomes, the more remarkable the attenuation characteristics become. On the other hand, the lower the frequency band for power line communication becomes, the more noticeable the noise characteristics become. Further, in the case where a power line (for example, the power line 1A) is used as a wired medium for power line communication, the state of the transmission line varies depending on the presence or absence of a load that generates noise, a load connected to the power line, and other factors different from the case where a coaxial cable is used. Therefore, as in the conventional case of using only a single channel (for example, a frequency band: 2 to 28MHz), when the state of the transmission line changes, there is a possibility that an event that a good communication environment cannot be obtained may occur due to the above-described attenuation characteristic or noise characteristic. In view of this, a channel for power line communication should be adaptively selected according to the situation of a transmission line.

In the first mode, the PLC parent device (for example, the PLC device 10A) according to the first embodiment acquires transmission line information obtained by the PLC child device (for example, the PLC device 10B) by observing a channel while scanning the channel, and selects (determines) a channel to be used for power line communication based on the transmission line information thus obtained. In the first mode, a mode is selected in advance, and each PLC device 10 knows information about the mode. For example, in the following description, transmission line information is SNR (signal-to-noise ratio) of carriers corresponding to respective channels and a communication rate (PHY rate) in a physical layer obtained from the SNR. The PHY rate may be calculated from the number of bits that can be transmitted per unit symbol. In the case of multi-hop communication, a link cost calculated to determine a multi-hop communication route may be used as the transmission line information.

In the second mode, the PLC parent device (for example, the PLC device 10A) according to the first embodiment acquires the transmission line information acquired by the PLC child device (for example, the PLC device 10B) by observing the channels while scanning the channels, and transmits the acquired transmission line information of the respective channels to the control apparatus 50 (see fig. 1). The control device 50 selects (determines) a channel and a mode to be used for the power line communication based on the transmission line information of the respective channels received from the PLC parent device, and transmits the selection result to the PLC parent device. The PLC parent device transmits the selection result received from the control apparatus 50 to the PLC child device (including a case where a plurality of PLC child devices are used; this also applies to the following), and shares it with the PLC child device.

The assumption to be made for the description with reference to fig. 13A is as follows. For example, the user presses a designated button (not shown) provided on the main body 100 of the PLC parent device (e.g., PLC device 10A) and the PLC child device (e.g., PLC device 10B), respectively, for a long time in a state where he or she is gripping the PLC parent device and the PLC child device, whereby the PLC child device is registered in the PLC parent device (simply connected). Instead of simple connection, the modes of the PLC parent device and the PLC child device may be selected in advance (automatic connection). In the following description, it is assumed that 1/4 mode capable of accommodating long-distance power line communication is selected. That is, in the frequency range of 2MHz to 28MHz, a maximum of four channels are formed (generated). For example, each step shown in fig. 13A described below is performed by the PLC MAC block 11C 2.

Referring to fig. 13A, a PLC parent device (for example, the PLC device 10A) starts up in a state where the channel CH1 of the 1/4 mode is selected (St 21). The PLC parent device (for example, the PLC device 10A) transmits a control signal (for example, a beacon signal or a hello signal) to each PLC child device (for example, the PLC devices 10B and 10C), and performs a predetermined authentication process (for example, checks whether or not information known only to the two PLC devices is held). That is, the PLC parent device (for example, the PLC device 10A) determines whether each party that returns a response signal in response to receiving a control signal is a legitimate PLC child device (St 22). The PLC parent device (for example, the PLC device 10A) determines whether or not a predetermined number of seconds (for example, 60 seconds) have elapsed since the start of the authentication process of the PLC child device (St 23). The authentication process of the PLC sub-apparatus continues (St 23: no) until a predetermined number of seconds has elapsed.

On the other hand, if it is determined that the predetermined number of seconds (e.g., 60 seconds) have elapsed since the start of the authentication process for the PLC child device (St 23: yes), the PLC parent device (e.g., the PLC device 10A) acquires the transmission line information of the channel CH1 (described above) transmitted from each PLC child device and the number of PLC child devices authenticated for the channel CH1, and records them in the memory 18 (St 24).

The PLC parent device (for example, the PLC device 10A) determines whether scanning of all channels is completed (in other words, the number of authenticated devices and transmission line information of each channel are acquired for all channels CH1, CH2, CH3, and CH4 of the 1/4 mode) (St 25). If it is determined that the scanning of all the channels has not been completed (St 25: no), the PLC parent device (for example, the PLC device 10A) cancels the authentication of the PLC child device performed at step St22 (St26) and changes the channel of interest (set channel) from the current channel (for example, channel CH1) to another channel (for example, channel CH2) (St 27). After step St27, the PLC parent device (for example, PLC device 10A) returns to step St 22. That is, the PLC parent device (for example, the PLC device 10A) repeatedly executes steps St22 to St27 until scanning of all channels is completed.

If it is determined that the scanning of all the channels is completed (St 25: yes), the PLC parent device (for example, the PLC device 10A) determines a channel capable of achieving good power line communication (for example, a channel having a large number of authenticated devices, a channel providing the highest PHY rate, or a channel providing the lowest link cost) based on the number of authenticated devices and the transmission line information of each channel, and selects the determined channel (St 28). The PLC parent device (for example, PLC device 10A) transmits information on the channel selected at step St28 to each PLC child device to share the information, and then performs power line communication with the PLC child device as a normal operation (St 29).

The assumption to be made for the description with reference to fig. 13B is as follows. The PLC sub-device scans channels in order starting from the channel CH1 having the lowest frequency band. After reaching the channel CH4 with the highest frequency band, the PLC sub-apparatus returns to the channel CH1 with the lowest frequency band to continue scanning (loop). For example, the respective steps shown in fig. 13B described below are performed by the PLC MAC block 11C 2.

Referring to fig. 13B, the PLC sub-apparatus (for example, the PLC apparatus 10B or 10C) starts up in a state where the channel CH1 of the 1/4 mode is selected (St31), which acquires transmission line information of the channel CH1 by, for example, calculation and holds it in the memory 18.

The PLC child device (for example, PLC device 10B or 10C) determines whether or not the control signal transmitted from the PLC parent device (for example, PLC device 10A) is detected (St 32). If the control signal transmitted from the PLC parent device (for example, PLC device 10A) is not detected (St 32: no), the PLC child device (for example, PLC device 10B or 10C) determines whether or not a predetermined number of seconds (for example, 60 seconds) have elapsed since the PLC child device was activated (St31) in a state where the channel CH1 is selected (St 33). That is, the PLC slave device (for example, PLC device 10B or 10C) waits until a predetermined number of seconds has elapsed in step St33 or until a control signal transmitted from the PLC parent device (for example, PLC device 10A) is detected.

If the control signal is not detected until the prescribed number of seconds has elapsed (St 33: No), the PLC sub-apparatus (e.g., the PLC apparatus 10B or 10C) changes the channel of interest (set channel) from the current channel (e.g., the channel CH1) to the other channel (e.g., the channel CH2) (St 34). After step St34, the PLC sub-apparatus (for example, PLC apparatus 10B or 10C) returns to step St 32. That is, the PLC sub-apparatus repeatedly determines whether or not the control signal transmitted from the PLC parent apparatus (for example, the PLC apparatus 10A) is detected for each channel by changing the channel (in other words, using the frequency band) in units of the prescribed number of seconds (St 33).

If it is determined that the control signal transmitted from the PLC parent device (for example, the PLC device 10A) is detected (St 32: yes), the PLC child device (for example, the PLC device 10B or 10C) and the PLC parent device (for example, the PLC device 10A) perform a predetermined authentication process (for example, check whether or not information known to only these two PLC devices is held) (St 35). After the authentication process at step St35, the PLC child device (for example, the PLC device 10B or 10C) transmits the transmission line information (described above) acquired for the current channel to the PLC parent device (for example, the PLC device 10A) (St 36).

The assumption to be made for the description with reference to fig. 14A is as follows. Processing for registering the PLC child devices (PLC devices 10B and 10C) as communication partners of the PLC parent device (for example, PLC device 10A) has been performed. Further, for simplicity of description, it is assumed that the initial mode to be scanned is the 1/4 mode. For example, the steps shown in fig. 14A described below are performed by the processor 53.

Referring to fig. 14A, the control device 50 is started in a state where the channel CH1 of the 1/4 mode is selected (St 41). The control device 50 determines whether a prescribed number of seconds (for example, 60 seconds) have elapsed from the time of startup in a state in which the channel CH1 of the 1/4 mode is selected (St 42). The control device 50 stands by (St 42: no) until a prescribed number of seconds have elapsed. When determining that the prescribed number of seconds has elapsed (St 42: yes), the control apparatus 50 requests the PLC parent device (for example, PLC device 10A) to acquire the number of authenticated devices and the transmission line information for the channel CH1 in the 1/4 mode (St 43).

The control apparatus 50 determines whether scanning of all channels is completed (in other words, the number of authenticated devices and transmission line information of each channel have been acquired for all channels CH1, CH2, CH3 and CH4 of the 1/4 mode, all channels CH1 and CH2 of the 1/2 mode, and the channel CH1 of the standard mode) (St 44). In a case where it is determined that the scanning of all the channels has not been completed (St 44: no), the control apparatus 50 transmits a request to change the channel, or the mode and the channel, to the PLC parent device (for example, the PLC device 10A) (St 45). After step St45, the control apparatus 50 returns to step St 42. That is, the control apparatus 50 executes steps St42 to St45 until the scanning of all channels is completed.

If it is determined that the scanning of all the channels is completed (St 44: yes), the control apparatus 50 determines a channel capable of achieving good power line communication (for example, a channel having a large number of authenticated devices, a channel providing the highest PHY rate, or a channel providing the lowest link cost) based on the number of authenticated devices and the transmission line information of each channel and selects the determined channel (St 46). The control apparatus 50 generates an instruction for setting information on the mode and the channel selected at step St46, and then transmits it to the PLC parent device (for example, the PLC device 10A) (St 47).

The assumptions to be described with reference to fig. 14B are as follows: for example, the respective steps shown in fig. 14B are performed by the PLC MAC block 11C 2.

Referring to fig. 14B, in a case where a request for changing a channel, or a mode and a channel (see step St45) is received from the control apparatus 50 after the PLC parent device (e.g., the PLC device 10A) is started up (see step St51), the PLC parent device (e.g., the PLC device 10A) changes the relevant channel, or the relevant mode and the channel (St 52). For example, the PLC parent device (for example, the PLC device 10A) changes the attention channel to the channel CH2 of the 1/4 mode.

The PLC parent device (for example, the PLC device 10A) transmits a control signal (for example, a beacon signal or a request signal) to each PLC child device (for example, the PLC devices 10B and 10C), and performs a predetermined authentication process (for example, checks whether or not information known only to the two PLC devices is held). That is, the PLC parent device (for example, the PLC device 10A) determines whether each party that returns a response signal in response to receiving a control signal is a legitimate PLC child device (St 53). If it is determined that the PLC child device has been normally authenticated, the PLC parent device (for example, the PLC device 10A) acquires the transmission line information of the channel CH1 (described above) transmitted from each PLC child device and the number of PLC child devices authenticated for the channel CH1, and records them in the memory 18 (St 54).

The PLC parent device (for example, PLC device 10A) transmits a request for canceling the authentication of the PLC child device for the current channel set at step St42 to the control apparatus 50 (St 55). Upon receiving the request for changing the channel, or the mode and the channel transmitted from the control apparatus 50 (see step St45), the PLC parent device (for example, the PLC device 10A) changes the channel of interest, or the mode and the channel of interest (St 56). For example, the PLC parent device (e.g., PLC device 10A) causes a change to channel CH2 of the 1/4 mode. After step St56, the PLC parent device (for example, PLC device 10A) returns to step St 53. That is, the PLC parent device (for example, the PLC device 10A) repeatedly executes steps St43 to St46 until scanning of all channels is completed.

The assumption to be made for the description with reference to fig. 14C is as follows. The PLC sub-apparatus scans channels, or a pattern and channels, in the order of channels CH1, CH2, CH3 and CH4 (of 1/4 pattern), channels CH1 and CH2 of 1/2 pattern, and channel CH1 of standard pattern. After reaching the standard mode, the PLC sub-device returns to 1/4 mode channel CH1 to continue scanning (loop). For example, each step shown in fig. 14C described below is performed by the PLC MAC block 11C 2.

Referring to fig. 14C, the PLC sub-apparatus (for example, the PLC apparatus 10B or 10C) starts up in a state where the channel CH1 of the 1/4 mode is selected (St61), which acquires transmission line information of the channel CH1 by, for example, calculation and holds it in the memory 18.

The PLC child device (for example, PLC device 10B or 10C) determines whether or not the control signal transmitted from the PLC parent device (for example, PLC device 10A) is detected (St 62). If the control signal transmitted from the PLC parent device (for example, PLC device 10A) is not detected (St 62: no), the PLC child device (for example, PLC device 10B or 10C) determines whether or not a predetermined number of seconds (for example, 15 seconds) have elapsed from the time when the PLC child device is activated (St61) in a state where the channel CH1 is selected (St 63). That is, the PLC child device (for example, PLC device 10B or 10C) waits until a predetermined number of seconds has elapsed or until a control signal transmitted from the PLC parent device (for example, PLC device 10A) is detected. The predetermined number of seconds used here is shorter than the predetermined number of seconds (for example, 60 seconds) counted by the PLC parent device (for example, the PLC device 10A) when the PLC child device is authenticated at step St 23. This is because, if the PLC child device switches channels within the same period as the PLC parent device, the PLC parent device cannot carefully check all the channels. More preferably, the predetermined number of seconds used in the PLC child device (i.e., the predetermined number of seconds used in step St63) is less than or equal to the predetermined number of seconds used in the PLC parent device (i.e., the predetermined number of seconds used in step St23) divided by the number of channels. Rather, this makes it possible to guarantee the time it takes for the PLC parent device to go through scrutiny on all channels. For example, when the period used in the PLC parent device is 60 seconds and the number of channels is 4, the period used in the PLC child device is preferably 15 seconds or less.

If the control signal is not detected until the prescribed number of seconds employed at step St63 has elapsed, the PLC sub-apparatus (e.g., PLC apparatus 10B or 10C) changes the channel of interest (set channel) from the current channel (e.g., channel CH1) to the other channel (e.g., channel CH2) (St 64). After step St64, the PLC sub-apparatus (for example, PLC apparatus 10B or 10C) returns to step St 62. That is, the PLC child device (for example, the PLC device 10B or 10C) repeatedly determines whether or not the control signal transmitted from the PLC parent device (for example, the PLC device 10A) is detected for each channel by changing the channel (that is, using the frequency band) in units of the prescribed number of seconds employed at step St 63.

If it is determined that the control signal transmitted from the PLC parent device (for example, the PLC device 10A) is detected (St 62: yes), the PLC child device (for example, the PLC device 10B or 10C) and the PLC parent device (for example, the PLC device 10A) perform a predetermined authentication process (for example, check whether or not information known to only these two PLC devices is held) (St 65). After the authentication process at step St65, the PLC child device (for example, the PLC device 10B or 10C) transmits the transmission line information (described above) acquired for the current channel to the PLC parent device (for example, the PLC device 10A) (St 66).

As described above, in the wired communication system 1000 according to the first embodiment, the PLC device 10 selects, by means of the PLC MAC block 11C2 (an example of the term "selection unit"), a mode for specifying the number of one or more channels prepared within a prescribed frequency band (for example, 2MHz to 30MHz) and to be used for communication with other PLC devices (an example of the term "other communication devices") via a wired medium (for example, the power line 1A) and a channel to be used for communication in the mode. The PLC device 10 generates a communication frame to be used for communication by performing digital signal processing on input data (e.g., resampled data) input to the main IC according to the selected mode and channel by means of a PLC PHY block 11B (an example of the term "signal processing unit").

With the above configuration, compared to conventional power line communication using an available frequency band (for example, 2MHz to 30MHz) in the form of a single channel, the PLC device 10 according to the first embodiment can adaptively select a channel suitable for power line communication from a plurality of channels in the above frequency band in consideration of characteristics such as noise characteristics and signal attenuation characteristics, and perform good power line communication according to the case of using a transmission line of the selected channel. Therefore, the PLC device 10 according to the first embodiment can adaptively perform wired power line communication capable of providing desired communication characteristics at a level that satisfies user demands (for example, long distance, high speed, or both). Further, the PLC device 10 can form a plurality of channels in a frequency band of, for example, 2MHz to 30MHz, and in addition to achieving communication performance satisfying requirements for a long distance, a high speed, or both, it is also possible to perform good power line communication asynchronously with each of the other PLC devices 10 (for example, a plurality of security cameras) connected to the PLC device 10, and thus real-time monitoring and the like can be easily achieved. Further, the PLC device 10 can include the main IC 11 having the PLC MAC block 11C and the PLC PHY block 11B in one chip, which can perform wired communication that can be high-speed wired communication and power line communication that can be long-distance power line communication; the PLC device 10 may be configured in a simple manner by including an extensible Integrated Circuit (IC).

The PLC device 10 performs digital signal processing by multiplying the sampling period of input data, sampling the input data, and resampling the sampled input data. By this means, since the PLC device 10 changes the nyquist frequency by multiplying the sampling period before resampling, even if resampling is performed, the nyquist frequency can be returned to the original frequency (for example, fs4/2) to be used for communication before resampling: channels can be easily formed according to the selected mode and channel.

The PLC device 10 performs digital signal processing by also performing processing of converting the frequency band of the resampled input data into a frequency band corresponding to the selected channel. By this measure, the PLC device 10 can form channels so as to satisfy the frequency band (for example, high-frequency side frequency band) of the selected channel among the frequency bands (for example, 2MHz to 30MHz) usable for power line communication.

The PLC device 10 performs digital signal processing by also performing resampling processing on the converted (frequency-shifted) input data. By this measure, the PLC device 10 can form the channel so as to satisfy the frequency band (for example, high-frequency side or low-frequency side frequency band) of the selected channel among the frequency bands (for example, 2MHz to 30MHz) usable for the power line communication.

The PLC device 10 also selects a clock frequency of its own device that can be multiplied, and performs signal processing on input data based on the selected clock frequency. By this measure, the PLC device 10 can operate at a higher clock frequency than in the standard mode in which the clock frequency is not multiplied, so that power line communication suitable for faster operation can be performed. For example, in the case of doubling the clock frequency, the PLC device 10 may perform wired communication capable of providing a throughput of about 500Mbps in the 2-fold mode (for example, a coaxial cable is used as a wired medium). In the case where the clock frequency is 4 times, the PLC device 10 can perform wired communication capable of providing a throughput of about 1Gbps in the 4-time mode (for example, a coaxial cable is used as a wired medium).

The PLC device 10 is also provided with a communication unit (e.g., a power supply connector 21) that communicates with other PLC devices 10 through a wired medium. The PLC device 10 receives transmission line information transmitted from another PLC device 10 using each of the one or more channels; and selects a channel to be used for communication between the own device and the other PLC device 10 based on the received transmission line information of each channel. By this measure, the PLC device 10(PLC parent device) can perform power line communication by adaptively selecting a channel having a good transmission line state according to the situation of the power line 1A (i.e., transmission line situation) to the other PLC device 10(PLC child device).

The PLC device 10 is also equipped with a first communication unit (e.g., a power supply connector 21) that communicates with other PLC devices 10 through a wired medium, and a second communication unit (e.g., a modular jack 22) that communicates with a control apparatus 50 (an example of the term "external device") through a wired medium, the control apparatus 50 determining a channel to be used for communication between the own device and the PLC device 10. The PLC device 10 receives the transmission line information transmitted from the other PLC device 10 using each of the one or more channels, and transmits the received transmission line information of each channel transmitted from the other communication device to the control apparatus 50. The PLC device 10(PLC parent device) receives information on the channel or the mode and the channel determined by the control apparatus and to be used for communication from the control apparatus 50, and selects a channel to be used for communication between the own device and the other PLC device 10 based on the received information on the channel or the mode and the channel to be used for communication. By this measure, the PLC device 10(PLC parent device) can perform power line communication by adaptively selecting a channel suitable for the situation of the power line 1A leading to the other PLC device 10(PLC child device), that is, the transmission line situation, without the self device making a judgment based on the information on the channel or the mode and the channel determined by the control apparatus 50.

Although various embodiments have been described above with reference to the drawings, it is needless to say that the present invention is not limited to these examples. It is apparent that those skilled in the art can conceive various changes or modifications within the scope of the claims, and these changes or modifications are naturally understood to be included in the technical scope of the present invention. And constituent elements of the above-described various embodiments may be combined in a desired manner without departing from the spirit and scope of the present invention.

In the above-described first embodiment, the standard mode, 1/2 mode, 1/4 mode, 2-fold mode, and 4-fold mode are described as exemplary modes, and the modes are not limited to these modes. For example, it is also possible to realize the 1/8 mode and the 8-fold mode, and even in this case, the PLC device 10 can form channels so that the mode and the channel selected according to the condition of the transmission line between the own PLC device 10 and the other PLC device 10 are satisfied.

The present application is based on japanese patent application 2018-032591, filed on 26.2.2018, the disclosure of which is incorporated herein by reference.

Industrial applicability

The present invention is useful when applied to a communication apparatus and a communication signal generation method that adaptively perform wired power line communication to which desired communication characteristics at a level satisfying user demands are given.

Reference numerals

1A: power line

1B: power supply cable

2: socket with improved structure

10. 10A, 10B, 10C: PLC device

11: master IC

11A:CPU

11B1, 11B 2: PLC PHY Block

11C1, 11C 2: PLC MAC block

12:AFE IC

12A: DA converter

12B, 12C: variable gain amplifier

12D: AD converter

13: low-pass filter

15: driver IC

16: coupler

16A: coil transformer

16B, 16C: coupling capacitor

17: band-pass filter

18. 52: memory device

19: wired PHY IC

20: switching power supply

21: power supply connector

22: modular jack

23:LED

24: AC-DC converter

25: power supply plug

26: LAN cable

27: upper impedance

27A, 27B: coil

30: circuit module

50: control device

51: communication interface

53: processor with a memory having a plurality of memory cells

54: input/output interface

55: storage device

60: AC circulation detector

100: main body

1000: wired communication system

CH1-CH 4: communication channel

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