阅读说明：本技术 用于芯片检测的参考模板的生成方法及相关设备 (Method for generating reference template for chip detection and related equipment ) 是由 林宜龙 刘飞 王能翔 林涛 官声文 于 2021-06-25 设计创作，主要内容包括：本发明公开了一种用于芯片检测的参考模板的生成方法及相关设备,所述方法包括获取芯片数据；根据所述芯片数据,生成所述芯片数据对应的映射模板；将所述映射模板与预设的良品图像进行匹配,得到匹配结果；根据所述匹配结果,对所述映射模板进行调整,得到参考模板。本发明先通过自动布线生成一个映射模板,再通过与良品图像的匹配,调整映射模板上的布线,从而降低了人工连线的繁琐和耗时,极大地提升了映射模板的生成效率。(The invention discloses a generation method of a reference template for chip detection and related equipment, wherein the method comprises the steps of obtaining chip data; generating a mapping template corresponding to the chip data according to the chip data; matching the mapping template with a preset good image to obtain a matching result; and adjusting the mapping template according to the matching result to obtain a reference template. According to the invention, a mapping template is generated through automatic wiring, and then wiring on the mapping template is adjusted through matching with a good product image, so that the complexity and time consumption of manual wiring are reduced, and the generation efficiency of the mapping template is greatly improved.)

1. A method for generating a reference template for chip detection, the method comprising:

acquiring chip data;

generating a mapping template corresponding to the chip data according to the chip data;

matching the mapping template with a preset good image to obtain a matching result;

and adjusting the mapping template according to the matching result to obtain a reference template.

2. The method for generating the reference template for chip detection according to claim 1, wherein the generating a mapping template corresponding to the chip data according to the chip data specifically includes:

extracting template data in the chip data according to a preset extraction rule;

and generating a mapping template corresponding to the chip data according to the template data.

3. The method of claim 2, wherein the template data comprises size data and corresponding position coordinates of a plurality of solder point pairs.

4. The method for generating the reference template for chip detection according to claim 3, wherein the generating a mapping template corresponding to the chip data according to the template data specifically includes:

creating a blank template corresponding to the chip data according to the size data;

and for each welding point pair, connecting lines on the blank template according to the position coordinates corresponding to the welding point pair in the blank template to generate a welding curve corresponding to the welding point and a mapping template comprising the welding curve.

5. The method for generating a reference template for chip inspection according to claim 4, wherein the chip data further comprises welding arc data corresponding to each of the welding point pairs; for each welding point pair, connecting lines on the blank template according to the position coordinates corresponding to the welding point pair in the blank template to generate a welding curve corresponding to the welding point and a mapping template comprising the welding curve, and specifically comprising:

for each welding point pair, connecting the welding point pair according to the position coordinate corresponding to the welding point pair in the blank template to obtain an initial curve;

adjusting the initial curve according to the welding radian data to obtain an intermediate curve;

and expanding the intermediate curve according to preset expansion parameters to obtain a welding curve and the mapping template.

6. The method for generating the reference template for chip inspection according to claim 5, wherein before the expanding the intermediate curve according to the preset expansion parameter to obtain the target curve, the method further comprises:

acquiring process parameters corresponding to chip data;

and determining expansion parameters corresponding to the chip data according to the process parameters.

7. The method for generating a reference template for chip inspection according to any one of claims 1 to 6, wherein after the mapping template is adjusted according to the matching result to obtain the reference template, the method further comprises:

and sending the reference template to a chip detection device connected in advance so that the chip detection device can detect the chip to be detected according to the reference template.

8. The device for generating a reference template for chip detection is characterized by specifically comprising:

the acquisition module is used for acquiring chip data;

the generating module is used for generating a mapping template corresponding to the chip data according to the chip data;

the matching module is used for matching the mapping template with a preset good product image to obtain a matching result;

and the adjusting module is used for adjusting the mapping template according to the matching result to obtain a reference template.

9. A computer-readable storage medium storing one or more programs, the one or more programs being executable by one or more processors to implement the steps of the method for generating a reference template for chip detection according to any one of claims 1 to 7.

10. A terminal device, comprising: a processor, a memory, and a communication bus;

the memory has stored thereon a computer readable program executable by the processor;

the communication bus realizes connection communication between the processor and the memory;

the processor, when executing the computer readable program, implements the steps of the method for generating a reference template for chip inspection according to any one of claims 1 to 7.

Technical Field

The invention relates to the technical field of chip detection, in particular to a method for generating a reference template for chip detection and related equipment.

Background

With the development of integrated circuits and the expansion of market demand, on one hand, chips are more miniaturized and have more functions than ever before, and on the other hand, the complexity of circuits in chips is higher and higher. In order to improve the detection efficiency and stability of the chip, the current machine detection replaces manual detection, and becomes the most widely applied chip detection mode.

The current main processes for detecting chips based on machines include: and photographing the chips detected as good products to obtain good product images, and then modeling the bonding wires of the chips on software according to the standards of the good product images until all the bonding wires are modeled to obtain modeled images. And then, importing the modeling image into a machine, and detecting the chip to be detected by the machine based on the modeling image. In the process, the wire pulling in the modeling image is obtained by manually pulling the wire by referring to the good product image by personnel, and although the wire pulling is not complex work on the premise of existence of a reference object, under the condition that the density and the number of the bonding wires are larger and larger, the manual wire pulling mode is very complicated, a large amount of time is consumed, and the chip detection efficiency is reduced.

Disclosure of Invention

The invention aims to solve the technical problems that modeling of a reference template for chip detection is still mainly in a manual mode, efficiency is low, and a generation method of the reference template for chip detection is provided aiming at the defects of the prior art.

In order to solve the technical problems, the technical scheme adopted by the invention is as follows:

a method of generating a reference template for chip inspection, the method comprising:

acquiring chip data;

generating a mapping template corresponding to the chip data according to the chip data;

matching the mapping template with a preset good image to obtain a matching result;

and adjusting the mapping template according to the matching result to obtain a reference template.

The method for generating the reference template for chip detection, wherein the generating a mapping template corresponding to the chip data according to the chip data specifically includes:

extracting template data in the chip data according to a preset extraction rule;

and generating a mapping template corresponding to the chip data according to the template data.

The reference template generation method for chip detection is characterized in that the template data comprise size data and position coordinates corresponding to a plurality of welding point pairs.

The method for generating the reference template for chip detection, wherein the generating of the mapping template corresponding to the chip data according to the template data specifically includes:

creating a blank template corresponding to the chip data according to the size data;

and for each welding point pair, connecting lines on the blank template according to the position coordinates corresponding to the welding point pair in the blank template to generate a welding curve corresponding to the welding point and a mapping template comprising the welding curve.

The generation method of the reference template for chip detection is characterized in that the chip data further comprises welding radian data corresponding to each welding point pair; for each welding point pair, connecting lines on the blank template according to the position coordinates corresponding to the welding point pair in the blank template to generate a welding curve corresponding to the welding point and a mapping template comprising the welding curve, and specifically comprising:

for each welding point pair, connecting the welding point pair according to the position coordinate corresponding to the welding point pair in the blank template to obtain an initial curve;

adjusting the initial curve according to the welding radian data to obtain an intermediate curve;

and expanding the intermediate curve according to preset expansion parameters to obtain a welding curve and the mapping template.

The method for generating the reference template for chip detection, wherein before the expanding the intermediate curve according to the preset expansion parameter to obtain the target curve, the method further comprises:

acquiring process parameters corresponding to chip data;

and determining expansion parameters corresponding to the chip data according to the process parameters.

The method for generating the reference template for chip detection, wherein after the mapping template is adjusted according to the matching result to obtain the reference template, the method further comprises:

and sending the reference template to a chip detection device connected in advance so that the chip detection device can detect the chip to be detected according to the reference template.

A generation device of a reference template for chip detection specifically comprises:

the acquisition module is used for acquiring chip data;

the generating module is used for generating a mapping template corresponding to the chip data according to the chip data;

the matching module is used for matching the mapping template with a preset good product image to obtain a matching result;

and the adjusting module is used for adjusting the mapping template according to the matching result to obtain a reference template.

A computer readable storage medium storing one or more programs, which are executable by one or more processors, to implement the steps in the method for generating a reference template for chip detection as described in any one of the above.

A terminal device, comprising: a processor, a memory, and a communication bus; the memory has stored thereon a computer readable program executable by the processor;

the communication bus realizes connection communication between the processor and the memory;

the processor, when executing the computer readable program, implements the steps in the method for generating a reference template for chip detection as described in any one of the above.

Has the advantages that: compared with the prior art, the invention provides a method for generating a reference template for chip detection and related equipment. Compared with the prior art that one piece of manual wiring is carried out on the reference good product image, the method and the device do not need manual wire pulling, can be carried out automatically, and greatly improve the generation efficiency of the mapping template.

Drawings

Fig. 1 is a first flowchart of a method for generating a reference template for chip detection according to the present invention.

Fig. 2 is a flowchart of generating a mapping template and adjusting the mapping template in the method for generating a reference template for chip detection according to the present invention.

Fig. 3 is a schematic structural diagram of a reference template generation apparatus for chip detection according to the present invention.

Fig. 4 is a schematic structural diagram of a terminal device provided in the present invention.

Detailed Description

The invention provides a method for generating a reference template for chip detection and related equipment, and in order to make the purpose, technical scheme and effect of the invention clearer and clearer, the invention is further described in detail below by referring to the attached drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. As used herein, the term "and/or" includes all or any element and all combinations of one or more of the associated listed items.

It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

The inventor finds that the existing reference template for chip detection is mainly still manually modeled and is inefficient.

In order to solve the above problem, in an embodiment of the present invention, a method for generating a reference template for chip detection is provided. The method can introduce a DWG file used by Wire Bond machine routing, which is a pre-chip bonding Wire detection process, and read information such as the position of a first welding point, the position of a second welding point, the radian of a bonding Wire and the like of each bonding Wire on a chip. Automatic wiring of the welding wire template is realized by importing a former process file, and efficient and accurate modeling work is realized.

For example, the embodiment of the present invention may be applied to an environment for performing batch quality detection on produced chips, wherein before the batch quality detection, a plurality of test chips are produced, and then the test chips are detected, and a chip with the best performance is selected as a good chip. In this embodiment, the main body for implementing the method for producing the reference template for chip detection may be a single piece of software, or may also be in the form of a plug-in of existing automatic wiring software, or a certain server, etc.

The following takes an execution subject as a software program, and the present disclosure is further explained by describing an embodiment with reference to the drawings.

As shown in fig. 1, the present implementation provides a method for generating a reference template for chip detection, which may include the following steps:

and S10, acquiring chip data.

Specifically, the software first obtains chip data, which is related to the chip to be subjected to wire bonding. Chip data can adopt a DWG format, and the DWG format is a file format of a two-dimensional design which is commonly used at present. In addition, other file formats for designing the chip may be used as the file format type of the chip data acquired by the software.

And S20, generating a mapping template corresponding to the chip data according to the chip data.

Specifically, since the chip data includes data such as the size of the chip, the position coordinates of the chip element, and the position coordinates of the pair of bonding pads, a blank chip template is generated according to the size of the chip, that is, the size data of the chip, an initial template is constructed on the chip template according to the position coordinates of the element in the chip data, and then, automatic wiring is performed on the initial template according to bonding information related to bonding such as the position coordinates of the pair of bonding pads, so as to generate a mapping template corresponding to the chip data.

Furthermore, the chip data also includes data irrelevant to the bonding wires, and in order to simplify the processing flow and improve the generation efficiency of the mapping template, data extraction is performed on the chip data according to a preset extraction rule to obtain template data used for generating the mapping template in the chip data. And then generating a mapping template corresponding to the chip data based on the template data. In this embodiment, in combination with the subsequent matching of good-quality images, the set extraction rule is to extract size data of the chip, position coordinates corresponding to all the welding point pairs, and/or welding radian data corresponding to each welding point pair. In the bonding process, the shortest straight core state between two bonding pads is generally used as the bonding line, but in some special cases, such as the layout of the chip, the bonding operation is performed not by a straight line but by a curve with an inflection point in consideration of the heat dissipation during the operation of the chip. The welding arc data in the present embodiment indicates the direction and size of the corner when the inflection point is formed.

Dimensional data is the size of the chip to be soldered. In the welding, a certain welding point is connected with another welding point, so that the welding object is a pair of welding points, and the welding point data includes information about a plurality of welding points, which is taken as the welding point pair data in the embodiment. The pad pair data includes, for each pad pair, a positional coordinate of each pad, where the positional coordinate is a relative coordinate, i.e., a coordinate relative to the respective edge of the chip. In this embodiment, to distinguish the welding spots in the welding spot pair, the welding spot corresponding to the welding start is named as a first welding spot, and the welding spot corresponding to the welding end is named as a second welding spot.

The chip data includes the coordinates of each pair of solder points. In a first implementation manner of this embodiment, a blank template corresponding to the chip data is created according to the size data. And for each welding point pair, connecting according to the position coordinates corresponding to the welding point pair in the blank template, namely directly connecting the first welding point and the second welding point according to the coordinates corresponding to the first welding point and the second welding point in the welding point pair to obtain a welding curve.

In a second implementation manner of this embodiment, for each welding point pair, the welding point pair is connected according to the position coordinate corresponding to the welding point pair in the blank template to obtain an initial curve, that is, the first welding point and the second welding point are directly connected to obtain the initial curve. And then adjusting the initial curve according to the welding radian data to obtain an intermediate curve.

In the chip production process, due to the difference of the wire bonding process, even if the same circuit assembly is used, the results obtained by wire bonding are different due to the change of the wire bonding process such as the material of the selected chip, the raw material of the wire bonding and the like. For example, as the temperature increases, the material increases in various degrees, so that in the actual wire bonding process, even if the bonding wires are the same in line, there is a certain difference, not exactly the same, between the chips detected by the detecting device. Therefore, before detection, the corresponding expansion parameter is determined according to the process parameter corresponding to the chip data. I.e., the normal deviation of the bond wires when the chip is produced in this process. And expanding the intermediate curve according to the expansion parameters to obtain a welding curve. The weld curve is similar to a channel and has a boundary within which all weld lines are qualified when detected.

And S30, matching the mapping template with a preset good product image to obtain a matching result.

Specifically, the good chip image refers to a template image obtained by photographing a good chip, and as described above, the good chip is a chip that has been inspected to be qualified. In this embodiment, the good chips are identical to the chip circuits corresponding to the chip data. Therefore, the mapping template obtained according to the good chips can be matched to obtain a matching result. In the matching process, according to the welding lines in the good-product image, whether the welding curve in the template has broken lines or not, the optimal connection scheme of the connection scheme in the mapping template and the like are determined, and the contents are used as the matching result.

When matching is carried out, frame identification can be carried out on the good product image, the image coordinates of the chips in the good product image are determined, and then the mapping templates and the good product image are positioned according to the image coordinates, so that a reference curve corresponding to the welding curve in each mapping template in the good product image and a welding point corresponding to each welding point in the good product image are determined.

And S40, adjusting the mapping template according to the matching result to obtain a reference template.

Specifically, the mapping template is adjusted according to the matching result.

And if the matching result is that the broken line exists, complementing the welding line with the broken line in the mapping template so as to completely connect the welding point pair corresponding to the welding line, taking the welding curve to be complemented as a curve to be corrected in the complementing process, and complementing the intermediate curve corresponding to the curve to be corrected according to the good product image to obtain a complementing curve. And then, according to the expansion parameters, carrying out complement treatment on the complement curve to obtain a corrected correction curve.

If the welding wire scheme in the mapping template has a larger difference with the good product image, the connection scheme in the mapping template may not be the optimal connection scheme, the welding curve with the larger difference in the good product image is determined as a curve to be corrected, and then the curve to be corrected is corrected according to the shape of the welding wire corresponding to the curve to be corrected in the good product chip, so that the corrected correction curve is obtained.

In the above two adjusting modes, which are only the two conditions of the wire breakage and the non-optimal wire connection scheme, other types of matching results may exist during matching, for example, the radian of a certain welding curve has slight change, and the mapping image can be adjusted by referring to the welding point pairs and the reference curve in the good-quality image. And will not be described in detail herein.

After the reference template is obtained, the reference template is sent to a chip detection device connected in advance, the chip detection device detects the bonding wires in the chips obtained through production one by one according to the reference template, whether the bonding wires in each chip are completely connected or not is determined, and whether the layout of the bonding wires is the same as or close to that of a good chip or not is determined, so that the quality detection of the generated chips is realized.

Based on the above method for generating a reference template for chip inspection, the present embodiment provides an apparatus for generating a reference template for chip inspection, where the apparatus for generating a reference template for chip inspection includes:

the acquisition module is used for acquiring chip data;

the generating module is used for generating a mapping template corresponding to the chip data according to the chip data;

the matching module is used for matching the mapping template with a preset good product image to obtain a matching result;

and the adjusting module is used for adjusting the mapping template according to the matching result to obtain a reference template.

Wherein the generating module comprises:

the extraction unit is used for extracting template data in the chip data according to a preset extraction rule;

and the generating unit is used for generating a mapping template corresponding to the chip data according to the template data.

The template data comprises size data and position coordinates corresponding to a plurality of welding point pairs.

Wherein the generating unit includes:

a creating subunit, configured to create, according to the size data, a blank template corresponding to the chip data;

and the connecting subunit is used for connecting lines on the blank template according to the position coordinates corresponding to the welding point pair in the blank template aiming at each welding point pair, and generating a welding curve corresponding to the welding point and a mapping template comprising the welding curve.

The chip data also comprises welding radian data corresponding to each welding point pair; the connecting unit is specifically configured to:

for each welding point pair, connecting the welding point pair according to the position coordinate corresponding to the welding point pair in the blank template to obtain an initial curve;

adjusting the initial curve according to the welding radian data to obtain an intermediate curve;

and expanding the intermediate curve according to preset expansion parameters to obtain a welding curve and the mapping template.

The device for generating the reference template for chip detection further includes a preprocessing unit, where the preprocessing unit is specifically configured to:

acquiring process parameters corresponding to chip data;

and determining expansion parameters corresponding to the chip data according to the process parameters.

The device for generating a reference template for chip detection further includes a sending unit, where the sending unit is specifically configured to:

and sending the reference template to a chip detection device connected in advance so that the chip detection device can detect the chip to be detected according to the reference template.

Based on the above-mentioned method for generating a reference template for chip detection, the present embodiment provides a computer-readable storage medium, where one or more programs are stored, and the one or more programs are executable by one or more processors to implement the steps in the method for generating a reference template for chip detection according to the above-mentioned embodiment.

Based on the above method for generating a reference template for chip detection, the present invention further provides a terminal device, as shown in fig. 4, which includes at least one processor (processor) 20; a display screen 21; and a memory (memory)22, and may further include a communication Interface (Communications Interface)23 and a bus 24. The processor 20, the display 21, the memory 22 and the communication interface 23 can communicate with each other through the bus 24. The display screen 21 is configured to display a user guidance interface preset in the initial setting mode. The communication interface 23 may transmit information. The processor 20 may call logic instructions in the memory 22 to perform the methods in the embodiments described above.

Furthermore, the logic instructions in the memory 22 may be implemented in software functional units and stored in a computer readable storage medium when sold or used as a stand-alone product.

The memory 22, which is a computer-readable storage medium, may be configured to store a software program, a computer-executable program, such as program instructions or modules corresponding to the methods in the embodiments of the present disclosure. The processor 20 executes the functional application and data processing, i.e. implements the method in the above-described embodiments, by executing the software program, instructions or modules stored in the memory 22.

The memory 22 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal device, and the like. Further, the memory 22 may include a high speed random access memory and may also include a non-volatile memory. For example, a variety of media that can store program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk, may also be used as the transient computer readable storage medium.

In addition, the specific processes loaded and executed by the instruction processors in the computer-readable storage medium and the terminal device are described in detail in the method, and are not stated herein.

Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.