阅读说明：本技术 新型输出电流可调的GaAs开关驱动电路 (Novel output current adjustable GaAs switch drive circuit ) 是由 黄华 曲雄飞 陈普锋 全金海 于 2020-06-24 设计创作，主要内容包括：本发明涉及集成电路技术领域,尤其涉及一种新型输出电流可调的GaAs开关驱动电路,包括输入缓冲器电路,控制电路,输出缓冲器电路；所述输入缓冲器电路将输入控制信号转换为互补的两路信号进行缓冲放大；所述输入缓冲器与输出缓冲器之间通过双端互补输入双端互补输出相连接；所述控制电路与输出缓冲器电路相连接；所述输出缓冲器包含负载电流切换电路,通过调节负载电流的大小,来达到提高驱动能力与降低电路功耗的作用。(The invention relates to the technical field of integrated circuits, in particular to a novel GaAs switch driving circuit with adjustable output current, which comprises an input buffer circuit, a control circuit and an output buffer circuit, wherein the input buffer circuit is connected with the output buffer circuit; the input buffer circuit converts the input control signal into two complementary signals for buffering and amplification; the input buffer and the output buffer are connected through a double-end complementary input and double-end complementary output; the control circuit is connected with the output buffer circuit; the output buffer comprises a load current switching circuit, and the driving capability is improved and the power consumption of the circuit is reduced by adjusting the load current.)

1. The utility model provides a novel output current adjustable GaAs switch drive circuit which characterized in that: comprises an input buffer, a control circuit and an output buffer; the input buffer adopts a negative voltage conversion circuit and converts the control signal into a complementary signal; the control circuit generates a control signal and is connected with the output buffer amplifier circuit; the input buffer and the output buffer are connected through a double-end complementary input and double-end complementary output; the output buffer comprises a load current switching circuit, and the driving capability is improved and the power consumption of the circuit is reduced by adjusting the load current.

2. The novel GaAs switch driving circuit with adjustable output current of claim 1, wherein: the input signal of the input buffer is connected with a depletion type field effect transistor M1 and a resistor R1 through four diodes which are connected in series to form a level conversion circuit, the converted control signal is continuously transmitted to a complementary signal generating circuit through a voltage reduction resistor R2, the complementary signal generating circuit comprises two enhancement type field effect transistors M2 and M3, two depletion type field effect transistors M4 and M5 and two load resistors R3 and R4, and the generated complementary control signal is connected to an output buffer amplifier circuit.

3. The novel GaAs switch driving circuit with adjustable output current of claim 1, wherein: the output buffer is composed of two enhancement type field effect transistors M6 and M7, eight depletion type field effect transistors M8-M15 and eight switching tubes SPST1-SPST8, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M6 and M7 of the output buffer amplifier, eight control signals output by the control circuit are respectively connected with the switching tubes SPST1-SPST8 of the output buffer amplifier, and the switching tubes SPST1-SPST8 are respectively connected with the load depletion type field effect transistors M8-M15 in parallel; the output buffer amplifier outputs a double-end complementary driving signal, and finally directly drives the GaAs switch.

4. The novel GaAs switch driving circuit with adjustable output current of claim 1, wherein: the output buffer consists of two enhancement type field effect transistors M16 and M17, eight resistors R5-R12 and eight switching tubes SPST9-SPST16, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M16 and M17 of the output buffer amplifier, eight control signals output by the control circuit are respectively connected with the switching tubes SPST9-SPST16 of the output buffer amplifier, and the switching tubes SPST9-SPST16 are respectively connected with the resistors R5-R12 in parallel; the resistors R8-R12 and the switch tubes SPST9-SPST16 jointly form a load end of the output buffer, the size of the load is changed, so that the size of driving current is changed, the driving capability and the power consumption level of the driver can be changed, the number of the resistors connected into the load branches is realized by controlling the on and off of the switch tubes connected to the two ends of the load resistor in parallel, and the function of changing the size of the load is achieved.

5. The novel GaAs switch driving circuit with adjustable output current of claim 1, wherein: the output buffer is composed of two enhancement type field effect transistors M18 and M19, two depletion type field effect transistors M20-M21, eight resistors R13-R20 and eight switching tubes SPST17-SPST21, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M18 and M19 of the output buffer amplifier, eight control signals output by the control circuit are respectively connected with the switching tubes SPST17-SPST21 and the depletion type field effect transistors M20-M21 of the output buffer amplifier, and the switching tubes SPST17-SPST21 are respectively connected with the resistors R13-R20 in parallel; the depletion type field effect transistors M20 and M21, the resistors R13-R20 and the switch transistors SPST17-SPST24 jointly form a load end of the output buffer, the driving capacity and the power consumption level of the driver can be changed by changing the size of the load so as to change the size of the driving current, and the number of the resistors connected to the load branches is realized by controlling the on and off of the switch transistors connected to the two ends of the load resistor in parallel, so that the function of changing the size of the load is achieved.

6. The novel GaAs switch driving circuit with adjustable output current of claim 1, wherein: the output buffer is composed of two enhancement type field effect transistors M32 and M33, eight resistors R21-28 and eight switch tubes SPST33-SPST40, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M32 and M33 of the output buffer amplifier, eight control signals output by the control circuit are respectively connected with the switch tubes SPST33-SPST40 of the output buffer amplifier, and the switch tubes SPST33-SPST40 are respectively connected with the resistors R21-28 in series; the resistors R21-R28 and the switch tubes SPST33-SPST40 jointly form a load end of the output buffer, the size of the load is changed, so that the size of driving current is changed, the driving capability and the power consumption level of the driver can be changed, the number of the resistors connected into the load branches is realized by controlling the connection and disconnection of the series-connected switches with the resistors, and the function of changing the size of the load is achieved.

7. The novel GaAs switch driving circuit with adjustable output current of claim 1, wherein: the output buffer is composed of two enhancement type field effect transistors M22 and M23, eight depletion type field effect transistors M24-M31 and eight switching tubes SPST25-SPST32, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M22 and M23 of the output buffer amplifier, eight control signals output by the control circuit are respectively connected with the switching tubes SPST25-SPST32 of the output buffer amplifier, and the switching tubes SPST25-SPST32 are respectively connected with the depletion type field effect transistors M24-M31 in series; the depletion type field effect transistors M24-M31 and the switching transistors SPST25-SPST32 jointly form a load end of the output buffer, the size of the load is changed, the size of driving current is changed, the driving capability and the power consumption level of the driver can be further changed, the number of the depletion type field effect transistors connected to load branches is achieved by controlling the turn-off and the turn-on of the switches connected to the source electrodes of the depletion type field effect transistors in series, and therefore the function of changing the size of the load is achieved.

8. The novel GaAs switch driving circuit with adjustable output current of claim 1, wherein: the output buffer is composed of two enhancement type field effect transistors M34 and M35, eight depletion type field effect transistors M36-M43, eight resistors R29-R36 and eight switching tubes SPST41-SPST48, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M34 and M35 of the output buffer amplifier, the eight control signals output by the control circuit are respectively connected with the switching tubes SPST41-SPST48 of the output buffer amplifier, and the switching tubes SPST41-SPST48 are respectively connected with the resistors R29-R36 and the depletion type field effect transistors M36-M43 in series; the depletion type field effect transistor M36-M43, the resistor R29-R36 and the switch tube SPST33-SPST40 jointly form a load end of the output buffer, the driving capacity and the power consumption level of the driver can be changed by changing the size of the load so as to change the size of the driving current, and the number of the resistors connected into the load branch and the depletion type field effect transistors is realized by controlling the turn-off and the turn-on of the series switch of the resistors, so that the function of changing the size of the load is achieved.

9. The novel GaAs switch driving circuit with adjustable output current of claim 1, wherein: the control circuit comprises eight three-input AND gate circuits, and each three-input AND gate circuit consists of four enhancement type field effect transistors, two depletion type field effect transistors and two resistors. Input signals C _ IN1, C _ IN2 and C _ IN3 of the control circuit are respectively connected with the grids of enhancement type field effect transistors M46, M47 and M48, the source electrode of the enhancement type field effect transistor M48 is connected with VEE, one end of a resistor R37 is connected with the drain electrode of the enhancement type field effect transistor M46 and the grid electrode of a depletion type field effect transistor M44, and the other end of the resistor R37 is connected with the source electrode of the depletion type field effect transistor M44; the source electrode of the enhancement type field effect transistor M49 is connected with VEE, one end of a resistor R38 is connected with the drain electrode of the enhancement type field effect transistor M49 and the grid electrode of the depletion type field effect transistor M45, and the other end of the resistor R38 is connected with the source electrode of the depletion type field effect transistor M45; the output of the encoding circuit is realized by changing the input signal, thereby controlling the output buffer circuit.

Technical Field

The invention relates to the technical field of integrated circuits, in particular to a novel GaAs switch driving circuit with adjustable output current.

Background

The GaAs switch tube is widely used as a communication switch device due to the advantages of low conduction internal resistance, high switching speed and the like, and the basic task of the driving circuit which is selected to control the switch tube is to convert a transmitted control signal into a signal capable of enabling the switch tube to be conducted or disconnected according to the target requirement.

GaAs has better electronic characteristics compared with Si and higher saturated electron rate and electron mobility, so that GaAs can be applied to the fields of radio frequency and microwave communication, and meanwhile, GaAs has higher breakdown voltage and is more suitable for high-power occasions compared with Si devices; however, because of the limitation of the existing GaAs process, it is difficult to integrate a large-scale control circuit, and meanwhile, compared with the Si process, GaAs has larger disadvantages in power consumption and working speed, thereby affecting the indexes of the whole chip, such as power consumption, switching time, and the like.

At present, the traditional GaAs switch driving structure in the industry drives the load switch tube, the load current of the load switch tube is not controllable, if the switch tubes of different loads are met, fixed driving current is used, and therefore the switching time caused by insufficient driving capability is slowed down, or the power consumption of the whole chip is increased due to the excessive driving capability.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provides a novel GaAs switch driving circuit with adjustable output current.

In order to achieve the purpose, the invention adopts the following technical scheme: the utility model provides a novel output current adjustable GaAs switch drive circuit which characterized in that: comprises an input buffer, a control circuit and an output buffer; the input buffer adopts a negative voltage conversion circuit and converts the control signal into a complementary signal; the control signal generated by the control circuit is connected with the output buffer amplifier circuit; the input buffer and the output buffer are connected through a double-end complementary input and double-end complementary output; the output buffer comprises a load current switching circuit, and the driving capability is improved and the power consumption of the circuit is reduced by adjusting the load current.

Preferably, the input signal of the input buffer and the depletion type field effect transistor M1 are connected in series, the resistor R1 jointly form a level conversion circuit, the converted control signal is continuously transmitted to the complementary signal generating circuit through the voltage reduction resistor R2, the circuit comprises two enhancement type field effect transistors M2 and M3, two depletion type field effect transistors M4 and M5, and two load resistors R3 and R4 jointly form a load, and the generated complementary control signal is connected to the output buffer amplifier circuit.

Preferably, the output buffer is composed of two enhancement type field effect transistors M6 and M7, eight depletion type field effect transistors M8-M15 and eight switching transistors SPST1-SPST8, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M6 and M7 of the output buffer amplifier, control signals output by the control circuit are respectively connected with the switching transistors SPST1-SPST8 of the output buffer amplifier, and the switching transistors SPST1-SPST8 are respectively connected with the load depletion type field effect transistors M8-M15 in parallel; the output buffer amplifier outputs a double-end complementary driving signal, and finally directly drives the GaAs switch.

Preferably, the output buffer is composed of two enhancement type field effect transistors M16 and M17, eight resistors R5-R12 and eight switching tubes SPST9-SPST16, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M16 and M17 of the output buffer amplifier, control signals output by the control circuit are respectively connected with the switching tubes SPST9-SPST16 of the output buffer amplifier, and the switching tubes SPST9-SPST16 are respectively connected with the resistors R5-R12 in parallel; the resistors R8-R12 and the switch tubes SPST9-SPST16 jointly form a load end of the output buffer, the size of the load is changed, so that the size of driving current is changed, the driving capability and the power consumption level of the driver can be changed, the number of the resistors connected into the load branches is realized by controlling the on and off of the switch tubes connected to the two ends of the load resistor in parallel, and the function of changing the size of the load is achieved.

Preferably, the output buffer is composed of two enhancement type field effect transistors M18 and M19, two depletion type field effect transistors M20-M21, eight resistors R13-R20 and eight switching tubes SPST17-SPST21, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M18 and M19 of the output buffer amplifier, control signals output by the control circuit are respectively connected with the switching tubes SPST17-SPST21 and the depletion type field effect transistors M20-M21 of the output buffer amplifier, wherein the switching tubes SPST17-SPST21 are respectively connected with the resistors R13-R20 in parallel; the depletion type field effect transistors M20 and M21, the resistors R13-R20 and the switch transistors SPST17-SPST24 jointly form a load end of the output buffer, the driving capacity and the power consumption level of the driver can be changed by changing the size of the load so as to change the size of the driving current, and the number of the resistors connected to the load branches is realized by controlling the on and off of the switch transistors connected to the two ends of the load resistor in parallel, so that the function of changing the size of the load is achieved.

Preferably, the output buffer is composed of two enhancement type field effect transistors M32 and M33, eight resistors R21-28 and eight switching tubes SPST33-SPST40, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M32 and M33 of the output buffer amplifier, control signals output by the control circuit are respectively connected with the switching tubes SPST33-SPST40 of the output buffer amplifier, and the switching tubes SPST33-SPST40 are respectively connected with the resistors R21-28 in series; the resistors R21-R28 and the switch tubes SPST33-SPST40 jointly form a load end of the output buffer, the size of the load is changed, so that the size of driving current is changed, the driving capability and the power consumption level of the driver can be changed, the number of the resistors connected into the load branches is realized by controlling the connection and disconnection of the series-connected switches with the resistors, and the function of changing the size of the load is achieved.

Preferably, the output buffer is composed of two enhancement type field effect transistors M22 and M23, eight depletion type field effect transistors M24-M31 and eight switching transistors SPST25-SPST32, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M22 and M23 of the output buffer amplifier, control signals output by the control circuit are respectively connected with the switching transistors SPST25-SPST32 of the output buffer amplifier, and the switching transistors SPST25-SPST32 are respectively connected with the depletion type field effect transistors M24-M31 in series; the depletion type field effect transistors M24-M31 and the switching transistors SPST25-SPST32 jointly form a load end of the output buffer, the size of the load is changed, the size of driving current is changed, the driving capability and the power consumption level of the driver can be further changed, the number of the depletion type field effect transistors connected to load branches is achieved by controlling the turn-off and the turn-on of the switches connected to the source electrodes of the depletion type field effect transistors in series, and therefore the function of changing the size of the load is achieved.

Preferably, the output buffer is composed of two enhancement type field effect transistors M34 and M35, eight depletion type field effect transistors M36-M43, eight resistors R29-R36 and eight switching tubes SPST41-SPST48, complementary control signals output by the input buffer amplifier are connected with the enhancement type field effect transistors M34 and M35 of the output buffer amplifier, control signals output by the control circuit are respectively connected with the switching tubes SPST41-SPST48 of the output buffer amplifier, and the switching tubes SPST41-SPST48 are respectively connected with the resistors R29-R36 and the depletion type field effect transistors M36-M43 in series; the depletion type field effect transistor M36-M43, the resistor R29-R36 and the switch tube SPST33-SPST40 jointly form a load end of the output buffer, the driving capacity and the power consumption level of the driver can be changed by changing the size of the load so as to change the size of the driving current, and the number of the resistors connected into the load branch and the depletion type field effect transistors is realized by controlling the turn-off and the turn-on of the series switch of the resistors, so that the function of changing the size of the load is achieved.

Preferably, the control circuit comprises eight three-input and gate circuits, and each three-input and gate circuit comprises four enhancement type field effect transistors, two depletion type field effect transistors and two resistors. The input signal of the control circuit is connected with the enhancement type field effect transistors M46-M48, and the resistors R37-R38 and the enhancement type field effect transistors M44-M45 form a load end; the eight combined three-input AND gate circuits form an encoding circuit, and the output of the encoding circuit is realized by changing an input control signal, so that the load of the output buffer circuit is controlled.

The output buffer amplifier has the beneficial effects that the output buffer amplifier adopts a load switchable structure, so that the effect of driving the output current to be variable is achieved, the adaptability of the GaAs switch driving chip using the structure to GaAs is greatly enhanced, one chip can be matched with a plurality of GaAs switches with different switch sizes, and the mutual selection of the switching time and the power consumption of the chip can be achieved according to different use occasions.

Drawings

Fig. 1 is an overall block diagram of a GaAs switch driving circuit whose output current is controllable;

FIG. 2 is a circuit diagram of a single-ended input complementary output buffer amplifier;

FIG. 3 is a circuit diagram of a current controlled output buffer amplifier of a first novel complementary output of the present invention;

FIG. 4 is a circuit diagram of a current controlled output buffer amplifier of a second novel complementary output of the present invention;

FIG. 5 is a circuit diagram of a current controlled output buffer amplifier of a third novel complementary output of the present invention;

FIG. 6 is a circuit diagram of a fourth novel complementary output current-controlled output buffer amplifier according to the present invention;

FIG. 7 is a circuit diagram of a current controlled output buffer amplifier of a fifth novel complementary output of the present invention;

FIG. 8 is a circuit diagram of a sixth novel complementary output current controlled output buffer amplifier of the present invention;

FIG. 9 is a circuit diagram of a control circuit;

FIG. 10 is a graph of drive switch time simulation in accordance with the present invention;

FIG. 11 is a current consumption simulation diagram of the present invention.

Detailed Description

The upper rail of the power supply required by the circuit provided by the invention is GND-0V, and the lower rail of the power supply required by the circuit is VEE-5V, so that the driving circuit is compatible with the GaAs switching circuit.

As shown in fig. 1, fig. 1 is an overall block diagram of a current-tunable GaAs switch driver circuit, which includes an input buffer circuit, a control circuit, and an output buffer circuit. The invention improves the traditional GaAs switch driving basic framework and provides a novel GaAs switch driving structure with adjustable current. Through adjusting the magnitude of drive current to the drive current is adjusted to the GaAs switch of different driving capacities to the needs, reaches good matching, thereby reaches better switching time, obtains the minimum consumption simultaneously.

As shown in fig. 2, the input buffer is composed of four diodes, four resistors, two enhancement mode fets, and three depletion mode fets; an input signal CT is connected to the anode of a diode D1, the cathode of the input signal CT is connected to the anode of the next diode D2, diodes D2 to D4 are sequentially connected, the cathode of the diode D4 is connected with the drain of a depletion type field effect transistor M1, the source of the depletion type field effect transistor M1 is connected with one end of a resistor R1, and the gate of the depletion type field effect transistor M1 is connected with the other end of the resistor R1 and is connected with a voltage VEE; the cathode of the diode D4 is connected with the drain of the M1 depletion type field effect transistor and one end of a resistor R2, the other end of the resistor R2 is connected with the grid of an enhancement type field effect transistor M1, the source of the enhancement type field effect transistor M1 is connected with a power supply VEE, the drain of the enhancement type field effect transistor M1 is connected with the grids of the enhancement type field effect transistor M2 and the depletion type field effect transistor M3 and is simultaneously connected with one end of a resistor R3, the other end of the resistor R3 is connected with the source of the depletion type field effect transistor M4, and the drain of the depletion type field effect transistor M4 is connected with the ground; the source electrode of the enhancement type field effect transistor M3 is connected with VEE, the drain electrode is connected with the grid electrode of the depletion type field effect transistor M5 and one end of a resistor R4, the other end of the resistor R4 is connected with the source electrode of the depletion type field effect transistor M5, and the drain electrode of the depletion type field effect transistor M5 is connected with the ground; the outputs of the input buffers are respectively led OUT from the drains of the enhancement mode field effect transistors M2 and M3, and are respectively OUT _ A, OUT _ B.

As shown in fig. 3, the output buffer is composed of two enhancement mode fets, eight depletion mode fets, and eight switching transistors. The input signal of the output buffer is two complementary input levels IN _ A, IN _ B, which are respectively connected with the output signal OUT _ A, OUT _ B of the input buffer; the input signal IN _ A, IN _ B is connected with the gate ends of enhancement type field effect transistors M6 and M7, the source of the enhancement type field effect transistor M6 is connected with VEE, the drain is connected with the gates of M8, M9, M10 and M11, and simultaneously connected with the source of the depletion type field effect transistor M11 and one end of a switch tube SPST4, the drain of the depletion type field effect transistor M11 is connected with the source of the depletion type field effect transistor M10 and the switch tube SPST3, the drain of the depletion type field effect transistor M10 is connected with the source of the depletion type field effect transistor M9 and the switch tube SPST2, the drain of the depletion type field effect transistor M9 is connected with the source of the depletion type field effect transistor M8 and the switch tube SPST1, and the drain of the depletion type field effect transistor M8 is connected with the ground; the source of the enhancement mode field effect transistor M7 is connected with VEE, the drain is connected with the grids of M12, M13, M14 and M15, and is also connected with the source of the depletion mode field effect transistor M15 and one end of the switch tube SPST8, the drain of the depletion mode field effect transistor M15 is connected with the source of the depletion mode field effect transistor M14 and the switch tube SPST7, the drain of the depletion mode field effect transistor M14 is connected with the source of the depletion mode field effect transistor M13 and the switch tube SPST6, the drain of the depletion mode field effect transistor M13 is connected with the source of the depletion mode field effect transistor M12 and the switch tube SPST5, and the drain of the depletion mode field effect transistor M12 is connected with the ground; the outputs of the output buffers are respectively led out from the drains of the enhancement mode field effect transistors M6 and M7, and are respectively DRV _ A, DRV _ B. M8-M11, M12-M15 and SPST1-SPST8 jointly constitute the load end of the output buffer, through the size that changes the load, thereby can change the size of drive current, and then can change the driving ability and the power consumption level of driver, through the switch-on and the switch-off of the switch tube that connects in parallel at depletion type field effect transistor source drain both ends, realize the quantity of the branch circuit field effect transistor of cut-in load, thereby reach the function of changing load size.

Fig. 4 shows another output buffer, which is composed of two enhancement mode fets, eight resistors, and eight switching transistors. The input signal of the output buffer is two complementary input levels IN _ A, IN _ B, which are respectively connected with the output signal OUT _ A, OUT _ B of the input buffer; the input signal IN _ A, IN _ B is connected with the gate ends of enhancement type field effect transistors M16 and M17, the source of the enhancement type field effect transistor M16 is connected with VEE, the drain of the enhancement type field effect transistor M16 is connected with a resistor R8 and one end of a switch tube SPST12, the other end of a resistor R8 is connected with one end of a resistor R7 and one end of a switch tube SPST12, the other end of a resistor R7 is connected with one end of a resistor R6 and one end of a switch tube SPST11, the other end of the resistor R6 is connected with one end of a resistor R5 and one end of a switch tube SPST10, and the other end of the resistor R5 is connected with ground and one end of a switch tube SPST 9; the source of the enhancement mode field effect transistor M17 is connected with VEE, the drain is connected with the resistor R12 and one end of the switch tube SPST16, the other end of the resistor R12 is connected with one end of the resistor R11 and the switch tube SPST16, the other end of the resistor R11 is connected with one end of the resistor R10 and the switch tube SPST15, the other end of the resistor R10 is connected with one end of the resistor R9 and the switch tube SPST14, and the other end of the resistor R9 is connected with ground and the switch tube SPST 13. The outputs of the output buffers are respectively led out from the drains of the enhancement mode field effect transistors M16 and M17, and are respectively DRV _ A, DRV _ B. R8-R12 and SPST9-SPST16 jointly form the load end of the output buffer, through changing the size of the load, thus can change the size of the drive current, and then can change the drive capability and power consumption level of the driver, through controlling the switch-on and switch-off of the switch tube connected in parallel at both ends of the load resistance, realize the quantity of the branch resistance of the cut-in load, thus achieve the function of changing the size of the load.

Fig. 5 shows another output buffer, which is composed of two enhancement mode fets, two depletion mode fets, eight resistors, and eight switching transistors. The input signal of the output buffer is two complementary input levels IN _ A, IN _ B, which are respectively connected with the output signal OUT _ A, OUT _ B of the input buffer; the input signal IN _ A, IN _ B is connected with the gate ends of enhancement mode field effect transistors M18 and M19, the source end of the enhancement mode field effect transistor M18 is connected with VEE, the drain end is connected with the grid of a resistor R16 and a depletion mode field effect transistor M20, and is also connected with one end of a switch tube SPST20, the other end of the resistor R16 is connected with one end of a resistor R15, and is also connected with a switch tube SPST20, the other end of the resistor R15 is connected with one end of a resistor R13, and is also connected with a switch tube SPST19, the other end of the resistor R14 is connected with one end of a resistor R13, and is also connected with a switch tube SPST18, the other end of a resistor R13 is connected with the source end of a depletion mode field effect transistor M20, and is also connected with a switch tube SPST17, and the drain end; the source of the enhancement mode field effect transistor M19 is connected with VEE, the drain is connected with the grids of the resistor R20 and the depletion mode field effect transistor M21 and is also connected with one end of the switch tube SPST24, the other end of the resistor R20 is connected with one end of the resistor R19 and is also connected with the switch tube SPST24, the other end of the resistor R19 is connected with one end of the resistor R18 and is also connected with the switch tube SPST23, the other end of the resistor R18 is connected with one end of the resistor R17 and is also connected with the switch tube SPST22, the other end of the resistor R17 is connected with the source of the depletion mode field effect transistor M21 and is also connected with the switch tube SPST21, and the drain of the depletion mode field effect transistor M21 is connected with the. The outputs of the output buffers are respectively led out from the drains of the enhancement mode field effect transistors M18 and M19, and are respectively DRV _ A, DRV _ B. The depletion type field effect transistors M20 and M21, the resistors R13-R20 and the switch transistors SPST17-SPST24 jointly form a load end of the output buffer, the size of the load is changed, the size of driving current can be changed, the driving capability and the power consumption level of the driver can be further changed, the number of the resistors connected into load branches is realized by controlling the on-off of the switch transistors connected to the two ends of the load resistor in parallel, and the function of changing the size of the load is achieved.

Fig. 6 shows another output buffer, which is composed of two enhancement mode fets, eight resistors, and eight switching transistors. The input signal of the output buffer is two complementary input levels IN _ A, IN _ B, which are respectively connected with the output signal OUT _ A, OUT _ B of the input buffer; the input signal IN _ A, IN _ B is connected with the grid ends of enhancement type field effect transistors M32 and M33, the source electrode of the enhancement type field effect transistor M32 is connected with VEE, the drain electrode of the enhancement type field effect transistor M32 is connected with one end of a switch tube SPST33-SPST36, a resistor R21 is connected with the other end of a switch tube SPST33, a resistor R22 is connected with the other end of a switch tube SPST34, a resistor R23 is connected with the other end of a switch tube SPST27, a resistor R24 is connected with the other end of a switch tube SPST28, and the other ends of the resistors R21-R24 are connected with the ground; the source electrode of the enhancement type field effect transistor M33 is connected with VEE, the drain electrode of the enhancement type field effect transistor M33 is connected with one end of a switch tube SPST37-SPST40, a resistor R25 is connected with the other end of the switch tube SPST37, a resistor R26 is connected with the other end of a switch tube SPST38, a resistor R27 is connected with the other end of the switch tube SPST39, a resistor R28 is connected with the other end of the switch tube SPST40, and the other ends of the resistors R25-R28 are connected with the ground; the outputs of the output buffers are respectively led out from the drains of the enhancement mode field effect transistors M32 and M33, and are respectively DRV _ A, DRV _ B. The resistors R21-R28 and the switch tubes SPST33-SPST40 jointly form a load end of the output buffer, the size of the load is changed, so that the size of driving current can be changed, the driving capability and the power consumption level of the driver can be changed, the number of the resistors connected into the load branches is achieved by controlling the connection and disconnection of the series-connected switches of the resistors, and the function of changing the size of the load is achieved.

Fig. 7 shows another output buffer composed of two enhancement mode fets, eight depletion mode fets, and eight switching transistors. The input signal of the output buffer is two complementary input levels IN _ A, IN _ B, which are respectively connected with the output signal OUT _ A, OUT _ B of the input buffer; the input signal IN _ A, IN _ B is connected with the grid ends of enhancement type field effect transistors M22 and M23, the source of the enhancement type field effect transistor M22 is connected with VEE, the drain is connected with the grid of depletion type field effect transistors M24-M27 and is simultaneously connected with one ends of switch transistors SPST25-SPST28, the source of the depletion type field effect transistor M24 is connected with the other end of the switch transistor SPST25, the source of the depletion type field effect transistor M25 is connected with the other end of the switch transistor SPST26, the source of the depletion type field effect transistor M26 is connected with the other end of the switch transistor SPST27, the source of the depletion type field effect transistor M27 is connected with the other end of the switch transistor SPST28, and the drain of the depletion type field effect transistors M24-M27 is connected with the ground; the source electrode of the enhancement type field effect transistor M23 is connected with VEE, the drain electrode is connected with the grid electrode of the depletion type field effect transistor M28-M31 and is also connected with one end of the switch tube SPST29-SPST32, the source electrode of the depletion type field effect transistor M28 is connected with the other end of the switch tube SPST29, the source electrode of the depletion type field effect transistor M29 is connected with the other end of the switch tube SPST30, the source electrode of the depletion type field effect transistor M30 is connected with the other end of the switch tube SPST31, the source electrode of the depletion type field effect transistor M31 is connected with the other end of the switch tube SPST32, and the drain electrode of the depletion type field effect transistor M28-M31 is connected; the outputs of the output buffers are respectively led out from the drains of the enhancement mode field effect transistors M22 and M23, and are respectively DRV _ A, DRV _ B. The depletion type field effect transistors M24-M31 and the switching transistors SPST25-SPST32 jointly form a load end of the output buffer, the size of the load is changed, the size of driving current can be changed, the driving capability and the power consumption level of the driver can be further changed, the number of the depletion type field effect transistors connected to load branches is achieved by controlling the turn-off and the turn-on of the switches connected to the source electrodes of the depletion type field effect transistors in series, and therefore the function of changing the size of the load is achieved.

Fig. 8 shows another output buffer, which is composed of two enhancement mode fets, eight depletion mode fets, eight resistors, and eight switching transistors. The input signal of the output buffer is two complementary input levels IN _ A, IN _ B, which are respectively connected with the output signal OUT _ A, OUT _ B of the input buffer; an input signal IN _ A, IN _ B is connected with the gate ends of enhancement type field effect transistors M34 and M35, the source of the enhancement type field effect transistor M34 is connected with VEE, the drain of the enhancement type field effect transistor M36-M39 is connected with the gate of a depletion type field effect transistor M36-M39 and one ends of switching tubes SPST41-SPST44, one end of a resistor R29 is connected with the other end of the switching tube SPST41 and is connected with the source of the depletion type field effect transistor M36, one end of a resistor R30 is connected with the other end of the switching tube SPST42 and is connected with the source of the depletion type field effect transistor M37, one end of a resistor R31 is connected with the other end of the switching tube SPST43 and is connected with the source of the depletion type field effect transistor M38, and one end of a resistor R32 is connected with; one end of the resistor R33 is connected with the switching tube SPST45, the other end of the resistor R33 is connected with the source electrode of the depletion type field effect tube M40, one end of the resistor R34 is connected with the switching tube SPST46, the other end of the resistor R35 is connected with the switching tube SPST47, the other end of the resistor R35 is connected with the source electrode of the depletion type field effect tube M42, and one end of the resistor R36 is connected with the switching tube SPST48, and the other end of the resistor R36 is connected with the source electrode of the depletion type field effect tube M43. The outputs of the output buffers are respectively led out from the drains of the enhancement mode field effect transistors M34 and M35, and are respectively DRV _ A, DRV _ B. The depletion type field effect transistor M36-M43, the resistor R29-R36 and the switch tube SPST33-SPST40 jointly form a load end of the output buffer, the size of the load is changed, the size of the driving current can be changed, the driving capability and the power consumption level of the driver can be further changed, the number of the resistors connected into the load branch and the depletion type field effect transistors is realized by controlling the turn-off and the turn-on of the series switch of the resistors, and the function of changing the size of the load is achieved.

Fig. 9 shows an encoding circuit of the control circuit, which includes eight three-input and gate circuits, each of which is composed of four enhancement fets, two depletion fets, and two resistors. Input signals C _ IN1, C _ IN2 and C _ IN3 of the control circuit are respectively connected with the grids of enhancement type field effect transistors M46, M47 and M48, the source electrode of the enhancement type field effect transistor M48 is connected with VEE, one end of a resistor R37 is connected with the drain electrode of the enhancement type field effect transistor M46 and the grid electrode of a depletion type field effect transistor M44, and the other end of the resistor R37 is connected with the source electrode of the depletion type field effect transistor M44; the source electrode of the enhancement type field effect transistor M49 is connected with VEE, one end of a resistor R38 is connected with the drain electrode of the enhancement type field effect transistor M49 and the grid electrode of the depletion type field effect transistor M45, and the other end of the resistor R38 is connected with the source electrode of the depletion type field effect transistor M45; the output of the encoding circuit is realized by changing the input signal, thereby controlling the output buffer circuit.

Fig. 10 shows a simulation result of the time function of the switch driver, and the adjustment of the corresponding switching time is achieved by adjusting the magnitude of the driving current when the same switch is driven, and it can be seen from fig. 10 that the four-step change of the switching time is achieved by adjusting the current at 4 steps, and the switching time is respectively 20ns, 50ns, 80ns, and 100ns, which proves that the switch driver has the function of adjusting the switching time.

Fig. 11 shows a simulation result of current power consumption of the switch driver, and the power consumption is adjusted by adjusting the driving current of the driving buffer circuit, and as can be seen from fig. 10, through the current adjustment of 4 steps, four-step change of the current power consumption is achieved, and the corresponding currents are 1000uA, 300uA, 200uA and 180uA, respectively, which proves that the switch driver has the function of adjusting the current power consumption.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.