Method for extracting parasitic parameters of DC/DC converter

文档序号:1214187 发布日期:2020-09-04 浏览:6次 中文

阅读说明:本技术 一种dc/dc变换器寄生参数提取方法 (Method for extracting parasitic parameters of DC/DC converter ) 是由 王世山 李孟子 胡翔翔 杨随鑫 郭静 于 2020-04-08 设计创作,主要内容包括:本发明公开了一种DC/DC变换器寄生参数提取的方法,选其中一部分微带线作为参考线,其余作为信号线,根据信号线与参考线及周围电介质属性,将微带线与介质划分为若干单元,加以适当的边界条件,通过系统能量提取微带线寄生电容;分别对各线路加电流源,根据每个单元的电流密度和电压分布计算相应的寄生电阻;将系统内电介质全部换为自由空间,重新提取该条件下的微带线寄生电容,根据提取结果构造静电感应矩阵,利用传输线的感容参数关系提取微带线寄生电感,本发明的DC/DC变换器寄生参数提取的方法,能够解决DC/DC变换器的PCB微带线的寄生参数分析,以及高频共模噪声电流的建模和预测问题。(The invention discloses a method for extracting parasitic parameters of a DC/DC converter, wherein a part of microstrip lines are selected as reference lines, the rest are selected as signal lines, the microstrip lines and a medium are divided into a plurality of units according to the attributes of the signal lines, the reference lines and surrounding dielectric media, proper boundary conditions are added, and parasitic capacitance of the microstrip lines is extracted through system energy; applying a current source to each line, and calculating corresponding parasitic resistance according to the current density and voltage distribution of each unit; the method for extracting the parasitic parameters of the DC/DC converter can solve the problems of parasitic parameter analysis of the PCB microstrip line of the DC/DC converter and modeling and prediction of high-frequency common-mode noise current.)

1. A method for extracting parasitic parameters of a DC/DC converter is characterized by comprising the following steps: the method comprises the following steps:

step 1, obtaining a structure and parameters of a DC/DC converter, wherein the structure and parameters comprise the layout of signal lines and reference lines, the thickness of each signal line and each reference line, the relative permittivity, the relative permeability and the change with temperature of a dielectric medium, and the position of a grounding line, the grounding line is an infinite grounding plane, the grounding line is used as the reference line, other microstrip lines are used as the signal lines, each signal line is respectively numbered 1 and 2 … … n, the reference line is a conductor 0, and a (n +1) conductor transmission line system is constructed;

step 2, setting boundary conditions, applying voltage excitation to partial conductors in turn, grounding the rest conductors, calculating system energy storage under the corresponding boundary conditions, and listing a parasitic capacitance matrix;

step 3, dividing the microstrip line into a plurality of units, and extracting the high-frequency alternating-current internal resistance of the microstrip line according to finite element analysis of the time-harmonic field;

step 4, replacing all dielectrics in the system into free space; when the system is internally provided with a non-uniform medium, a microstrip line structure is reserved, the dielectric medium is virtually replaced by a free space, parasitic capacitance parameters of the microstrip line in the free space are extracted, and an electrostatic induction coefficient matrix is constructed;

and 5, extracting a parasitic inductance matrix of the microstrip line system by utilizing the relationship between the parasitic inductance in the free space and the static induction coefficient.

2. The DC/DC converter parasitic parameter extraction method according to claim 1, wherein: the microstrip line is a copper line and has negligible thickness relative to the surrounding medium.

3. The DC/DC converter parasitic parameter extraction method according to claim 1, wherein: step 2 specifically includes extracting parasitic capacitance of each microstrip line by using system energy and voltage distribution, keeping the potential of a grounded reference line at 0, equalizing the potential of a part of signal lines and the reference line, adding voltage U to the rest of the signal lines, solving system energy storage in the state, establishing an equation set related to the parasitic capacitance through the relation between the energy storage and the capacitance, and solving to obtain a parasitic capacitance matrix C, wherein the specific form is as follows:

Figure FDA0002447334570000011

wherein, cijIs the mutual capacitance of the i-th microstrip line and the j-th microstrip line, ciiIs the self-capacitance of the No. i microstrip line.

4. The DC/DC converter parasitic parameter extraction method according to claim 1, wherein: in step 2, the energy storage formula of the system is as follows:

Figure FDA0002447334570000012

5. the DC/DC converter parasitic parameter extraction method according to claim 1, wherein: in step 4, the static induction coefficient matrix is:

Figure FDA0002447334570000021

wherein the elements of the electrostatic induction matrix

6. The DC/DC converter parasitic parameter extraction method according to claim 1, wherein: in step 5, the relationship between the parasitic inductance in the free space and the static inductance matrix is as follows:

Figure FDA0002447334570000023

wherein, mu00Respectively permeability and permittivity in vacuum.

Technical Field

The invention belongs to the field of electromagnetic parasitic parameter prediction and coupling path prediction, and mainly relates to a far-field radiation prediction model based on capacitive coupling.

Background

The trend of miniaturization, integration and high frequency of power converters has made the problem of electromagnetic interference in the system more prominent, and the switching frequency of the power converters has reached hundreds of kilohertz and even several megahertz, and the on-off time of the power converters is close to nanosecond level. The trend toward higher frequencies has led to increased power density in the converter as well as more serious Electromagnetic Interference (EMI) problems. In high frequency circuits, power electronics generate large di/dt and du/dt during switching, common mode current couples and paths are established in the system due to the presence of parasitic parameters of circuit components, and common mode noise currents contribute to the dominant far field radiation. Transient voltage overshoot during the switching process of the device causes false triggering of the device and interference to normal operation of surrounding devices.

At present, methods for extracting parasitic parameters from microstrip lines are classified into two categories: the first method uses numerical method to approximate calculation; the second method uses the existing parameters of the basic model to perform fitting according to the pre-measured parameters of the generic model. The first method is suitable for a system with a regular shape, and has larger error in processing the microstrip line with an irregular shape; the second method relies on existing model parameters and is less versatile for systems with special properties.

Disclosure of Invention

The purpose of the invention is as follows: aiming at the defects of the existing parameter extraction method, the invention provides a method for extracting the inductance-capacitance parasitic parameter of a converter system based on numerical calculation and impedance analysis.

The technical scheme is as follows:

a method for extracting parasitic parameters of a DC/DC converter comprises the following steps:

step 1, obtaining a structure and parameters of a DC/DC converter, wherein the structure and parameters comprise the layout of signal lines and reference lines, the thickness of each signal line and each reference line, the relative permittivity, the relative permeability and the change with temperature of a dielectric medium, and the position of a grounding line, the grounding line is an infinite grounding plane, the grounding line is used as the reference line, other microstrip lines are used as the signal lines, each signal line is respectively numbered 1 and 2 … … n, the reference line is a conductor 0, and a (n +1) conductor transmission line system is constructed;

step 2, setting boundary conditions, applying voltage excitation to partial conductors in turn, grounding the rest conductors, calculating system energy storage under the corresponding boundary conditions, and listing a parasitic capacitance matrix;

step 3, dividing the microstrip line into a plurality of units, and extracting the high-frequency alternating-current internal resistance of the microstrip line according to finite element analysis of the time-harmonic field;

step 4, replacing all dielectrics in the system into free space, namely vacuum; when the system is internally provided with a non-uniform medium, a microstrip line structure is reserved, the dielectric medium is virtually replaced by a free space, namely the space attribute is replaced by the attribute of the free space during calculation and solution, the parasitic capacitance parameter of the microstrip line in the free space is extracted, and an electrostatic induction coefficient matrix is constructed;

and 5, extracting a parasitic inductance matrix of the microstrip line system by utilizing the relationship between the parasitic inductance in the free space and the static induction coefficient.

Further, the microstrip line is a copper line and has a negligible thickness with respect to the surrounding medium.

Further, step 2 specifically includes extracting parasitic capacitances of the microstrip lines by using system energy and voltage distribution, keeping the potential of the grounded reference line at 0, equalizing the potential of part of the signal lines with the reference line, applying a voltage U to the rest of the signal lines, solving system energy storage in the state, and solving to obtain a parasitic capacitance matrix C by establishing an equation set related to the parasitic capacitances through a relationship between the energy storage and the capacitances, wherein the specific form is as follows:

Figure BDA0002447334580000021

wherein, cijIs the mutual capacitance of the i-th microstrip line and the j-th microstrip line, ciiIs the self-capacitance of the No. i microstrip line.

Further, in step 2, the system energy storage formula is as follows:

further, in step 4, the static inductance matrix is:

Figure BDA0002447334580000023

wherein the elements of the electrostatic induction matrix

Further, in step 5, the relationship between the parasitic inductance in the free space and the electrostatic inductance matrix is:

wherein, mu00Permeability and permittivity in vacuum, respectively

Has the advantages that:

according to the scheme provided by the invention, the mutual parasitic capacitance and inductance among the PCB lead, the element lead, the via hole and the ground plane in the converter system can be obtained by predicting the inductance-capacitance parasitic parameters of the converter system by adopting a numerical calculation method, the parasitic parameter analysis of the PCB microstrip line of the DC/DC converter and the modeling and prediction problems of high-frequency common-mode noise current can be solved, and compared with the traditional analytic estimation, the parasitic capacitance and parasitic inductance parameters obtained by the scheme have more accurate reference significance.

Drawings

Fig. 1 is a flowchart of an example method for extracting parasitic parameters of a microstrip line;

FIG. 2 is a DC/DC (boost) converter, main parasitic parameters, and common mode current coupling paths;

FIG. 3 is a partial line schematic of a converter system;

fig. 4 is a schematic diagram of a parasitic resistance extraction unit.

Detailed Description

The invention is further described below with reference to the accompanying drawings. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely intended to facilitate the clear explanation of the embodiments of the invention.

Fig. 1 is a flowchart of an example method for extracting parasitic parameters of a microstrip line, including the following steps:

step 1, obtaining a structure and parameters of a DC/DC converter, wherein the structure and parameters comprise the layout of signal lines and reference lines, the thickness of each signal line and each reference line, the relative permittivity, the relative permeability and the change with temperature of a dielectric medium, and the position of a grounding line, the grounding line is an infinite grounding plane, the grounding line is used as the reference line, other microstrip lines are used as the signal lines, each signal line is respectively numbered 1 and 2 … … n, the reference line is a conductor 0, and a (n +1) conductor transmission line system is constructed;

step 2, setting boundary conditions, applying voltage excitation to partial conductors in turn, grounding the rest conductors, calculating system energy storage under the corresponding boundary conditions, and listing a parasitic capacitance matrix;

step 3, dividing the microstrip line into a plurality of units, and extracting the high-frequency alternating-current internal resistance of the microstrip line according to finite element analysis of the time-harmonic field;

step 4, replacing all dielectrics in the system into free space (namely vacuum); when the system is internally provided with a non-uniform medium, a microstrip line structure is reserved, the dielectric medium is virtually replaced by a free space (namely, the space attribute is replaced by the attribute of the free space during calculation and solution), the parasitic capacitance parameter of the microstrip line in the free space is extracted, and an electrostatic induction coefficient matrix is constructed;

and 5, extracting the parasitic inductance matrix of the microstrip line system by utilizing the relation between the parasitic inductance in the free space and the static induction coefficient.

Taking the Boost converter as an example, as shown in fig. 2, the lead connected to the input side power supply is a twisted pair cable; cin、CoutThe filter capacitors are respectively input and output; s is a MOSFET; node N0Is the drain of S on PCBThe inductor L and the diode D are connected. Node N when the converter is in operation0To make the transistor S a noise voltage source Vn. At a high frequency of 30-1000 MHz, a capacitor Cin、CoutThe inductor L may be considered as a short circuit and the inductor L may be considered as an open circuit. The high frequency noise current in the system is mainly influenced by parasitic parameters, among which the parasitic capacitance is dominant, C1、C2Is the parasitic capacitance between the input side incoming line and the reference plane; n is a radical of0Parasitic capacitance to the reference plane is CCM. The circulation path of the common mode current is shown by a dotted line in fig. 2, specifically, since the microstrip line has a flexible shape and area, the metal line and the metal surface are not distinguished in the following, one microstrip line is selected as the reference line or the reference surface, and the other microstrip lines are the signal lines or the signal surfaces.

As shown in fig. 3, the layout of the PCB microstrip lines is compact and layered more, and there are more irregularly shaped overlapping regions between the metal lines. According to a parallel plate capacitance formula C, the formula is S/h, wherein the formula is dielectric permittivity, S is the opposite area of an upper microstrip line and a lower microstrip line, and h is the distance between two layers of microstrip lines, namely the thickness of the PCB. In this example, the thickness t of the microstrip line layer is 35 μm, the thickness of the dielectric layer is not less than 1500 μm, and the thickness of the microstrip line is much less than the thickness of the dielectric, so the thickness of the dielectric can be regarded as the pitch h of the microstrip line. The PCB constitutes a (n +1) conductor microstrip transmission line system, with the ground line as the reference line and the other microstrip lines as the signal lines, each signal line numbered 1 and 2 … … n, respectively, and the reference plane being conductor 0. Note cijIs the mutual capacitance of the i-th microstrip line and the j-th microstrip line, ciiThe parasitic capacitance matrix of the microstrip line is:

and the matrix has reciprocity satisfying

cij=cji(1≤i,j≤n) (2)

And voltage is applied to part of the signal lines to stimulate U, zero potential is set between the rest signal lines and the reference line, the capacitance between the equipotential microstrip lines can be regarded as short circuit, and the rest parasitic capacitance is in parallel connection. Extracting the distribution of the system electric field intensity and electric flux density under corresponding excitation

Solving the system energy storage in simultaneous form

The parasitic capacitance matrix of the microstrip line can be solved by the n (n +1)/2 equations; wherein W is total energy of the system, D is the current density in the system, E is the electric field intensity in the system, and V is the volume of the system; u is the excitation voltage.

Fig. 4 is a schematic diagram of the parasitic resistance extraction unit, when it is assumed that the current is uniformly distributed on the section of the microstrip line, the microstrip line resistance is R ═ l/σ wt, where l is the length of the wire, σ is the conductivity of the wire, w is the width of the microstrip line, and t is the thickness of the microstrip line. Applying a high frequency excitation source to the microstrip line, its internal current will tend towards the outer surface of the conductor due to the skin effect. Considering the nonuniformity of skin depth and the inconsistency of conductor voltage caused by large electrical size, the microstrip line is divided into a plurality of computing units, the conductance among the conductors is neglected, a finite element model based on a time harmonic field is established, and the high-frequency alternating current internal resistance of the microstrip line is extracted.

The error of the parasitic inductance is larger by directly extracting by adopting a numerical method, and the extraction results of the parasitic capacitance and the resistance have higher precision. Since the dielectric is a non-magnetic conductor, the influence of changing the permittivity thereof on the parasitic inductance of the microstrip line can be ignored.

Virtually, the space structure of the (n +1) conductor microstrip line is reserved, the area filled with the dielectric medium in the original system is completely replaced by the filled free space, and the parasitic capacitance matrix C of the microstrip line under the free space is re-extracted by using the capacitance extraction method0. Thereby constructing a static induction coefficient matrix under free space

Figure BDA0002447334580000051

Wherein the elements of the electrostatic induction matrix are

Figure BDA0002447334580000052

Under the condition that all media in the system are free spaces, according to the relation between parasitic inductance in the free spaces and a static induction coefficient matrix:

can extract the parasitic inductance of the microstrip line in the uniform free space

Wherein liiIs self-inductance of microstrip lineijThe mutual inductance of the i-th microstrip line and the j-th microstrip line.

Neglecting the influence of the medium change on the parasitic inductance, the microstrip line parasitic inductance matrix L is as follows:

L=L0(7)

the above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention and these are intended to be within the scope of the invention.

9页详细技术资料下载
上一篇:一种医用注射器针头装配设备
下一篇:基于共生多元泛函计算的电力线路对地电容实时测量方法

网友询问留言

已有0条留言

还没有人留言评论。精彩留言会获得点赞!

精彩留言,会给你点赞!