Neural circuit and operation method
阅读说明:本技术 类神经电路以及运作方法 (Neural circuit and operation method ) 是由 林仲汉 邱青松 于 2019-11-15 设计创作,主要内容包括:一种类神经电路包含突触电路以及后神经元电路。突触电路包含相变化元件、具有至少三个端点的第一开关以及第二开关。相变化元件包含第一端以及第二端。第一开关包含第一端、二端以及控制端。第二开关包含第一端、第二端以及控制端。第一开关用以接收第一脉冲信号。第二开关耦接相变化元件以及第一开关。第二开关用以接收第二脉冲信号。后神经元电路包含电容以及输入端。后神经元电路的输入端响应于第一脉冲信号而对电容充电。后神经元电路依据电容的电压位准与电压门槛值产生激发信号。后神经元电路依据激发信号产生控制信号。控制信号控制第二开关导通,第二脉冲信号流经第二开关,以控制相变化元件的状态,进而决定类神经电路的权重。(A neural circuit includes a synaptic circuit and a post-neuron circuit. The synapse circuit comprises a phase change element, a first switch having at least three terminals, and a second switch. The phase change element comprises a first terminal and a second terminal. The first switch comprises a first end, two ends and a control end. The second switch comprises a first end, a second end and a control end. The first switch is used for receiving a first pulse signal. The second switch is coupled to the phase change element and the first switch. The second switch is used for receiving a second pulse signal. The back neuron circuit comprises a capacitor and an input end. An input of the back neuron circuit charges a capacitor in response to the first pulse signal. The back neuron circuit generates a trigger signal according to the voltage level and the voltage threshold of the capacitor. The back neuron circuit generates a control signal according to the excitation signal. The control signal controls the second switch to be conducted, and the second pulse signal flows through the second switch to control the state of the phase change element so as to determine the weight of the neural circuit.)
1. A neural circuit, comprising:
a synaptic circuit coupled to the pre-neuron circuit, the synaptic circuit comprising:
a phase change element including a first terminal and a second terminal;
a first switch having at least three terminals, including a first terminal, a second terminal and a control terminal, the first switch being configured to receive a first pulse signal; and
a second switch including a first terminal, a second terminal and a control terminal, the second switch being coupled to the phase change element and the first switch, the second switch being configured to receive a second pulse signal; and
a back neuron circuit comprising a capacitor and an input, the input of the back neuron circuit being responsive to the first pulse signal to charge the capacitor, the back neuron circuit generating a stimulus signal according to a voltage level and a voltage threshold of the capacitor, and the back neuron circuit generating a control signal according to the stimulus signal;
the control signal controls the second switch to be conducted, and the second pulse signal flows through the second switch to control the state of the phase change element so as to determine the weight of the neural circuit.
2. The neural circuit of claim 1, wherein a first terminal of the first switch is configured to receive the first pulse signal, a first terminal of the second switch is configured to receive the second pulse signal, a second terminal of the first switch and a second terminal of the second switch are coupled to a first terminal of the phase change element, a second terminal of the phase change element is coupled to an input terminal of the post-neuron circuit, and a control terminal of the second switch is configured to receive the control signal of the post-neuron circuit.
3. The neural circuit of claim 1 or 2, wherein the first switch is a transistor, wherein the transistor comprises a Metal Oxide Semiconductor (MOS) transistor and a field effect transistor (JFET).
4. The neural circuit of claim 3, wherein the control terminal of the first switch is coupled to the first terminal of the first switch or the second terminal of the first switch.
5. The neural circuit of claim 4, further comprising:
a front neuron circuit for transmitting the first pulse signal to the first end of the first switch and transmitting the second pulse signal to the first end of the second switch.
6. The neural circuit of claim 5, wherein the post-neuron circuit comprises:
a comparator for comparing the voltage level of the capacitor with the voltage threshold to generate the trigger signal;
a delay circuit for delaying the excitation signal; and
a pulse signal generator for generating the control signal according to the delayed excitation signal.
7. A method of operating a neural circuit, comprising:
providing a front neuron circuit to transmit a first pulse signal and a second pulse signal;
providing a synaptic electrical circuit, wherein the synaptic electrical circuit comprises a first switch having at least three terminals, a second switch and a phase change element, the first switch comprises a first terminal, a second terminal and a control terminal, the second switch comprises a first terminal, a second terminal and a control terminal, and the phase change element comprises a first terminal and a second terminal;
providing a back neuron circuit, wherein the back neuron circuit comprises an input end and a capacitor;
receiving a first pulse signal through the first switch of the synaptic electrical circuit;
receiving a second pulse signal through the second switch of the synaptic electrical circuit;
in response to the first pulse signal, the back neuron circuit charges the capacitor via the input terminal;
generating a trigger signal by the back neuron circuit according to a voltage level and a voltage threshold of the capacitor;
generating a control signal according to the excitation signal through the rear neuron circuit; and
controlling the current of the second switch of the synapse circuit according to the control signal and the second pulse signal to control the state of the phase change element of the synapse circuit, thereby determining a weight of the neural circuit.
8. The method of claim 7, further comprising:
receiving the first pulse signal through a first end of the first switch;
receiving the second pulse signal through the first end of the second switch, wherein the second end of the first switch and the second end of the second switch are coupled to the first end of the phase change element, and the control end of the first switch is coupled to the first end of the first switch or the second end of the first switch; and
the control signal is received through the control terminal of the second switch.
9. The method of claim 7 or 8, wherein the first switch is a transistor.
10. The method of claim 8, wherein the second terminal of the phase change element is coupled to an input of the post-neuron circuit.
11. The method of claim 7, further comprising:
the voltage level of the capacitor is compared with the voltage threshold value by a comparator of the back neuron circuit to generate the excitation signal.
12. The method of claim 11, further comprising:
delaying the fire signal by a delay circuit of the post neuron circuit; and
and generating the control signal by a pulse signal generator of the rear neuron circuit according to the delayed excitation signal.
Technical Field
Embodiments described herein relate generally to circuit technology, and more particularly, to a neural circuit and method of operation.
Background
A neural network system is included in a living organism. The neural network system contains many neurons (neurons). Neurons were proposed by Heinrich Wilhelm Gottfriend von Waldehyer-Hartz in 1891. Neurons are the processing units that acquire discrete information from the brain. In 1897, Charles Sherrington referred to the interface (junction) between two neurons as a "synapse" (synapse). Discrete information flows through the synapse in one direction. From this direction, a distinction is made between "anterior (presynaptic) neurons" and "posterior (postsynaptic) neurons". Neurons, when they receive enough input to fire, emit a "spike" (spike).
Theoretically, the captured experience is as conduction of synapses in the brain (conductance). Synaptic transmission may vary over time, depending on the relative spike times of the pre-and post-neurons. Synaptic conductance increases if a posterior neuron fires before a pre-neuron fires (fire). If the order of the two excitations is reversed, the synaptic conductance will decrease. In addition, such changes may depend on the delay between two events. The more delay, the smaller the magnitude of the change.
Artificial neural networks allow electronic systems to function in a manner similar to that of biological brains. The neuron system may include various electronic circuits that model biological neurons.
The neural network system affects perception, selection, decision or other various behaviors of the living body, and thus plays a very important role in the living body. If a neural network system in a similar organism can be built by using the circuit, the circuit has a critical influence on many fields.
For example, U.S. Pat. No. 9,830,981 or Chinese patent No. 107111783 disclose that a neural network system can be constructed using phase change memory circuits and other components.
Disclosure of Invention
Some embodiments of the present disclosure relate to a neural circuit. The neural circuit includes a synaptic circuit and a post-neuron circuit. The synapse circuit comprises a phase change element, a first switch having at least three terminals, and a second switch. The phase change element comprises a first terminal and a second terminal. The first switch includes a first terminal, a second terminal and a control terminal. The second switch includes a first terminal, a second terminal and a control terminal. The first switch is used for receiving a first pulse signal. The second switch is coupled to the phase change element and the first switch. The second switch is used for receiving a second pulse signal. The back neuron circuit comprises a capacitor and an input end. An input of the back neuron circuit charges a capacitor in response to the first pulse signal. The back neuron circuit generates a trigger signal according to the voltage level of the capacitor and a voltage threshold. The back neuron circuit generates a control signal according to the excitation signal. The control signal controls the second switch to be conducted, and the second pulse signal flows through the second switch to control the state of the phase change element so as to determine a weight of the neural circuit.
In some embodiments, the first terminal of the first switch is configured to receive the first pulse signal, the first terminal of the second switch is configured to receive the second pulse signal, the second terminal of the first switch and the second terminal of the second switch are coupled to the first terminal of the phase change element, the second terminal of the phase change element is coupled to the input terminal of the post-neuron circuit, and the control terminal of the second switch is configured to receive the control signal of the post-neuron circuit.
In some embodiments, the first switch is a transistor. Transistors include Metal Oxide Semiconductor (MOS) transistors and field effect transistors (JFETs).
In some embodiments, the control terminal of the first switch is coupled to the first terminal of the first switch or the second terminal of the first switch.
In some embodiments, the neuron-like circuit further comprises a pre-neuron circuit. The front neuron circuit is used for transmitting a first pulse signal to the first end of the first switch and transmitting a second pulse signal to the first end of the second switch.
In some embodiments, the post-neuron circuit comprises a comparator, a delay circuit, and a pulse signal generator. The comparator is used for comparing the voltage level of the capacitor with a voltage threshold value to generate an excitation signal. The delay circuit is used for delaying the excitation signal. The pulse signal generator is used for generating a control signal according to the delayed excitation signal.
Some embodiments of the present disclosure relate to a method of operating a neural circuit. The operation method comprises the following steps: providing a front neuron circuit to transmit a first pulse signal and a second pulse signal; providing a synaptic electrical circuit, wherein the synaptic electrical circuit comprises a first switch having at least three terminals, a second switch and a phase change element, the first switch comprises a first terminal, a second terminal and a control terminal, the second switch comprises a first terminal, a second terminal and a control terminal, and the phase change element comprises a first terminal and a second terminal; providing a back neuron circuit, wherein the back neuron circuit comprises an input end and a capacitor; receiving a first pulse signal through a first switch of a synaptic circuit; receiving a second pulse signal through a second switch of the synaptic electrical circuit; in response to the first pulse signal, the back neuron circuit charges the capacitor via the input terminal; generating an excitation signal by the back neuron circuit according to a voltage level and a voltage threshold of the capacitor; generating a control signal according to the excitation signal through the back neuron circuit; and controlling the current of a second switch of the synaptic circuit according to the control signal and the second pulse signal so as to control the state of a phase change element of the synaptic circuit and further determine a weight of the neural circuit.
In some embodiments, the method further comprises: receiving a first pulse signal through a first end of a first switch; receiving a second pulse signal through a first end of a second switch, wherein a second end of the first switch and a second end of the second switch are coupled to the first end of the phase change element, and a control end of the first switch is coupled to the first end of the first switch or the second end of the first switch; and receiving the control signal through the control terminal of the second switch.
In some embodiments, the first switch is a transistor.
In some embodiments, the second terminal of the phase change element is coupled to an input terminal of the post-neuron circuit.
In some embodiments, the method further comprises: the voltage level of the capacitor is compared with the voltage threshold value by a comparator of the back neuron circuit to generate the excitation signal.
In some embodiments, the method further comprises: delaying the fire signal by a delay circuit of the post neuron circuit; and generating a control signal by a pulse signal generator of the rear neuron circuit according to the delayed excitation signal.
In summary, the neural network system can be built by using the neural circuit and the operation method of the present disclosure.
Drawings
The foregoing and other objects, features, advantages and embodiments of the disclosure will be apparent from the following more particular description of the embodiments, as illustrated in the accompanying drawings in which:
FIG. 1 is a schematic diagram of a type of neural circuit according to some embodiments of the present disclosure;
FIG. 2 is a schematic diagram of a type of neural circuit according to some embodiments of the present disclosure;
FIG. 3 is a schematic diagram of a control circuit according to some embodiments of the present disclosure;
FIG. 4 is a waveform diagram illustrating signals of a type of neural circuit, according to some embodiments of the present disclosure;
FIG. 5 is a schematic diagram of a type of neural circuit according to some embodiments of the present disclosure;
FIG. 6 is a schematic diagram of a switch;
FIG. 7 is a schematic diagram of a switch;
FIG. 8A is a schematic diagram of a switch;
FIG. 8B is a schematic diagram of the structure of the switch of FIG. 8A; and
fig. 9 is a flow chart of a method of operating a type of neural circuit according to some embodiments of the present disclosure.
[ notation ] to show
Class 100 … neural circuit
120 … synaptic electrical circuit
130 … anterior neuron circuit
131 … axon drive
140 … post neuron circuit
141 … transistor
142 … transistor
500 … nerve circuit
520
900 … operation method
PCM … phase change element
D1 … switch
SW2 … switch
G1 … pulse signal generator
G2 … pulse signal generator
PS1 … pulse signal
PS2 … pulse signal
C1 … capacitance
R1 … resistor
GND … ground terminal
Vp … voltage level
Vth… Voltage threshold
COM … comparator
CON … control circuit
FIRE … FIRE Signal
IN … control circuit input terminal
OUT … control circuit output terminal
Vdd … power supply
TD … delay circuit
G3 … pulse signal generator
CS … control signal
Tp … pulse time
Time of T1 … pulse
Time of T … pulse
T/2 … time interval
td … delay time
t1 … time point
t2 … time point
t3 … time point
t4 … time point
SW1 … switch
SWR1 … switch
SWR2 … switch
SWR3 … switch
Operations S910, S920, S930, S940, S950, S960 …
Detailed Description
The term "coupled", as used herein, may also mean "electrically coupled", and the term "connected", as used herein, may also mean "electrically connected". "coupled" and "connected" may also mean that two or more elements co-operate or interact with each other.
Please refer to fig. 1 and fig. 2. Fig. 1 and 2 are schematic diagrams of a neural circuit 100 according to some embodiments of the present disclosure.
Referring to fig. 1, the neural circuit 100 includes a synaptic circuit (synapse circuit)120, a pre-synaptic neuron circuit 130 (hereinafter referred to as "pre-neuron" 130), and a post-synaptic neuron circuit 140 (hereinafter referred to as "post-neuron" 140). The
Synaptic electrical circuit 120 includes phase change element PCM, switch D1, and switch SW 2. The phase change element PCM comprises a phase change material. The phase change material may have different crystalline phases based on the magnitude of the current pulse and/or the duration of the pulse. Different crystalline phases have different physical properties. For example, the crystalline phase or polycrystalline phase has a low resistance value, while the amorphous phase has a high resistance value. Accordingly, information can be stored in the corresponding crystal phase.
Switch D1 is implemented as a diode. The switch SW2 is implemented as a transistor. Specifically, the switch D1 includes a first terminal and a second terminal. The first terminal is an anode terminal and the second terminal is a cathode terminal. The switch D1 has a first terminal coupled to the pulse signal generator G1 for receiving the pulse signal PS 1. The first terminal of the switch SW2 is coupled to the pulse signal generator G2 to receive the pulse signal PS 2. The second terminal of the switch D1 and the second terminal of the switch SW2 are coupled to the first terminal of the phase change element PCM. The second terminal of the phase change element PCM is coupled to the
The
The capacitance C1 in the
The excitation signal of a pre-neuron affects the cellular membrane potential of a post-neuron via synapses (comprising axons of the pre-neuron and dendrites of the post-neuron). However, even with the same excitation signal, different anterior neurons have different magnitudes of influence on the cell membrane potential of the posterior neuron. This can be said to be the difference in the magnitude of synaptic weights (W) between the anterior and posterior neurons. Synaptic weights (W) are plastic (or adaptable). The magnitude of the weight change amount (Δ W) is a function of the time difference between the anterior neuron excitation time point (t1) and the posterior neuron excitation time point (t2) (Δ W — F (t2-t 1)). In other words, the magnitude of the synaptic weight change (Δ W) is related to the time difference between the excitation time point t1 and the excitation time point t2, and the synaptic weight W is adaptively adjusted according to the value of the time difference. Therefore, synaptic weight (W) relates to an indicator of causal relationships between neurons. Thus, a characteristic index representing the change of weight (W) of synapse (synapse) due to the relative relationship of the excitation times of the front and back neurons is defined, which is called "Spike timing dependent plasticity" (STDP). The spike-time-dependent plasticity (STDP) of synapses is also indirectly linked to leakage sum and to excitation (LIF). This is because the leak sum and fire (LIF) may determine the firing time point of the posterior neuron (t 2). In some embodiments, the spike-time-dependent plasticity (STDP) of synapses represents the plasticity of synaptic current conductivity. More specifically, in some embodiments, the spike-time plasticity (STDP) of synapses represents the magnitude of synaptic resistance.
Please refer to fig. 3. Fig. 3 is a schematic diagram of the control circuit CON in the
In some embodiments, the transistor 141 is a P-type metal oxide semiconductor field effect transistor (PMOS). The gate and the source of the transistor 141 are electrically connected to a power supply Vdd. The control circuit input IN is electrically connected to the gate of the transistor 141. The transistor 142 is an N-type metal oxide semiconductor field effect transistor (NMOS). The gate and the source of the transistor 142 are electrically connected to the ground GND. The drain of the transistor 141 is connected to the drain of the transistor 142 and to the control circuit output OUT.
Fig. 4 is a waveform diagram of signals of a type of neural circuit according to some embodiments of the present disclosure.
Please refer to fig. 1 and fig. 4 together. Before the
Next, please refer to fig. 2 and fig. 4 together. At time T2, the pulse signal generator G2 of the
The FIRE signal FIRE from the output terminal of the comparator COM passes through the delay circuit TD and the pulse signal generator G3 to output the control signal CS for turning on the switch SW 2. The delay circuit TD adds a delay time TD to the FIRE signal FIRE. In some embodiments, the delay time td is 50 milliseconds (ms). After the delay time td, the control signal CS is output to the gate of the switch SW2 at the time point t3 to turn on the switch SW 2. The control signal CS has a pulse time from a time point t3 to a time point t4, and the control signal CS can turn on the switch SW2 during the pulse time. In some embodiments, time t3 to time t4 is 0.1 milliseconds (ms).
During the time that switch SW2 is on, switch D1 is in an off state. The control circuit CON will conduct current from the voltage source Vdd through the phase change element PCM and the switch SW 2. The magnitude of the voltage difference across the first terminal and the second terminal of the switch SW2 can adjust the magnitude of the current flowing through the switch SW 2.
In some embodiments, the pulse interval of the control signal CS falls in the preceding time interval of the pulse signal PS2 (axon pulse STDP). The voltage differential across switch SW2 is now large. Accordingly, the switch SW2 instantaneously flows a large current. Therefore, the current flowing through the phase change element PCM is large instantaneously, and the PCM is easy to be in an amorphous phase state, so the resistance value is large. In some embodiments, the pulse interval of the control signal CS falls within a time interval following the pulse signal PS2 (axon pulse STDP). The voltage differential across switch SW2 is now small. Accordingly, the switch SW2 momentarily draws a small current. Therefore, the current flowing through the phase change element PCM is small instantaneously, and the PCM is in a crystalline phase or a polycrystalline phase state, so that the resistance value is small. Since the voltage value in the time interval before and after the pulse signal PS2 (axon pulse STDP) is not constant, the voltage difference across both ends of the switch SW2 shows a continuous difference in magnitude, and thus the current flowing through the phase change element PCM also shows a continuous change in magnitude.
Based on the above, the conduction level of the switch SW2 affects the magnitude of the current flowing through the phase change element PCM. The phase of the phase change element PCM changes according to the magnitude of the current flowing through the phase change element PCM, thereby changing the resistance value of the phase change element PCM. The phase of the phase change element PCM may be used to determine the weights of such neural circuit 100. The weights are used to reflect the degree of influence of the anterior neurons on the posterior neurons. For example, the more current neurons stimulate the posterior neurons, the heavier such neural circuit 100 weights.
In some embodiments, the pulse time of the pulse signal PS1 (axon pulse LIF) is 0.1 milliseconds (ms), the pulse time of the pulse signal PS2 (axon pulse STDP) is 100 milliseconds (ms), and the delay time TD of the delay circuit TD is 50 milliseconds (ms). After the delay time td, the control signal CS is output at time t3 just near the middle point of the time interval of the pulse signal PS2 (axon pulse STDP). Therefore, if the control signal CS of the
In other embodiments, if the firing of the back neuron 140 (FIRE signal FIRE) is directly caused by the firing of another pre-neuron (not shown), the control signal CS is more likely to fall in the preceding time interval of the pulse signal PS2 (axon pulse STDP), so that the phase change element PCM in the synaptic circuit 120 corresponding to the
The neural circuit 100 can perform learning actions using the above operations to implement a neural network system in a similar organism.
Please refer to fig. 5. Fig. 5 is a schematic diagram of a
For the example of fig. 5, the switch SW1 includes at least three terminals (a first terminal, a second terminal, and a control terminal). The first terminal is a source terminal, the second terminal is a drain terminal, and the control terminal is a gate terminal. The first terminal of the switch SW1 is coupled to the pulse signal generator G1 to receive the pulse signal PS 1. The second terminal of the switch SW1 is coupled to the phase change element PCM. A control terminal of the switch SW1 is coupled to the first terminal of the switch SW 1.
The connections and operations of the other components of the
Please refer to fig. 6. Fig. 6 is a schematic diagram of switch SWR 1. For example, in fig. 6, the switch SWR1 is a pmos fet, and the control terminal of the switch SWR1 is coupled to the second terminal of the switch SWR 1. In some embodiments, switch SWR1 may be used in place of switch SW1 in fig. 5 to accomplish a similar operation.
Please refer to fig. 7. Fig. 7 is a schematic diagram of switch SWR 2. For the example of fig. 7, switch SWR2 is a bipolar transistor. In some embodiments, switch SWR2 may be used in place of switch SW1 in fig. 5 to accomplish a similar operation.
Please refer to fig. 8A and fig. 8B. Fig. 8A is a schematic diagram of switch SWR 3. Fig. 8B is a schematic structural diagram of the switch SWR3 of fig. 8A. Switch SWR3 is a junction field effect transistor. In some embodiments, switch SWR3 can be used to replace switch D1 in fig. 1 to accomplish similar operations. The first region (N-type region) 701 can be used as a cathode terminal, and the second region (P-type region) 702 can be used as an anode terminal.
Please refer to fig. 9. Fig. 9 is a flow chart of a method 900 of operating a type of neural circuit according to some embodiments of the present disclosure. For example, in fig. 9, the operation method 900 includes operations S910, S920, S930, S940, S950 and S960. In some embodiments, the operation method 900 is applied to the neural circuit 100 of fig. 1, but the disclosure is not limited thereto. For ease of understanding, the following discussion will be in conjunction with FIG. 1.
The
In operation S920, an input terminal of the rear neuron 140 (comparator COM) is charged in response to the pulse signal PS 1. In some embodiments, the
In operation S930, a pulsed signal PS2 is sent by the axon drive 131 of the
In operation S940, the
In operation S950, the control signal CS is generated by the
In operation S960, the switch SW2 of the synaptic circuit 120 is turned on or off according to the control signal CS, and the second pulse signal PS2 received by the first terminal of the switch SW2 is used to control the state of the phase change element PCM of the synaptic circuit 120. Accordingly, the weight of the neural circuit 100 can be determined according to the state of the phase change element PCM. In some embodiments, the phase change element PCM comprises a phase change material. The different resistance values correspond to different phase change materials.
The description of method 900 includes exemplary operations, but the operations of method 900 need not be performed in the order illustrated. It is within the spirit and scope of the present disclosure that the order of the operations of method 900 be altered or that the operations be performed concurrently, with some portions being performed concurrently, or with some being omitted, where appropriate.
In summary, the neural network system can be built by using the neural circuit and the operation method of the present disclosure.
Although the present disclosure has been described with reference to particular embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure, and therefore the scope of the present disclosure should be limited only by the terms of the appended claims.
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