HIT battery without back silver electrode and manufacturing method thereof

文档序号:1230582 发布日期:2020-09-08 浏览:4次 中文

阅读说明:本技术 一种无背面银电极hit电池及其制造方法 (HIT battery without back silver electrode and manufacturing method thereof ) 是由 上官泉元 贾云涛 刘宁杰 刘强 于 2020-04-20 设计创作,主要内容包括:本发明公开了一种无背面银电极HIT电池,包括硅片,硅片的正反面均镀有非晶硅层,正面非晶硅层表面镀有一层磷掺杂的N层,在背面非晶硅表面镀有一层硼掺杂的P层,在正面N层及背面P层表面均镀有一层透明导电层,在正面透明导电层表面印刷有银电极,在背面透明导电层表面镀有一层导电性好的金属导电膜层,在背面的金属导电膜层表面焊接有铜焊丝形成背面电极;在透明导电层表面还镀有金属过渡膜层;在金属导电膜层表面还镀有金属保护膜层。本发明结构的无背面电极HIT电池,其不仅极大降低了背面银浆使用成本,且有效提高了HIT电池的正面发电效率,且由于仅仅单面能发电,可以广泛应用在屋顶发电、太阳能瓦、太阳能驱动的电动汽车、飞行器等很多场景。(The invention discloses a HIT (heterojunction with intrinsic thin layer) battery without a back silver electrode, which comprises a silicon wafer, wherein amorphous silicon layers are plated on the front and back surfaces of the silicon wafer, a phosphorus-doped N layer is plated on the surface of the amorphous silicon layer on the front surface, a boron-doped P layer is plated on the surface of the amorphous silicon layer on the back surface, transparent conducting layers are plated on the surfaces of the N layer on the front surface and the P layer on the back surface, a silver electrode is printed on the surface of the transparent conducting layer on the front surface, a metal conducting film layer with good conductivity is plated on the surface of the transparent conducting layer on the back surface, and a copper; a metal transition film layer is plated on the surface of the transparent conductive layer; and a metal protection film layer is also plated on the surface of the metal conductive film layer. The HIT cell without the back electrode greatly reduces the use cost of the back silver paste, effectively improves the front power generation efficiency of the HIT cell, and can be widely applied to many scenes such as roof power generation, solar tiles, solar-driven electric vehicles, aircrafts and the like due to the fact that only one side can generate power.)

1. A HIT cell without a back silver electrode is characterized by comprising a silicon wafer, wherein amorphous silicon layers are plated on the front and back sides of the silicon wafer, a phosphorus-doped N layer is plated on the surface of the amorphous silicon layer on the front side, a boron-doped P layer is plated on the surface of the amorphous silicon layer on the back side, transparent conducting layers are plated on the surfaces of the N layer on the front side and the P layer on the back side, a silver electrode is printed on the surface of the transparent conducting layer on the front side, a metal conducting film layer with good conductivity is plated on the surface of the transparent conducting layer on the back side, and a copper welding wire is welded on the surface of the.

2. The HIT cell without the back silver electrode according to claim 1, wherein the N layer is phosphorus-doped amorphous silicon, microcrystalline silicon or oxidized microcrystalline silicon; the P layer is boron-doped amorphous silicon, microcrystalline silicon or oxidized microcrystalline silicon.

3. The HIT cell without the back silver electrode according to claim 1 or 2, wherein the thickness of the amorphous silicon layer is 3-8 nm; the thickness of the N layer is 3-8 nm; the thickness of the P layer is 3-8 nm; the thickness of the transparent conducting layer is 0-200 nm; the thickness of the metal conductive film layer is 1000-20000 nm.

4. The HIT cell without the back silver electrode according to claim 1 or 2, wherein a metal protective film is further plated on the surface of the metal conductive film layer to prevent the metal conductive film layer from corroding, and the thickness of the HIT cell is 100-2000 nm; and the copper welding wire is welded on the surface of the metal protection film layer to form a back electrode.

5. The HIT cell without the back silver electrode according to claim 1 or 2, wherein a metal transition film layer with a thickness of 0-1000 nm is plated on the surface of the transparent conductive layer on the back; the metal conductive film layer is plated on the surface of the metal transition film layer, and the copper welding wire is welded on the surface of the metal conductive film layer to form a back electrode.

6. The HIT cell without the back silver electrode as claimed in claim 5, wherein a metal protective film is further plated on the surface of the metal conductive film to prevent the metal conductive film from corroding, and the thickness of the HIT cell is 100-2000 nm; and the copper welding wire is welded on the surface of the metal protection film layer to form a back electrode.

7. A method for manufacturing a HIT battery without a back silver electrode is characterized by comprising the following steps:

1) cleaning and texturing the surface of the N-type silicon wafer to form a clean low-reflectivity textured surface;

2) plating an amorphous silicon layer on the front side and the back side of the silicon wafer after texturing respectively;

3) plating a layer of phosphorus-doped amorphous silicon or microcrystalline silicon on the surface of the amorphous silicon layer on the front side to form an N layer;

4) plating a layer of boron-doped amorphous silicon or microcrystalline silicon on the surface of the amorphous silicon layer on the back side to form a P layer;

5) plating a transparent conductive layer on the surface of the front N layer and the surface of the back P layer respectively;

6) printing low-temperature silver paste on the surface of the front transparent conductive layer through screen printing to form a conductive silver electrode;

7) plating a metal transition film layer on the surface of the back transparent conductive layer by adopting a PVD (physical vapor deposition) or thermal evaporation method, wherein in order to avoid the conduction of the metal transition film layer and the front silver electrode, the edge of the silicon wafer is covered without film plating during film plating, and the edge covering width is 0.1-1 mm;

8) plating a metal conductive film layer with good conductivity on the surface of the metal transition film layer by adopting a PVD (physical vapor deposition) or thermal evaporation method, wherein in order to avoid the conduction of the metal conductive film layer and a front silver electrode, the edge of a silicon wafer is covered without being plated, and the edge covering width is 0.1-1 mm;

9) plating a metal protective film layer on the surface of the metal conductive film layer by adopting a PVD (physical vapor deposition) or thermal evaporation method to prevent the metal conductive film layer from being corroded, in order to avoid the conduction of the metal protective film layer and a front silver electrode, during film plating, covering the edge of a silicon wafer without film plating, wherein the edge covering width is 0.1-1 mm;

10) and welding a copper welding wire as a back electrode on the surface of the metal protective film layer, wherein the copper welding wire is attached to the surface of the metal protective film layer and is welded from one end of the silicon wafer to the other end of the silicon wafer.

8. The method for manufacturing a HIT battery without a back silver electrode as claimed in claim 7, wherein the number of the copper wires is 5-30, and the copper wires are any one of round, flat and trapezoidal.

9. A method of manufacturing a HIT cell assembly based on claim 7, wherein the back copper wire of a HIT cell without a back silver electrode is connected in series with the silver electrode of the front side of an adjacent cell to form a cell assembly.

10. A solar power generation panel characterized by being produced by integrating the cell module produced according to claim 9 in a glass material.

Technical Field

The invention relates to the technical field of solar cells, in particular to a HIT cell without a back silver electrode and a manufacturing method thereof.

Background

Photovoltaic power generation has become a technology that can replace fossil energy, relying on the ever-decreasing production costs and the increase in photoelectric conversion efficiency in recent years. Solar cells can be roughly classified into two types according to the material of the photovoltaic cell sheet: one is a crystalline silicon solar cell, including a monocrystalline silicon solar cell, a polycrystalline silicon solar cell; the other type is a thin film solar cell, which mainly comprises an amorphous silicon solar cell, a cadmium telluride solar cell, a copper indium gallium selenide solar cell and the like. At present, crystalline silicon solar cells using high-purity silicon materials as main raw materials are mainstream products, and account for more than 80%.

In a crystalline silicon solar power generation system, one of the most central steps for realizing photoelectric conversion is a process of processing crystalline silicon into a cell for realizing photoelectric conversion, so that the photoelectric conversion efficiency of the cell also becomes a key index for embodying the technical level of the crystalline silicon solar power generation system.

Improving cell efficiency and establishing passivation contacts is critical. Because photogenerated carriers move rapidly in the silicon wafer, once the photogenerated carriers contact the surface, the photogenerated carriers are recombined and cannot be collected into current to generate power. If a special protective film is plated on the surface, such as silicon oxide, silicon nitride, aluminum oxide, amorphous silicon and the like, because of saturation of surface crystalline silicon surface chemical bonds and a charge field formed between the film and crystalline silicon, the special protective film can effectively prevent minority carriers from being compounded on the surface.

To further improve efficiency, new cell theory simulations require full coverage of the passivation layer, with carriers reaching the conductive layer overlying the passivation layer through tunneling. The HIT battery is a new battery designed based on this concept, and has the advantages of high power generation amount and low power consumption cost. HIT is an abbreviation for Heterojunction with Intrasic Thin-layer, meaning an Intrinsic Thin-film Heterojunction. The HIT cell is a cell structure which utilizes amorphous silicon passivation on the surface of crystalline silicon and utilizes doped amorphous silicon to collect carriers, and referring to fig. 1, the general HIT cell structure and manufacturing method are as follows:

1) cleaning and texturing the surface of the N-type crystal silicon wafer to form a clean low-reflectivity textured surface;

2) plating a layer of amorphous silicon (3-8 nm) on the front side and the back side of the silicon wafer after texturing respectively;

3) plating a layer of phosphorus-doped amorphous silicon (or microcrystalline silicon) N (3-8 nm) on the front surface;

4) plating a layer of boron-doped amorphous silicon (or microcrystalline silicon) P (3-8 nm) on the back surface;

5) a transparent conductive layer, such as ITO (indium tin oxide), is plated on the front surface and the back surface respectively;

6) silver electrodes (low-temperature conductive silver paste) are printed on the front side and the back side respectively.

The battery with the structure can generate power on the front side and the back side simultaneously after being formed, is a natural double-sided battery, and has high power generation efficiency, and the highest power generation efficiency reaches more than 25%. However, the above-described decoupled strand HIT double-sided battery has the disadvantage that the conductive silver paste must be cured at a temperature below 200 ℃, and therefore, a low temperature silver paste must be used. Since the conductivity of low temperature silver paste is only half that of high temperature silver paste, more silver paste is required than for conventional PERC or TOPCon cells and silver paste must be used on both sides. Therefore, the silver consumption of the HIT battery is 2-3 times of that of the conventional battery, and the market price of the low-temperature silver paste is 1.5 times higher than that of the conventional silver paste, so that the HIT battery has higher efficiency but consumes more than one time of silver, and the large-amount use of the silver is a rare precious metal and can affect the industrial application and popularization of the HIT battery. In addition, indium for ITO of the HIT battery is also a rare metal, and double-sided ITO plating also significantly increases the cost.

Moreover, although the HIT is a double-sided battery, more power can be generated under the condition of double-sided light reception, but not all scenes can be illuminated by the back, for example, roof power generation or solar tiles (a power generation battery panel is integrated in a glass material to be installed on a roof as a building tile material, the roof can block rain like tiles and can generate power at the same time), only one side can be contacted with light, and if the HIT double-sided battery is made, expensive back silver paste is wasted.

Therefore, based on the above analysis, it is of particular value to maximize the efficiency of HIT front generation and to subtract back silver paste to reduce cost.

Disclosure of Invention

In order to solve the technical problems, the invention firstly provides a HIT battery without a back silver electrode, which comprises a silicon wafer, wherein amorphous silicon layers are plated on the front and the back of the silicon wafer, a phosphorus-doped N layer is plated on the surface of the amorphous silicon layer on the front, a boron-doped P layer is plated on the surface of the amorphous silicon layer on the back, transparent conducting layers are plated on the surfaces of the N layer on the front and the P layer on the back, the silver electrode is printed on the surface of the transparent conducting layer on the front, a metal conducting film layer with good conductivity is plated on the surface of the transparent conducting layer on the back, and a copper welding wire is welded on the surface of the metal conducting; the metal conductive film layer can be made of metals with good conductivity and low price, such as aluminum, copper or copper-aluminum laminated layers, and mainly has a transverse conductive function so as to transmit charges to the copper welding wire.

The N layer is phosphorus-doped amorphous silicon, microcrystalline silicon or oxidized microcrystalline silicon; the P layer is boron-doped amorphous silicon, microcrystalline silicon or oxidized microcrystalline silicon; the transparent conducting layer is ITO (indium tin oxide), AZO (aluminum zinc oxide) or other transparent conducting layers, wherein the AZO has the advantages of cheap materials and rich resources.

Wherein the thickness of the amorphous silicon layer is 3-8 nm; the thickness of the N layer is 3-8 nm; the thickness of the P layer is 3-8 nm; the thickness of the transparent conducting layer is 0-200 nm, when the thickness is 0nm, the transparent conducting layer is not plated, and the reflectivity of infrared light penetrating through a silicon wafer on the back surface can be increased by plating the transparent conducting layer so as to improve the conversion efficiency of the battery; the metal conductive film layer can be formed by laminating copper, aluminum or copper-aluminum with excellent conductivity and low cost, and the thickness of the metal conductive film layer is 1000-20000 nm.

Furthermore, due to the optical effect of the film, different colors can appear when the film is different in thickness, so that the appearance color of the battery can be adjusted according to the thickness of the front transparent conductive layer, the thickness of the film is 70-200 nm, for example, the film is black when the film is 80nm thick, blue when the film is 110nm thick, green when the film is 150nm thick, and the like, and the optical effect of the film can realize different beautiful appearance effects when photovoltaic power generation is used as a building material or is placed on the surface of an automobile for power generation.

The surface of the metal conductive film layer is plated with a metal protective film layer to prevent the metal conductive film layer from being corroded, meanwhile, the metal protective layer and a copper welding wire are easy to weld, tin, indium, nickel and the like can be used, the cost of tin is lower, the alloy of tin, indium and other metals is not excluded to achieve better welding performance and oxidation and corrosion resistance, and the thickness of the metal protective layer is 100-2000 nm; and the copper welding wire is welded on the surface of the metal protection film layer to form a back electrode.

Or, a metal transition film layer is plated on the surface of the transparent conducting layer on the back, and the metal transition film layer is in contact with the transparent conducting layer to form low contact resistance, typically nickel, titanium, silver and the like, and the thickness of the metal transition film layer is 0-1000 nm; the metal conductive film layer is plated on the surface of the metal transition film layer, and the copper welding wire is welded on the surface of the metal conductive film layer to form a back electrode.

Or, a metal transition film layer is plated on the surface of the transparent conducting layer on the back, and the metal transition film layer is in contact with the transparent conducting layer to form low contact resistance, typically nickel, titanium, silver and the like, and the thickness of the metal transition film layer is 0-1000 nm; the metal conductive film layer is plated on the surface of the metal transition film layer; the surface of the metal conductive film layer is further plated with a metal protective film layer to prevent the metal conductive film layer from being corroded, meanwhile, the metal protective layer and a copper welding wire are easy to weld, tin, indium, nickel and the like can be used, the cost of tin is lower, meanwhile, the alloy of tin, indium, nickel and other metals is not excluded to achieve better welding performance and oxidation and corrosion resistance, and the thickness of the metal protective film layer is 100-2000 nm; and the copper welding wire is welded on the surface of the metal protection film layer to form a back electrode.

The HIT cell without the back electrode has the advantages that the use cost of the back silver paste is greatly reduced, and the front power generation efficiency of the HIT cell is effectively improved.

Based on the structure of the HIT battery without the back silver electrode, the invention also provides a manufacturing method of the HIT battery without the back silver electrode, which comprises the following steps:

1) cleaning and texturing the surface of the N-type silicon wafer to form a clean low-reflectivity textured surface;

2) plating an amorphous silicon layer on the front side and the back side of the silicon wafer after texturing respectively;

3) plating a layer of phosphorus-doped amorphous silicon or microcrystalline silicon on the surface of the amorphous silicon layer on the front side to form an N layer;

4) plating a layer of boron-doped amorphous silicon or microcrystalline silicon on the surface of the amorphous silicon layer on the back side to form a P layer;

5) plating a transparent conductive layer on the surface of the front N layer and the surface of the back P layer respectively;

6) printing low-temperature silver paste on the surface of the front transparent conductive layer through screen printing to form a conductive silver electrode;

7) plating a metal transition film layer with low contact resistance on the surface of the back transparent conductive layer by adopting a PVD (physical vapor deposition) or thermal evaporation method, in order to avoid the conduction of the metal transition film layer and the front silver electrode, during film plating, covering the edge of the silicon wafer without film plating, wherein the edge covering width is 0.1-1 mm;

8) plating a metal conductive film layer with good conductivity on the surface of the metal transition film layer by adopting a PVD (physical vapor deposition) or thermal evaporation method, wherein in order to avoid the conduction of the metal conductive film layer and a front silver electrode, the edge of a silicon wafer is covered without being plated, and the edge covering width is 0.1-1 mm;

9) plating a metal protective film layer on the surface of the metal conductive film layer by adopting a PVD (physical vapor deposition) or thermal evaporation method to prevent the metal conductive film layer from being corroded, in order to avoid the conduction of the metal protective film layer and a front silver electrode, during film plating, covering the edge of a silicon wafer without film plating, wherein the edge covering width is 0.1-1 mm;

10) and welding a copper welding wire as a back electrode on the surface of the metal protective film layer, wherein the copper welding wire is attached to the surface of the metal protective film layer and is welded from one end of the silicon wafer to the other end of the silicon wafer.

The number of the copper welding wires is 5-30, typically 12, and the copper welding wires are in any one of a round shape, a flat shape and a trapezoidal shape or in other shapes.

The invention also provides a manufacturing method of the HIT battery assembly, which is characterized in that the back copper welding wire of the HIT battery without the back silver electrode is connected with the silver electrode on the front side of the adjacent battery in series to form the battery assembly.

The invention also provides a solar power generation panel, which is prepared by integrating the serially connected battery modules in a glass material and can be used for roof power generation, solar tiles, solar-driven electric automobiles, aircrafts and other scenes.

Similarly, the corresponding structure and the preparation method of the battery are also suitable for preparing the battery such as PERC, TOPCon and the like, and the silicon wafer can be a P-type or N-type silicon wafer.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below.

Fig. 1 is a schematic diagram of a prior art HIT battery;

FIG. 2 is a schematic diagram of an HIT cell structure with an ABC three-layer metal film as disclosed in the examples;

FIG. 3 is a schematic diagram of an HIT cell with a B-layer metal film according to an embodiment;

FIG. 4 is a schematic diagram of an example disclosed HIT cell with two metal films AB;

fig. 5 is a schematic structural view of an example disclosed HIT cell with BC two-layer metal film.

The figures in the drawings represent: 10. a silicon wafer; 11. an amorphous silicon layer; a layer 121. N; a P layer; 13. a transparent conductive layer; 14. a silver electrode; A. a metal transition film layer; B. a metal conductive film layer; C. a metal protective film layer; 20. and (4) a copper welding wire.

Detailed Description

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

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