阅读说明：本技术 一种双路交错buck电路电压、电流环路控制电路 (Voltage and current loop control circuit of double-path interleaved BUCK circuit ) 是由 王文伟 眭俊俊 于 2020-05-25 设计创作，主要内容包括：本发明涉及一种双路交错BUCK电路电压、电流环路控制电路。利用运算放大器U4组成电压环,再将运算放大器U3组成的电流环并联到电压环中,将电流、电压的采样和比较放大反馈整合在一个电路中,通过反馈电路调整脉宽保证输出电压的稳定,电流输出采样信号I_OUT再通过在运算放大器U4的反向输入端接入二极管U2截流和电阻R8限流,使电流输出采样信号I_OUT直接引入到电压环运算放大器U4的反向输入端,当电流输出采样信号I_OUT过大时直接将信号返回到电压环中,由于电流环反应速度比电压环块的多,补偿了系统的静差和负载的变动,缩短了电流采样对电压环控制的时间,使环路控制更加的稳定和反应速度更快。(The invention relates to a voltage and current loop control circuit of a double-path interleaved BUCK circuit. The operational amplifier U4 is used for forming a voltage loop, a current loop formed by the operational amplifier U3 is connected in parallel to the voltage loop, sampling, comparison and amplification feedback of current and voltage is integrated in a circuit, the pulse width is adjusted through a feedback circuit to ensure the stability of output voltage, a current output sampling signal I _ OUT is cut off through a diode U2 connected to the reverse input end of the operational amplifier U4 and limited by a resistor R8, the current output sampling signal I _ OUT is directly introduced to the reverse input end of the voltage loop operational amplifier U4, when the current output sampling signal I _ OUT is overlarge, the signal is directly returned to the voltage loop, because the current loop reaction speed is higher than that of a voltage loop block, the static difference and load variation of a system are compensated, the time of current sampling for controlling the voltage loop is shortened, and the loop control is more stable and faster.)

1. A voltage and current loop control circuit of a double-path interleaved BUCK circuit is characterized in that: the voltage comparison reference circuit comprises an operational amplifier U4, a voltage comparison reference signal V _ PWM output by a chip forms a reference voltage branch circuit, the reference voltage branch circuit is connected with a homodromous input end 5 of an operational amplifier U4 through a series resistor R11, one end of the resistor R11, which is far away from the operational amplifier U4, is grounded through parallel resistors C8 and R12, a current output sampling signal I _ OUT and a voltage output sampling signal LOOP _ VF are connected in series and then are connected with a reverse input end 6, the output end of the operational amplifier U4 is connected with the reverse input end 6 through a second feedback circuit, the second feedback circuit is a side integrating circuit and comprises parallel capacitors C9 and C10, and the capacitor C9 is connected with a resistor R13 in series; a current comparison reference signal I _ PWM output by the chip forms a reference current branch which is connected to the homodromous input end of an operational amplifier U3, a current output sampling signal I _ OUT series resistor R15 is connected to the reverse input end of the operational amplifier U3, the output end of the operational amplifier U3 is connected in series with a resistor R7 and a diode D1 and then is connected in parallel with the reference voltage branch to the homodromous input end 5 of the operational amplifier U4, the output end of the operational amplifier U3 is connected with the reverse input end of the operational amplifier U3 through a first feedback circuit, the first feedback circuit is a side integrating circuit and comprises capacitors C6 and C7 which are connected in parallel, and a capacitor C6 series resistor R6; after the current output sampling signal I _ OUT is simultaneously connected with the diode D2 and the resistor R8 in series and the voltage output sampling signal LOOP _ VF is connected with the resistor R9 in series, the current output sampling signal I _ OUT branch and the voltage output sampling signal LOOP _ VF branch are connected in parallel, then the resistor R10 is connected with the reverse input end 6 in series, and one end of the resistor R10 far away from the operational amplifier U4 is grounded through the capacitor C5.

2. The dual-path interleaved BUCK circuit voltage and current loop control circuit of claim 1, wherein: the reference voltage branch circuit comprises a resistor R3, a voltage follower U1 and a filter circuit RC4 which are sequentially connected in series through a voltage comparison reference signal V _ PWM, wherein the filter circuit RC3 is arranged at the front end of the voltage follower U1, the filter circuit RC3 comprises a capacitor C3 connected with a homodromous access end of the voltage follower U1 in parallel with the resistor R3 and a resistor R4 connected with an output end of the voltage follower U1 in series, the filter circuit RC4 comprises a resistor R5 and a capacitor C4 which are connected in parallel, and the other ends of the capacitor C3 and the capacitor C4 are grounded.

3. The dual-path interleaved BUCK circuit voltage and current loop control circuit of claim 1, wherein: the reference current branch circuit is characterized in that a current comparison reference signal I _ PWM is sequentially connected with a filter circuit RC1, a voltage follower U2 and a filter circuit R2 in series, the filter circuit RC1 comprises a resistor R1 and a capacitor C1 which are connected in parallel, the filter circuit RC2 comprises a resistor R2 and a capacitor C2 which are connected in parallel, the input end of the resistor R2 is connected with the output end of the voltage follower U2, and the other ends of the capacitors C1 and C2 are grounded.

Technical Field

The invention relates to the technical field of circuit voltage and current loop control, in particular to a double-path interleaved BUCK circuit voltage and current loop control circuit.

Background

With the rapid development of the technology of the electric vehicle, the market of the electric vehicle is rapidly increased, and the keeping quantity of the electric vehicle is gradually increased year by year.

The BUCK circuit is also called a step-down circuit, and is basically characterized by a DC-DC conversion circuit, and the output voltage is lower than the input voltage. The power supply terminal has high efficiency and good reliability, and can enable the voltage or current waveform in the circuit to change rapidly and instantaneously, so the power supply terminal is widely applied to the power supply terminal. The input current is alternating current, and the output current is direct current. In the current solution applied to loop processing of the BUCK circuit, because an LC and RC integrating circuit exists in a voltage loop, output voltage lags, and transient characteristics of output, namely system static error, are affected.

Disclosure of Invention

The invention aims to overcome the defects of the prior art and provide a double-path interleaved BUCK circuit voltage and current loop control circuit, which shortens the time of current sampling for controlling a voltage loop, and ensures that the loop control is more stable and the reaction speed is higher.

The purpose of the invention is realized by the following technical scheme:

a voltage and current LOOP control circuit of a double-path interleaved BUCK circuit comprises an operational amplifier U4, a voltage comparison reference signal V _ PWM output by a chip forms a reference voltage branch circuit, the reference voltage branch circuit is connected to a homodromous input end 5 of an operational amplifier U4 through a series resistor R11, one end, far away from the operational amplifier U4, of a resistor R11 is grounded through parallel resistors C8 and R12, a current output sampling signal I _ OUT and a voltage output sampling signal LOOP _ VF are connected in series and then connected to a reverse input end 6, the output end of the operational amplifier U4 is connected to the reverse input end 6 of the operational amplifier U4 through a second feedback circuit, the second feedback circuit is a side integrating circuit and comprises parallel capacitors C9 and C10, and a capacitor C9 is connected with a resistor R13 in series; a current comparison reference signal I _ PWM output by the chip forms a reference current branch which is connected to the homodromous input end of an operational amplifier U3, a current output sampling signal I _ OUT series resistor R15 is connected to the reverse input end of the operational amplifier U3, the output end of the operational amplifier U3 is connected in series with a resistor R7 and a diode D1 and then is connected in parallel with the reference voltage branch to the homodromous input end 5 of the operational amplifier U4, the output end of the operational amplifier U3 is connected with the reverse input end of the operational amplifier U3 through a first feedback circuit, the first feedback circuit is a side integrating circuit and comprises capacitors C6 and C7 which are connected in parallel, and a capacitor C6 series resistor R6; after the current output sampling signal I _ OUT is simultaneously connected with the diode D2 and the resistor R8 in series and the voltage output sampling signal LOOP _ VF is connected with the resistor R9 in series, the current output sampling signal I _ OUT branch and the voltage output sampling signal LOOP _ VF branch are connected in parallel, then the resistor R10 is connected with the reverse input end 6 in series, and one end of the resistor R10 far away from the operational amplifier U4 is grounded through the capacitor C5.

Specifically, the reference voltage branch comprises a resistor R3, a voltage follower U1 and a filter circuit RC4 which are sequentially connected in series by a voltage comparison reference signal V _ PWM, wherein the filter circuit RC3 is arranged at the front end of the voltage follower U1, the filter circuit RC3 comprises a capacitor C3 connected with a homodromous access end of the voltage follower U1 in parallel with the resistor R3 and a resistor R4 connected with an output end of the voltage follower U1 in series, the filter circuit RC4 comprises a resistor R5 and a capacitor C4 connected in parallel, and the other ends of the capacitor C3 and the capacitor C4 are grounded.

Specifically, the reference current branch is connected in series with a filter circuit RC1, a voltage follower U2 and a filter circuit R2 in sequence through a current comparison reference signal I _ PWM, the filter circuit RC1 comprises a resistor R1 and a capacitor C1 which are connected in parallel, the filter circuit RC2 comprises a resistor R2 and a capacitor C2 which are connected in parallel, the input end of the resistor R2 is connected with the output end of the voltage follower U2, and the other ends of the capacitors C1 and C2 are grounded.

Compared with the prior art, the invention has the following advantages and beneficial effects: the invention integrates a current loop in parallel in the voltage loop, samples and compares and amplifies a current output sampling signal I _ OUT, ensures the stability of output voltage by adjusting the pulse width through a feedback circuit, and ensures the stability of the output voltage by connecting a diode U2 to cut off and limiting the current through a resistor R8 to the reverse input end of an operational amplifier U4, so that the current output sampling signal I _ OUT is directly introduced to the reverse input end of the voltage loop operational amplifier U4, and when the current of the current output sampling signal I _ OUT is overlarge, the signal is directly fed back to the voltage loop.

Drawings

Fig. 1 is a circuit wiring diagram of an implementation of the present invention.

Detailed Description

The present invention will be described in further detail with reference to examples and drawings, but the present invention is not limited thereto.

As shown in fig. 1, the circuit principle of the present invention is as follows:

a voltage and current LOOP control circuit of a double-path interleaved BUCK circuit comprises an operational amplifier U4, a voltage comparison reference signal V _ PWM output by a chip forms a reference voltage branch circuit, the reference voltage branch circuit is connected to a homodromous input end 5 of an operational amplifier U4 through a series resistor R11, one end, far away from the operational amplifier U4, of a resistor R11 is grounded through parallel resistors C8 and R12, a current output sampling signal I _ OUT and a voltage output sampling signal LOOP _ VF are connected in series and then connected to a reverse input end 6, the output end of the operational amplifier U4 is connected to the reverse input end 6 of the operational amplifier U4 through a second feedback circuit, the second feedback circuit is a side integrating circuit and comprises parallel capacitors C9 and C10, and a capacitor C9 is connected with a resistor R13 in series; a current comparison reference signal I _ PWM output by the chip forms a reference current branch which is connected to the homodromous input end of an operational amplifier U3, a current output sampling signal I _ OUT series resistor R15 is connected to the reverse input end of the operational amplifier U3, the output end of the operational amplifier U3 is connected in series with a resistor R7 and a diode D1 and then is connected in parallel with the reference voltage branch to the homodromous input end 5 of the operational amplifier U4, the output end of the operational amplifier U3 is connected with the reverse input end of the operational amplifier U3 through a first feedback circuit, the first feedback circuit is a side integrating circuit and comprises capacitors C6 and C7 which are connected in parallel, and a capacitor C6 series resistor R6; after the current output sampling signal I _ OUT is simultaneously connected with the diode D2 and the resistor R8 in series and the voltage output sampling signal LOOP _ VF is connected with the resistor R9 in series, the current output sampling signal I _ OUT branch and the voltage output sampling signal LOOP _ VF branch are connected in parallel, then the resistor R10 is connected with the reverse input end 6 in series, and one end of the resistor R10 far away from the operational amplifier U4 is grounded through the capacitor C5.

Specifically, the reference voltage branch comprises a resistor R3, a voltage follower U1 and a filter circuit RC4 which are sequentially connected in series by a voltage comparison reference signal V _ PWM, wherein the filter circuit RC3 is arranged at the front end of the voltage follower U1, the filter circuit RC3 comprises a capacitor C3 connected with the homodromous access end of the voltage follower U1 in parallel with the resistor R3 and a resistor R4 connected with the output end of the voltage follower U1 in series, the filter circuit RC4 comprises a resistor R5 and a capacitor C4 connected in parallel, and the other ends of the capacitor C3 and the capacitor C4 are grounded.

Specifically, the reference current branch circuit is connected with the current comparison reference signal I _ PWM in series with the filter circuit RC1, the voltage follower U2 and the filter circuit R2 in sequence, the filter circuit RC1 comprises a resistor R1 and a capacitor C1 which are connected in parallel, the filter circuit RC2 comprises a resistor R2 and a capacitor C2 which are connected in parallel, the input end of the resistor R2 is connected with the output end of the voltage follower U2, and the other ends of the capacitors C1 and C2 are grounded.

In the circuit structure, the reference voltage branch circuit is used for comparing and feeding back a voltage comparison reference signal V _ PWM (pulse width modulation) which is connected to a voltage output sampling signal LOOP _ VF which is connected to an inverting input end 6 after being connected to a same-direction input end 5 of an operational amplifier U4, so as to form a voltage LOOP; the reference current branch circuit is used for comparing and feeding back a current comparison reference signal I _ PWM (pulse width modulation) connected to a current output sampling signal I _ OUT connected to an inverting input end 6 after the current comparison reference signal I _ PWM is connected to a same-direction input end 5 of the operational amplifier U4 to form a current loop.

The operational amplifier (abbreviated as "operational amplifier") is a circuit unit named from the perspective of function and having a very high amplification factor, and can be realized by a discrete device, can also be realized in a semiconductor chip, and is widely applied to the electronic industry. In an actual circuit, a functional module is generally composed in combination with a feedback network. It is an amplifier with special coupling circuit and feedback. The output signal may be the result of mathematical operations such as addition, subtraction or differentiation, integration, etc. of the input signal. With the development of semiconductor technology, most operational amplifiers exist in a single chip form.

According to the circuit, the working principle of the circuit is as follows:

the main control chip sends a voltage comparison reference signal V _ PWM (rated V _ PWM duty ratio signal) to obtain a stable direct-current voltage through RC (R4, C3) filtering, the voltage is filtered again through a voltage follower U1 and a post-stage RC (R5, C4), the voltage is divided to a homodromous input end 5 of an operational amplifier U4 to be used as a comparison reference, a voltage output sampling signal LOOP _ VF is used as output voltage sampling feedback, the voltage is divided to an inverse input end 6 of the operational amplifier U4 to be compared with the homodromous input end 5, an output end COMP _ VOUT signal is sent to the control chip, and the following three conditions can occur:

1. when the level of the reverse input end 6 is greater than the level of the equidirectional input end 5, the capacitor in the U4 side integrating circuit is charged and discharged along with the time change, the voltage of the capacitor is equal to the voltage of the reverse input end 6 after the capacitor is charged, the U4 side integrating circuit is used for enabling an output end COMP _ VOUT signal to be stably added into the integrating circuit, the voltage of the output end COMP _ VOUT is compared with the voltage of the equidirectional input end 5 and is pulled down compared with a reference voltage, the output end COMP _ VOUT signal is correspondingly pulled down, meanwhile, the voltage difference is fed back to the chip, the driving duty ratio is reduced by.

2. When the level of the reverse input end 6 is lower than that of the equidirectional input end 5, the capacitor in the U4 side integrating circuit is charged and discharged along with the time change, when the capacitor is charged to the level that the voltage of the capacitor is equal to that of the reverse input end 6 after the charging is finished, the U4 side integrating circuit is used for enabling an output end COMP _ VOUT signal to be stably added into the integrating circuit, the voltage of the output end COMP _ VOUT is compared with that of the equidirectional input end 5 to be pulled up to a reference voltage, the output end COMP _ VOUT signal is correspondingly increased, meanwhile, the voltage difference is fed back to the chip, the control.

3. When the level of the reverse input end 6 is equal to that of the same-direction input end 5, the output voltage at the moment is equal to the rated duty ratio, and the circuit enters a constant voltage mode.

The main control chip sends a current comparison reference signal I _ PWM (rated I _ PWM duty ratio signal) to obtain a stable direct current voltage through RC (R1, C1) filtering, the voltage is filtered again through a voltage follower U2 and a post-stage RC (R2, C2), the voltage is divided to the equidirectional input end of an operational amplifier U3 to be used as a comparison reference, a current output sampling signal I _ OUT is transmitted to the reverse input end of the operational amplifier U3 to be compared with the filtered current comparison reference signal I _ PWM input to the equidirectional input end, and the following conditions are obtained:

1. when the current output sampling signal I _ OUT is greater than the current comparison reference signal I _ PWM, the output of the operational amplifier U3 is lower than the voltage from the voltage comparison reference signal V _ PWM, and the current loop pulls down the voltage loop reference voltage (the specific value is set by considering how much the current sampling is greater than the current reference), and the circuit enters the constant current mode.

2. When the current output sampling signal I _ OUT is smaller than the current comparison reference signal I _ PWM, the output end of the operational amplifier U3 outputs a voltage higher than that emitted by the voltage comparison reference signal V _ PWM, and due to the unidirectional conduction characteristic of the diode D1, the voltage at the output end of the operational amplifier U3 cannot influence the voltage loop because the D1 is turned off reversely.

Tests show that the speed of the current output sampling signal I _ OUT after being compared by the operational amplifier U4 and the reaction speed of the pull voltage ring is different from the expected speed, the current output sampling signal I _ OUT is led into the circuit in the circuit, then is connected with the diode D2 and then is connected to the voltage loop operational amplifier through the current limiting resistor R8, when the value of the current output sampling signal I _ OUT is quite large, the signal is directly fed back to the reverse input end 6 of the operational amplifier U4, at the moment, the current output sampling signal I _ OUT can be fed back to the voltage ring more quickly, and the control chip directly controls the duty ratio to send.

The invention directly introduces the current output sampling signal I _ OUT to the reverse input end 6 of the voltage loop operational amplifier U4, thereby shortening the time of controlling the voltage loop by current sampling.

The above-mentioned embodiments only express the embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.