阅读说明：本技术 半导体工艺腔室、晶片边缘保护方法及半导体设备 (Semiconductor process chamber, wafer edge protection method and semiconductor equipment ) 是由 唐希文 陈景春 于 2020-04-23 设计创作，主要内容包括：本发明提供一种半导体工艺腔室、晶片边缘保护方法及半导体设备,其中,半导体工艺腔室包括基座及晶片边缘保护装置,且晶片边缘保护装置设置于基座上,晶片边缘保护装置包括内保护环和外保护环；外保护环环绕设置在内保护环外侧,且与内保护环相搭接,并且外保护环能够带动内保护环同步升降；内保护环的内径小于晶片的直径,内保护环用于遮挡置于基座上的晶片的边缘,且内保护环的外径尺寸小于半导体工艺腔室的传片口尺寸。本发明提供的半导体工艺腔室、晶片边缘保护方法及半导体设备能够便于不同的半导体加工工艺的切换,提高产能,并能够提高半导体加工工艺的均匀性,改善晶片的边缘在半导体加工工艺中产生角度倾斜的问题。(The invention provides a semiconductor process chamber, a wafer edge protection method and semiconductor equipment, wherein the semiconductor process chamber comprises a base and a wafer edge protection device, the wafer edge protection device is arranged on the base, and the wafer edge protection device comprises an inner protection ring and an outer protection ring; the outer protection ring is arranged around the outer side of the inner protection ring and is in lap joint with the inner protection ring, and the outer protection ring can drive the inner protection ring to synchronously lift; the inner protection ring has an inner diameter smaller than a diameter of the wafer, the inner protection ring is configured to shield an edge of the wafer disposed on the susceptor, and an outer diameter smaller than a wafer transfer port of the semiconductor process chamber. The semiconductor process chamber, the wafer edge protection method and the semiconductor equipment provided by the invention can facilitate the switching of different semiconductor processing technologies, improve the productivity, improve the uniformity of the semiconductor processing technology and solve the problem that the edge of the wafer generates an angle inclination in the semiconductor processing technology.)

1. A semiconductor process chamber, the semiconductor process chamber includes a pedestal and a wafer edge protection device, and the wafer edge protection device is disposed on the pedestal, characterized in that the wafer edge protection device includes an inner protection ring and an outer protection ring; the outer protection ring is arranged around the outer side of the inner protection ring and is in lap joint with the inner protection ring, and the outer protection ring can drive the inner protection ring to synchronously lift;

the inner protection ring has an inner diameter smaller than the diameter of the wafer, the inner protection ring is used for shielding the edge of the wafer placed on the pedestal, and the outer diameter of the inner protection ring is smaller than the wafer transfer port of the semiconductor process chamber.

2. The semiconductor process chamber of claim 1, wherein a first annular boss is disposed on an outer peripheral wall of the inner protection ring, a second annular boss is disposed on an inner peripheral wall of the outer protection ring, and a lower surface of the first annular boss overlaps an upper surface of the second annular boss.

3. The semiconductor process chamber of claim 2, wherein an upper surface of the first annular mesa is flush with an upper surface of the inner guard ring.

4. The semiconductor process chamber of claim 2, wherein the first annular mesa has a thickness of 2mm to 3mm and a width of 1.5mm to 2.5 mm.

5. The semiconductor process chamber of claim 1, wherein an inner diameter of the inner guard ring is 1mm to 3mm smaller than a diameter of the wafer.

6. The semiconductor process chamber of claim 1, wherein an inner diameter of the inner guard ring is 290mm to 300mm and an outer diameter of the inner guard ring is 315mm to 325 mm.

7. The semiconductor process chamber of claim 1, further comprising a lift mechanism coupled to the outer guard ring for driving the outer guard ring in a lifting motion.

8. The semiconductor process chamber of claim 1, wherein the pedestal comprises a pedestal body and a focus ring disposed circumferentially around the pedestal body, the inner and outer guard rings overlapping the focus ring.

9. A wafer edge protection method is applied to a semiconductor process chamber and is characterized by comprising the following steps:

the lifting mechanism lifts the outer protection ring and drives the inner protection ring to lift together through the outer protection ring;

the thimble assembly in the base supports the wafer;

the wafer which is in the lifted state is picked up by a mechanical arm and passes through a wafer transferring port of the semiconductor process chamber, and the wafer is transferred to the outside of the semiconductor process chamber;

the manipulator picks up the alloy disc and penetrates through a disc transferring port of the semiconductor process chamber to transfer the alloy disc into the semiconductor process chamber; the thimble assembly falls back, and the alloy disc is positioned on the base;

the thimble assembly jacks the alloy disc to drive the inner protection ring to rise so as to separate the inner protection ring from the outer protection ring;

and the mechanical arm respectively picks up the alloy disc and the inner protection ring, penetrates through a wafer transferring port of the semiconductor process chamber and transmits the alloy disc and the inner protection ring to the outside of the semiconductor process chamber.

10. A semiconductor device, characterized in that it employs a semiconductor process chamber according to any one of claims 1 to 8.

Technical Field

The invention relates to the technical field of semiconductor equipment, in particular to a semiconductor process chamber, a wafer edge protection method and semiconductor equipment.

Background

At present, because a mask layer is difficult to protect an arc-shaped wafer edge portion, a liftable wafer edge protection ring is generally arranged in a semiconductor process chamber for performing a plasma etching process, and the wafer edge protection ring is mainly used for descending to a position capable of performing non-contact covering on the edge portion of a wafer when a deep groove etching process is performed so as to adjust the plasma density near the edge of the wafer and avoid the defects of needle-like structure, angle inclination and the like caused by excessive etching on the edge portion of the wafer by high-concentration plasma in the deep groove etching process. When the shallow groove etching process is carried out, because the plasma concentration is low, the edge part of the wafer is not required to be covered by the edge protection device, at the moment, the wafer edge protection ring rises and is suspended in the process chamber so as to be far away from the edge part of the wafer, and the plasma with the low concentration can etch the edge part of the wafer.

However, since the inner diameter of the wafer edge protection ring is smaller than the diameter of the wafer, even if the wafer edge protection ring rises far away from the edge portion of the wafer, the wafer edge protection ring still seriously hinders the plasma gas flow from smoothly reaching the surface of the wafer, which results in poor uniformity of the etching process and low etching rate. The outer diameter of the edge protection ring is larger than the size of the wafer transmission port of the process chamber, so that the edge protection ring cannot be taken out smoothly through the wafer transmission port, at the moment, in order to eliminate the influence of the edge protection ring on the etching process, the whole set of wafer edge protection ring mechanism can be disassembled and taken out only by opening the process chamber, and when different processes are switched, the process chamber can be opened continuously to disassemble and take out the edge protection ring mechanism or put in and install the edge protection ring mechanism, so that the productivity is greatly influenced.

Disclosure of Invention

The invention aims to at least solve one of the technical problems in the prior art, and provides a semiconductor process chamber, a wafer edge protection method and semiconductor equipment, which can facilitate the switching of different semiconductor processing technologies, improve the productivity, improve the uniformity of the semiconductor processing technologies and improve the problem that the edge of a wafer generates an angle inclination in the semiconductor processing technologies.

In order to achieve the purpose of the invention, the semiconductor process chamber comprises a pedestal and a wafer edge protection device, wherein the wafer edge protection device is arranged on the pedestal and comprises an inner protection ring and an outer protection ring; the outer protection ring is arranged around the outer side of the inner protection ring and is in lap joint with the inner protection ring, and the outer protection ring can drive the inner protection ring to synchronously lift;

the inner protection ring has an inner diameter smaller than the diameter of the wafer, the inner protection ring is used for shielding the edge of the wafer placed on the pedestal, and the outer diameter of the inner protection ring is smaller than the wafer transfer port of the semiconductor process chamber.

Preferably, the outer peripheral wall of the inner protection ring is provided with a first annular boss, the inner peripheral wall of the outer protection ring is provided with a second annular boss, and the lower surface of the first annular boss is overlapped on the upper surface of the second annular boss.

Preferably, an upper surface of the first annular boss is flush with an upper surface of the inner protective ring.

Preferably, the thickness of the first annular boss is 2mm-3mm, and the width of the first annular boss is 1.5mm-2.5 mm.

Preferably, the inner diameter of the inner guard ring is 1mm to 3mm smaller than the diameter of the wafer.

Preferably, the inner diameter of the inner protection ring is 290mm-300mm, and the outer diameter of the inner protection ring is 315mm-325 mm.

Preferably, the semiconductor process chamber further comprises a lifting mechanism, and the lifting mechanism is connected with the outer protection ring and is used for driving the outer protection ring to perform lifting movement.

Preferably, the base comprises a base body and a focus ring, the focus ring is arranged around the base body, and the inner protection ring and the outer protection ring are overlapped on the focus ring.

As another technical solution, the present invention further provides a wafer edge protection method applied in a semiconductor process chamber, including:

the lifting mechanism lifts the outer protection ring and drives the inner protection ring to lift together through the outer protection ring;

the thimble assembly in the base supports the wafer;

the wafer which is in the lifted state is picked up by a mechanical arm and passes through a wafer transferring port of the semiconductor process chamber, and the wafer is transferred to the outside of the semiconductor process chamber;

the manipulator picks up the alloy disc and penetrates through a disc transferring port of the semiconductor process chamber to transfer the alloy disc into the semiconductor process chamber; the thimble assembly falls back, and the alloy disc is positioned on the base;

the thimble assembly jacks the alloy disc to drive the inner protection ring to rise so as to separate the inner protection ring from the outer protection ring;

and the mechanical arm respectively picks up the alloy disc and the inner protection ring, penetrates through a wafer transferring port of the semiconductor process chamber and transmits the alloy disc and the inner protection ring to the outside of the semiconductor process chamber.

As another technical solution, the present invention further provides a semiconductor apparatus, wherein the semiconductor apparatus employs the semiconductor process chamber provided by the present invention.

The invention has the following beneficial effects:

according to the semiconductor process chamber provided by the invention, by means of the inner protection ring which has the inner diameter smaller than the diameter of the wafer and the outer diameter smaller than the size of the wafer transfer port of the semiconductor process chamber and is in lap joint with the outer protection ring, the inner protection ring can pass through the wafer transfer port of the semiconductor process chamber to be sent into the semiconductor process chamber or be taken out of the semiconductor process chamber, so that the wafer edge protection device can be adjusted at any time under the condition that the semiconductor process chamber is not opened, the switching of different semiconductor processing processes is facilitated, and the productivity is improved. Moreover, the flow field of the process gas or the flow field of the plasma in the semiconductor process chamber can be changed by changing the inner protection rings with different structures at any time, and the electric field in the semiconductor process chamber can be changed by changing the inner protection rings with different materials at any time, so that the uniformity of the semiconductor processing process is improved, and the problem that the edge of the wafer generates angle inclination in the semiconductor processing process is solved.

The wafer edge protection method provided by the invention has the advantages that the wafer in the process chamber is picked up by the mechanical arm and is transmitted to the outside of the semiconductor process chamber through the wafer transmission port of the semiconductor process chamber, the alloy disk is picked up and is transmitted into the semiconductor process chamber through the wafer transmission port of the semiconductor process chamber, the alloy disk is jacked by the thimble assembly, the inner protection ring is separated from the outer protection ring, the alloy disk and the inner protection ring are picked up by the mechanical arm and are transmitted to the outside of the semiconductor process chamber through the wafer transmission port of the semiconductor process chamber, and the wafer edge protection device can be adjusted at any time under the condition that the semiconductor process chamber is not opened, so that the switching of different semiconductor processing processes is facilitated, and the productivity is improved. Moreover, the flow field of the process gas or the flow field of the plasma in the semiconductor process chamber can be changed by changing the inner protection rings with different structures at any time, and the electric field in the semiconductor process chamber can be changed by changing the inner protection rings with different materials at any time, so that the uniformity of the semiconductor processing process is improved, and the problem that the edge of the wafer generates angle inclination in the semiconductor processing process is solved.

The semiconductor equipment provided by the invention can facilitate the switching of different semiconductor processing technologies by virtue of the semiconductor process chamber provided by the invention, improve the productivity, improve the uniformity of the semiconductor processing technology and solve the problem that the edge of a wafer generates an angle inclination in the semiconductor processing technology.

Drawings

FIG. 1 is a schematic structural view of a connection between an inner guard ring and an outer guard ring in a semiconductor processing chamber according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of a semiconductor process chamber with an inner guard ring separated from an outer guard ring according to an embodiment of the present invention;

FIG. 3 is a schematic diagram illustrating a top view of a semiconductor processing chamber according to an embodiment of the present invention;

FIG. 4 is a flow chart of a wafer edge protection method according to an embodiment of the present invention;

description of reference numerals:

11-an inner guard ring; 111-a first annular boss; 12-an outer guard ring; 121-a second annular boss; 13-a sheet conveying port; 14-a lifting mechanism; 15-the peripheral wall; 16-a base body; 161-a body portion; 162-a ring body portion; 17-a wafer; 18-a focus ring; 19-a robot arm; 20-ejector pin.

Detailed Description

In order to make those skilled in the art better understand the technical solution of the present invention, the semiconductor process chamber, the wafer edge protection method and the semiconductor apparatus provided by the present invention will be described in detail below with reference to the accompanying drawings.

As shown in fig. 1-3, the present embodiment provides a semiconductor process chamber, which includes a pedestal 16 and a wafer edge protection device disposed on the pedestal 16, the wafer edge protection device including an inner guard ring 11 and an outer guard ring 12; the outer protection ring 12 is arranged around the outer side of the inner protection ring 11 and is in lap joint with the inner protection ring 11, and the outer protection ring 12 can drive the inner protection ring 11 to synchronously lift; the inner diameter of the inner protection ring 11 is smaller than the diameter of the wafer 17, the inner protection ring 11 is used for shielding the edge of the wafer 17 placed on the pedestal 16, and the outer diameter of the inner protection ring 11 is smaller than the size of the wafer transfer port 13 of the semiconductor process chamber.

In the semiconductor process chamber provided by the embodiment, by means of the inner protection ring 11 which has an inner diameter smaller than the diameter of the wafer 17 and an outer diameter smaller than the size of the wafer transfer port of the semiconductor process chamber and is overlapped with the outer protection ring 12, the inner protection ring 11 can be conveyed into the semiconductor process chamber through the wafer transfer port 13 of the semiconductor process chamber or taken out of the semiconductor process chamber, so that the edge protection device of the wafer 17 can be adjusted at any time under the condition that the semiconductor process chamber is not opened, thereby facilitating the switching of different semiconductor processing processes and improving the productivity. Moreover, the flow field of the process gas or the flow field of the plasma in the semiconductor process chamber can be changed by changing the inner protection ring 11 with different structures at any time, and the electric field in the semiconductor process chamber can be changed by changing the inner protection ring 11 with different materials at any time, so that the uniformity of the semiconductor processing process is improved, and the problem that the edge of the wafer 17 generates an angle inclination in the semiconductor processing process is solved.

Specifically, when a semiconductor processing process is performed, such as a deep trench etching process, in which the edge of the wafer 17 needs to be shielded, the inner protection ring 11 may be fed into the semiconductor processing chamber through the wafer transfer port 13 of the semiconductor processing chamber and overlapped with the outer protection ring 12, so that the inner protection ring 11 is driven by the outer protection ring 12 to synchronously lift to a proper position in the semiconductor processing chamber, so that the inner protection ring 11 can shield the edge of the wafer 17 placed on the susceptor 16, and when a semiconductor processing process, such as a shallow trench etching process, in which the edge of the wafer 17 does not need to be shielded, is performed, the inner protection ring 11 is separated from the outer protection ring 12, and the inner protection ring 11 passes through the wafer transfer port 13 of the semiconductor processing chamber and is taken out of the semiconductor processing chamber, so that the edge protection apparatus of the wafer 17 can be adjusted at any time without opening the semiconductor processing chamber, thereby facilitating the switching of different semiconductor processing technologies and improving the productivity.

In this embodiment, the semiconductor processing chamber further comprises a lift mechanism 14, wherein the lift mechanism 14 is connected to the outer guard ring 12 for driving the outer guard ring 12 to move up and down.

In this embodiment, the outer circumferential wall of the inner protection ring 11 is provided with a first annular boss 111, the inner circumferential wall of the outer protection ring 12 is provided with a second annular boss 121, the lower surface of the first annular boss 111 is overlapped on the upper surface of the second annular boss 121, so that the first annular boss 111 is overlapped on the second annular boss 121, the inner protection ring 11 is overlapped on the outer protection ring 12, the overlapping of the inner protection ring 11 and the outer protection ring 12 is realized, and the outer protection ring 12 can drive the inner protection ring 11 to synchronously lift. However, the manner in which the outer guard ring 12 and the inner guard ring 11 overlap each other is not limited to this.

In this embodiment, the upper surface of the first annular boss 111 is flush with the upper surface of the inner protection ring 11. The design is to prevent the upper surface of the first annular boss 111 from protruding relative to the upper surface of the inner protection ring 11, or the upper surface of the inner protection ring 11 from protruding relative to the upper surface of the first annular boss 111, which affects the flow of the process gas or plasma in the semiconductor process chamber, so that the process gas or plasma can stably flow in the semiconductor process chamber.

In the present embodiment, when the lower surface of the first annular boss 111 overlaps the upper surface of the second annular boss 121, the upper surface of the first annular boss 111 is also flush with the upper surface of the outer protection ring 12. Such a design is to prevent the upper surface of the first annular projection 111 from protruding relative to the upper surface of the outer protection ring 12, or the upper surface of the outer protection ring 12 from protruding relative to the upper surface of the first annular projection 111, which affects the flow of the process gas or plasma in the semiconductor process chamber, so that the process gas or plasma can stably flow in the semiconductor process chamber.

Optionally, the thickness of the first annular boss 111 is 2mm to 3 mm. Preferably, the thickness of the first annular boss 111 is 2.5 mm.

Optionally, the width of the first annular boss 111 is 1.5mm-2.5 mm. Preferably, the width of the first annular boss 111 is 2 mm.

Optionally, the inner guard ring 11 has an inner diameter 1mm to 3mm smaller than the diameter of the wafer 17 to be able to cover the edge of the wafer 17 by 1mm to 3 mm. Preferably, the inner guard ring 11 has an inner diameter 2.5mm smaller than the diameter of the wafer 17 to cover the edge of the wafer 17 by 2.5mm

Optionally, the inner diameter of the inner protection ring 11 is 290mm to 300mm, and the outer diameter of the inner protection ring 11 is 315mm to 325 mm. Preferably, the inner diameter of the inner protection ring 11 is 295mm, and the outer diameter of the inner protection ring 11 is 320 mm.

In this embodiment, the susceptor 16 includes a susceptor body 16 and a focus ring 18, the focus ring 18 being circumferentially disposed around the susceptor body 16, and the inner and outer guard rings 11 and 12 overlapping the focus ring 18. Specifically, in the present embodiment, the susceptor body 16 includes a main body portion 161 and an annular body portion 162, wherein the main body portion 161 is used for carrying the wafer 17 during the semiconductor processing process, and the annular body portion 162 is disposed around the main body portion for carrying the focus ring 18. However, in practice, the form of the base 16 is not limited thereto.

In the present embodiment, when the lower surface of the second annular boss 121 is flush with the lower surface of the outer protection ring 12, and the lower surface of the first annular boss 111 overlaps the upper surface of the second annular boss 121, the lower surface of the second annular boss 121 is flush with the lower surface of the inner protection ring 11. The reason for this design is that when the outer protection ring 12 drives the inner protection ring 11 to synchronously lower to a position where the inner protection ring 11 shields the edge of the wafer 17, the lower surface of the inner protection ring 11, the lower surface of the outer protection ring 12 and the lower surface of the second annular boss 121 are flush with each other, so that the wafer 17 edge protection device can stably overlap the focus ring 18 surrounding the susceptor 16, and the focus ring 18 surrounding the susceptor 16 can stably support the wafer edge protection device, thereby improving the working stability of the wafer edge protection device.

Optionally, the thickness of the second annular boss 121 is 2mm to 3 mm. Preferably, the thickness of the second annular boss 121 is 2.5 mm.

Optionally, the outer guard ring 12 has an outer diameter of 445mm to 450 mm. Preferably, the outer guard ring 12 has an outer diameter of 448 mm.

As shown in fig. 4, as another technical solution, an embodiment of the present invention further provides a wafer edge protection method applied in a semiconductor processing chamber, including:

s1, the lifting mechanism lifts the outer protection ring 12, and the inner protection ring 11 is driven by the outer protection ring 12 to lift up together;

s2, the thimble assembly in the base 16 holds up the wafer 17;

s3, the robot 19 picks up the wafer 17 already in the lifted state and passes through the wafer transfer port 13 of the semiconductor process chamber, and transfers the wafer 17 to the outside of the semiconductor process chamber;

s4, the manipulator 19 picks up the alloy disk and passes through the wafer transferring port 13 of the semiconductor process chamber to transfer the alloy disk into the semiconductor process chamber; the thimble assembly falls back and the alloy disc is positioned on the base 16;

s5, the thimble assembly jacks up the alloy disc to drive the inner protection ring 11 to rise so as to separate the inner protection ring 11 from the outer protection ring 12;

and S6, the manipulator 19 picks up the alloy disk and the inner protection ring 11 respectively and transmits the alloy disk and the inner protection ring 11 to the outside of the semiconductor process chamber through the wafer transferring port 13 of the semiconductor process chamber.

As shown in fig. 1 to 4, in the wafer edge protection method provided in this embodiment, the robot 19 picks up the wafer 17 in the process chamber and transmits the wafer to the outside of the semiconductor process chamber through the wafer transferring port 13 of the semiconductor process chamber, and then picks up the alloy disk and transmits the alloy disk into the semiconductor process chamber through the wafer transferring port 13 of the semiconductor process chamber, so as to lift up the alloy disk by the ejector pin assembly, so that the inner protection ring 11 is separated from the outer protection ring 12, and thus the robot 19 picks up the alloy disk and the inner protection ring 11 and transmits the alloy disk and the inner protection ring 11 to the outside of the semiconductor process chamber through the wafer transferring port 13 of the semiconductor process chamber, so that the wafer edge protection apparatus can be adjusted at any time without opening the semiconductor process chamber, thereby facilitating the switching of different semiconductor processing processes and improving the productivity. Moreover, the flow field of the process gas or the flow field of the plasma in the semiconductor process chamber can be changed by changing the inner protection rings with different structures at any time, and the electric field in the semiconductor process chamber can be changed by changing the inner protection rings with different materials at any time, so that the uniformity of the semiconductor processing process is improved, and the problem that the edge of the wafer generates angle inclination in the semiconductor processing process is solved.

Optionally, the wafer transfer port 13 is opened in a peripheral wall 15 of the semiconductor process chamber. The thimble assembly comprises a plurality of thimbles 20, the thimbles 20 are arranged at intervals along the circumferential direction of the base 16, the diameter of the circumference where the thimbles 20 are located is smaller than that of a wafer 17 arranged on the base 16, and the alloy disc and the wafer 17 have the same size and specification, so that the wafer 17 and the alloy disc can be jacked by the thimbles 20, the alloy disc is jacked by the thimbles 20 and is propped against the lower surface of the inner protection ring 11 by the alloy disc, and the inner protection ring 11 is jacked so as to separate the inner protection ring 11 from the outer protection ring 12.

Specifically, in the process of transferring the inner protection ring 11 into the semiconductor process chamber, the inner protection ring 11 is firstly placed on the alloy disc outside the semiconductor process chamber to pick up the alloy disc and the inner protection ring 11 by the robot 19 to be transferred into the semiconductor process chamber from the wafer transfer port 13, then the outer protection ring 12 is lifted by the lifting mechanism to lift the inner protection ring 11 from the robot 19, finally the robot 19 is withdrawn from the wafer transfer port 13 to the outside of the semiconductor process chamber, in the process of taking out the inner protection ring 11 from the semiconductor process chamber, the lifting mechanism lifts the outer protection ring 12 and drives the inner protection ring 11 to be lifted synchronously by the outer protection ring 12, then the plurality of ejector pins 20 lift the wafer 17, the robot 19 enters the semiconductor process chamber, picks up the wafer 17 which is already in the lifted state and passes through the wafer transfer port 13 to transfer the wafer 17 to the outside of the semiconductor process chamber, the alloy disc is picked up by the manipulator 19 and penetrates through the wafer transferring port 13, the alloy disc is transferred into the semiconductor process chamber and moves to the position below the inner protection ring 11, then the ejector pins 20 fall back to enable the alloy disc to fall on the base 16, then the ejector pins 20 lift the alloy disc to drive the inner protection ring 11 to rise so as to enable the inner protection ring 11 to be separated from the outer protection ring 12, and finally the manipulator 19 picks up the alloy disc and the inner protection ring 11 and penetrates through the wafer transferring port 13 to transfer the alloy disc and the inner protection ring 11 to the outside of the semiconductor process chamber.

In the process of taking the inner protection ring 11 out of the semiconductor process chamber, the inner protection ring 11 is supported by the alloy disk, so that the wafer 17 is prevented from being damaged by the pressure of the inner protection ring 11 and causing pollution in the semiconductor process chamber because the inner protection ring 11 is directly supported by the wafer 17.

Optionally, the alloy disc may be made of an aluminum alloy material, so as to prevent metals, such as iron (Fe), copper (Cu), nickel (Ni), and the like, which may cause metal contamination to the semiconductor processing process from entering the semiconductor processing chamber.

Preferably, the alloy disc can be made of an aluminum alloy material with the trade name of 6061.

As another technical solution, an embodiment of the present invention further provides a semiconductor apparatus, and the semiconductor apparatus employs the semiconductor process chamber provided in the embodiment of the present invention.

The semiconductor equipment provided by the invention can facilitate the switching of different semiconductor processing technologies by virtue of the semiconductor process chamber provided by the invention, improve the productivity, improve the uniformity of the semiconductor processing technology and solve the problem that the edge of a wafer generates an angle inclination in the semiconductor processing technology.

In summary, the semiconductor process chamber, the wafer edge protection method and the semiconductor device provided by the invention can facilitate switching of different semiconductor processing processes, improve the productivity, improve the uniformity of the semiconductor processing process, and improve the problem that the edge of the wafer 17 is inclined at an angle in the semiconductor processing process.

It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.