阅读说明：本技术 一种高电压脉冲发生电路 (High-voltage pulse generating circuit ) 是由 吴淑群 顾亚楠 卞伟杰 张兴 张潮海 于 2020-04-01 设计创作，主要内容包括：本发明公开了一种高电压脉冲发生电路,包括直流稳压电源、限流电阻、高压容比脉冲调制电路、驱动模块、控制模块和负载。直流稳压电源后接限流电阻给高压容比脉冲调制电路供电,高压容比脉冲调制电路产生脉冲加至负载,控制模块产生控制信号经由驱动模块放大分别接至高压容比脉冲调制电路中相应的固态开关上。本发明通过拓扑与固态开关时序之间的相互配合,实现循环阶梯式倍压充放电,在保证高的升压能力的同时大大减少了器件数量,体积小、重量轻、参数可调,且具有一定的抗干扰能力。(The invention discloses a high-voltage pulse generating circuit which comprises a direct-current stabilized power supply, a current-limiting resistor, a high-voltage-to-capacity ratio pulse modulation circuit, a driving module, a control module and a load. The direct current stabilized voltage supply is connected with a current-limiting resistor behind and supplies power to the high-voltage capacitance ratio pulse modulation circuit, the high-voltage capacitance ratio pulse modulation circuit generates pulses to be added to a load, and the control module generates control signals which are amplified by the driving module and respectively connected to corresponding solid-state switches in the high-voltage capacitance ratio pulse modulation circuit. The invention realizes the cyclic stepped voltage-multiplying charging and discharging through the mutual matching of the topology and the solid-state switch time sequence, greatly reduces the number of devices while ensuring high boosting capacity, has small volume, light weight and adjustable parameters, and has certain anti-interference capacity.)

1. A high voltage pulse generating circuit, characterized by: the device comprises a direct current stabilized power supply, a current-limiting resistor, a high-voltage capacitance ratio pulse modulation circuit, a driving module, a control module and a load; the output end of the direct current stabilized power supply is electrically connected with the input end of the high-voltage capacity ratio pulse modulation circuit through a current-limiting resistor, and the output end of the high-voltage capacity ratio pulse modulation circuit is electrically connected with a load; the high-voltage capacitance ratio pulse modulation circuit is of a cascade structure and comprises zeroth to tenth solid-state switches, first to fifth diodes and first to fifth energy storage capacitors; the first energy storage capacitor forms a first-stage energy storage branch of the high-voltage capacitance ratio pulse modulation circuit, the anode of the first energy storage capacitor and the cathode of the fifth diode are respectively and electrically connected with the current-limiting resistor through the zeroth solid-state switch, and the cathode of the first energy storage capacitor and the anode of the fifth diode are respectively and electrically connected with the grounding end of the direct-current stabilized power supply; the second energy storage branch of the high-voltage-to-capacitance ratio pulse modulation circuit is formed by the second energy storage capacitor, the first diode, the first solid-state switch and the second solid-state switch, the cathode of the first diode is electrically connected with the anode of the second energy storage capacitor, the anode of the first diode is electrically connected with the cathode of the second energy storage capacitor through the first solid-state switch, the cathode of the second energy storage capacitor is electrically connected with the first end of the second solid-state switch, and the second end of the second solid-state switch is electrically connected with the grounding end of the direct-current stabilized power supply; the third energy storage capacitor, the second diode, the third solid-state switch and the sixth solid-state switch form a third-stage energy storage branch circuit of the high-voltage capacitance ratio pulse modulation circuit, the cathode of the second diode is electrically connected with the anode of the third energy storage capacitor, the anode of the second diode is electrically connected with the cathode of the third energy storage diode through the third solid-state switch, the cathode of the third energy storage diode is electrically connected with the first end of the sixth solid-state switch, and the second end of the sixth solid-state switch is electrically connected with the second end of the second solid-state switch through the fourth solid-state switch; the fourth energy storage capacitor, the third diode, the fifth solid-state switch and the tenth solid-state switch form a fourth stage energy storage branch of the high-voltage capacitance ratio pulse modulation circuit, the cathode of the third diode is electrically connected with the anode of the fourth energy storage capacitor, the anode of the third diode is electrically connected with the cathode of the fourth energy storage capacitor through the fifth solid-state switch, the cathode of the fourth energy storage capacitor is electrically connected with the first end of the tenth solid-state switch, the second end of the tenth solid-state switch is electrically connected with the second end of the sixth solid-state switch, and the anode of the third diode is electrically connected with the cathode of the second diode; the fifth energy storage capacitor, the fourth diode and the seventh solid-state switch form a fifth-stage energy storage branch of the high-voltage-to-capacitance-ratio pulse modulation circuit, the cathode of the fourth diode is electrically connected with the anode of the fifth energy storage capacitor, the anode of the fourth diode is electrically connected with the cathode of the fifth energy storage capacitor through the seventh solid-state switch, the cathode of the fifth energy storage capacitor is connected with the first end of the eighth solid-state switch, the second end of the eighth solid-state switch is electrically connected with the second end of the tenth solid-state switch, the anode of the fourth diode is electrically connected with the cathode of the third diode, and the cathode of the fourth diode is electrically connected with a load through the ninth solid-state switch; the output end of the control module is electrically connected with the control ends of the zeroth solid-state switch, the tenth solid-state switch and the zeroth solid-state switch through the driving module, the high-voltage capacitance ratio pulse modulation circuit is charged and discharged by controlling the conduction states of different solid-state switches, and high-voltage pulse output with certain repetition frequency is formed by repeating the charging/discharging states.

2. The high voltage pulse generating circuit according to claim 1, wherein: the charging state of the high-voltage capacitance ratio pulse modulation circuit comprises the following 8 ordered modes:

① turning on the zeroth, second, fourth, sixth, eighth and tenth solid-state switches, turning off the other solid-state switches, and charging the first to fifth energy-storage capacitors by the DC stabilized voltage supply;

② the first, fourth, sixth, eighth and tenth solid state switches are closed, the other solid state switches are opened, the first and second energy storage capacitors are connected in series to charge the third, fourth and fifth energy storage capacitors together;

③ closing the zeroth and second solid-state switches, disconnecting the other solid-state switches, and charging the first and second energy-storage capacitors by the DC stabilized voltage supply;

④ closing the first, third, fourth, eighth and tenth solid state switches, disconnecting the other solid state switches, connecting the first, second and third energy storage capacitors in series, and charging the fourth and fifth energy storage capacitors together;

⑤ closing the zeroth and second solid-state switches, disconnecting the other solid-state switches, and charging the first and second energy-storage capacitors by the DC stabilized voltage supply;

⑥ the first, the fourth and the sixth solid state switches are closed, the other solid state switches are opened, the first and the second energy storage capacitors are connected in series to charge the third energy storage capacitor together;

⑦ closing the zeroth and second solid-state switches, disconnecting the other solid-state switches, and charging the first and second energy-storage capacitors by the DC stabilized voltage supply;

⑧ the first, third, fourth, fifth and eighth solid state switches are closed, the other solid state switches are opened, the first, second, third and fourth energy storage capacitors are connected in series to charge the fifth energy storage capacitor;

the discharge state of the high-voltage capacity ratio pulse modulation circuit is as follows:

and the first, third, fifth, seventh and ninth solid-state switches are closed, the other solid-state switches are opened, and the first to fifth energy storage capacitors are connected in series to discharge for the load together.

3. The high voltage pulse generating circuit according to claim 1, wherein: when the ratio of the voltage on the first to fifth energy storage capacitors to the output voltage of the direct-current stabilized power supply is 1: 1: 2: 4: and 8, the corresponding energy storage capacitor is fully charged, and the high-voltage capacity ratio pulse modulation circuit can maximally lift the output voltage of the direct-current stabilized voltage power supply by 16 times.

4. The high voltage pulse generating circuit according to claim 3, wherein: the first to fifth energy storage capacitors adopt non-inductive absorption capacitors, the stray inductance value of the capacitors is less than 20nH, and the capacitance value is more than 1 mu F; the capacitance value relations of the first to fifth energy storage capacitors are as follows:

64C₁＝64C₂＝16C₃＝4C₄＝C₅

wherein, C₁～C₅Is the capacitance value of the first to fifth energy storage capacitors.

5. The high voltage pulse generating circuit according to claim 1, wherein: the zeroth to tenth solid-state switches adopt full-control devices, the rising edge time and the falling edge time of the full-control devices are less than 1 mu s, the switching delay time is less than 600ns, the withstand voltage value is more than 1.5 times of half of the maximum value of the required pulse voltage, and the current resistance value is more than twice of the measured value.

6. The high voltage pulse generating circuit according to claim 1, wherein: the control module has at least 11 control signal output capabilities, and the processing speed of a chip in the control module is above 72 MHz.

7. The high voltage pulse generating circuit according to claim 1, wherein: the maximum direct current voltage output by the direct current stabilized power supply is greater than 1/16 of the maximum value of the required pulse voltage.

8. The high voltage pulse generating circuit according to claim 1, wherein: the current limiting resistor is a power resistor.

9. The high voltage pulse generating circuit according to claim 1, wherein: the driving module can process the control signal output by the control module into a driving signal with more than +15V, and the delay between the driving signal and the control signal is controlled within 400 ns.

10. The high voltage pulse generating circuit according to claim 1, wherein: the load is a resistive load, a capacitive load or a resistance-capacitance load, the equivalent resistance value of the resistive load is more than 100 omega, and the equivalent capacitance value of the capacitive load is more than 1.6 nF.

Technical Field

The invention belongs to the field of pulse power supplies, and particularly relates to a high-voltage pulse generating circuit.

Background

The pulse power is a mode of applying stored energy to a load in the form of electric energy in a single pulse or short pulse mode with repetition frequency, and has wide application in industries of sewage treatment, surface modification, ozone generation, plant growth promotion and the like. Any device suitable for energy storage in a pulsed power system should meet the requirements of high energy density, high compressive strength, long energy storage time, high repetition rate, long service life, low cost, etc. Although high voltage capacitors have no advantage in energy density, the advantages of stable and widespread switching, long energy retention time, etc. are always the main energy storage devices of most pulse power systems.

The traditional high-power pulse power supply mainly outputs pulses based on a gas switch, but the application requirements of the modern industry on long service life, high efficiency and small volume are difficult to meet because of the problems of low repetition frequency, short service life, large volume and the like of the gas switch. With the development of semiconductor devices, pulse generation topologies based on solid-state switching devices are continuously updated, wherein solid-state Marx generators and pulse superimposers based on transformers become the main development direction of pulse power supplies.

Although the pulse power supply based on the solid-state Marx provided in the thesis of nanosecond high-voltage pulse power supply design based on the Marx circuit has the advantages of compact structure, stable performance and long service life, the boost multiple of the whole topology is in direct proportion to the number of energy storage units, and the boost multiple is as follows: the number of the energy storage capacitors is 1:1 (pressure-to-volume ratio). If the input voltage is raised to a higher multiple output, the volume, the weight and the cost of the power supply are increased linearly along with the increase of the cascade number of the energy storage capacitors. Therefore, on the premise of ensuring the requirements of small volume and light weight of the pulse power supply, how to realize higher voltage multiple output by using fewer energy storage elements is a key technical problem and is of great importance for reducing the economic cost of the pulse power supply.

Disclosure of Invention

In order to solve the technical problems mentioned in the background art, the present invention provides a high voltage pulse generating circuit.

In order to achieve the technical purpose, the technical scheme of the invention is as follows:

a high-voltage pulse generating circuit comprises a direct-current stabilized power supply, a current-limiting resistor, a high-voltage capacitance ratio pulse modulation circuit, a driving module, a control module and a load; the output end of the direct current stabilized power supply is electrically connected with the input end of the high-voltage capacity ratio pulse modulation circuit through a current-limiting resistor, and the output end of the high-voltage capacity ratio pulse modulation circuit is electrically connected with a load; the high-voltage capacitance ratio pulse modulation circuit is of a cascade structure and comprises zeroth to tenth solid-state switches, first to fifth diodes and first to fifth energy storage capacitors; the first energy storage capacitor forms a first-stage energy storage branch of the high-voltage capacitance ratio pulse modulation circuit, the anode of the first energy storage capacitor and the cathode of the fifth diode are respectively and electrically connected with the current-limiting resistor through the zeroth solid-state switch, and the cathode of the first energy storage capacitor and the anode of the fifth diode are respectively and electrically connected with the grounding end of the direct-current stabilized power supply; the second energy storage branch of the high-voltage-to-capacitance ratio pulse modulation circuit is formed by the second energy storage capacitor, the first diode, the first solid-state switch and the second solid-state switch, the cathode of the first diode is electrically connected with the anode of the second energy storage capacitor, the anode of the first diode is electrically connected with the cathode of the second energy storage capacitor through the first solid-state switch, the cathode of the second energy storage capacitor is electrically connected with the first end of the second solid-state switch, and the second end of the second solid-state switch is electrically connected with the grounding end of the direct-current stabilized power supply; the third energy storage capacitor, the second diode, the third solid-state switch and the sixth solid-state switch form a third-stage energy storage branch circuit of the high-voltage capacitance ratio pulse modulation circuit, the cathode of the second diode is electrically connected with the anode of the third energy storage capacitor, the anode of the second diode is electrically connected with the cathode of the third energy storage diode through the third solid-state switch, the cathode of the third energy storage diode is electrically connected with the first end of the sixth solid-state switch, and the second end of the sixth solid-state switch is electrically connected with the second end of the second solid-state switch through the fourth solid-state switch; the fourth energy storage capacitor, the third diode, the fifth solid-state switch and the tenth solid-state switch form a fourth stage energy storage branch of the high-voltage capacitance ratio pulse modulation circuit, the cathode of the third diode is electrically connected with the anode of the fourth energy storage capacitor, the anode of the third diode is electrically connected with the cathode of the fourth energy storage capacitor through the fifth solid-state switch, the cathode of the fourth energy storage capacitor is electrically connected with the first end of the tenth solid-state switch, the second end of the tenth solid-state switch is electrically connected with the second end of the sixth solid-state switch, and the anode of the third diode is electrically connected with the cathode of the second diode; the fifth energy storage capacitor, the fourth diode and the seventh solid-state switch form a fifth-stage energy storage branch of the high-voltage-to-capacitance-ratio pulse modulation circuit, the cathode of the fourth diode is electrically connected with the anode of the fifth energy storage capacitor, the anode of the fourth diode is electrically connected with the cathode of the fifth energy storage capacitor through the seventh solid-state switch, the cathode of the fifth energy storage capacitor is connected with the first end of the eighth solid-state switch, the second end of the eighth solid-state switch is electrically connected with the second end of the tenth solid-state switch, the anode of the fourth diode is electrically connected with the cathode of the third diode, and the cathode of the fourth diode is electrically connected with a load through the ninth solid-state switch; the output end of the control module is electrically connected with the control ends of the zeroth solid-state switch, the tenth solid-state switch and the zeroth solid-state switch through the driving module, the high-voltage capacitance ratio pulse modulation circuit is charged and discharged by controlling the conduction states of different solid-state switches, and high-voltage pulse output with certain repetition frequency is formed by repeating the charging/discharging states.

Further, the charge state of the high-voltage-to-capacity ratio pulse modulation circuit comprises the following 8 ordered modes:

① turning on the zeroth, second, fourth, sixth, eighth and tenth solid-state switches, turning off the other solid-state switches, and charging the first to fifth energy-storage capacitors by the DC stabilized voltage supply;

② the first, fourth, sixth, eighth and tenth solid state switches are closed, the other solid state switches are opened, the first and second energy storage capacitors are connected in series to charge the third, fourth and fifth energy storage capacitors together;

③ closing the zeroth and second solid-state switches, disconnecting the other solid-state switches, and charging the first and second energy-storage capacitors by the DC stabilized voltage supply;

④ closing the first, third, fourth, eighth and tenth solid state switches, disconnecting the other solid state switches, connecting the first, second and third energy storage capacitors in series, and charging the fourth and fifth energy storage capacitors together;

⑤ closing the zeroth and second solid-state switches, disconnecting the other solid-state switches, and charging the first and second energy-storage capacitors by the DC stabilized voltage supply;

⑥ the first, the fourth and the sixth solid state switches are closed, the other solid state switches are opened, the first and the second energy storage capacitors are connected in series to charge the third energy storage capacitor together;

⑦ closing the zeroth and second solid-state switches, disconnecting the other solid-state switches, and charging the first and second energy-storage capacitors by the DC stabilized voltage supply;

⑧ the first, third, fourth, fifth and eighth solid state switches are closed, the other solid state switches are opened, the first, second, third and fourth energy storage capacitors are connected in series to charge the fifth energy storage capacitor;

the discharge state of the high-voltage capacity ratio pulse modulation circuit is as follows:

and the first, third, fifth, seventh and ninth solid-state switches are closed, the other solid-state switches are opened, and the first to fifth energy storage capacitors are connected in series to discharge for the load together.

Further, when the ratio of the voltage on the first to fifth energy storage capacitors to the output voltage of the direct current stabilized power supply is 1: 1: 2: 4: and 8, the corresponding energy storage capacitor is fully charged, and the high-voltage capacity ratio pulse modulation circuit can maximally lift the output voltage of the direct-current stabilized voltage power supply by 16 times.

Furthermore, the first to fifth energy storage capacitors adopt non-inductive absorption capacitors, the stray inductance value of the capacitors is less than 20nH, and the capacitance value is more than 1 muF; the capacitance value relations of the first to fifth energy storage capacitors are as follows:

64C₁＝64C₂＝16C₃＝4C₄＝C₅

wherein, C₁～C₅Is the capacitance value of the first to fifth energy storage capacitors.

Furthermore, the zeroth to tenth solid-state switches adopt full-control devices, the rising edge time and the falling edge time of the full-control devices are less than 1 mu s, the switching delay time is less than 600ns, the withstand voltage value is more than 1.5 times of half of the maximum value of the required pulse voltage, and the current withstand value is more than twice of the measured value.

Furthermore, the control module has at least 11 control signal output capabilities, and the processing speed of a chip in the control module is above 72 MHz.

Further, the maximum direct current voltage output by the direct current stabilized power supply is greater than 1/16 of the maximum value of the required pulse voltage.

Furthermore, the current limiting resistor is a power resistor.

Further, the driving module can process the control signal output by the control module into a driving signal with a voltage of at least +15V or more, and control the delay between the driving signal and the control signal within 400 ns.

Further, the load is a resistive load, a capacitive load or a resistance-capacitance load, the equivalent resistance value of the resistive load is more than 100 Ω, and the equivalent capacitance value of the capacitive load is more than 1.6 nF.

Adopt the beneficial effect that above-mentioned technical scheme brought:

(1) according to the invention, 5 energy storage capacitors are adopted, the input voltage can be raised to 16 times and output, and compared with the traditional MARX topology with the same boosting capacity, the pulse power supply has fewer energy storage devices and higher boosting multiple, so that the whole volume of the pulse power supply is smaller and more compact;

(2) the switches involved in the invention all adopt all-solid-state switch devices, have small volume, good stability, high reliability, long service life and high working frequency, and can effectively inhibit external electromagnetic interference;

(3) the invention has the advantages that the charging is carried out firstly, then the discharging is carried out, and the charging and discharging states are separated, so that the potential problems of insufficient pulse energy, short circuit and the like caused by mode coincidence and disorder are effectively avoided.

Drawings

FIG. 1 is an overall block diagram of the present invention;

FIG. 2 is a high voltage to capacity ratio pulse modulation circuit topology of the present invention;

FIG. 3 is a logic diagram of the control signals of the present invention;

FIG. 4 is a waveform diagram across a load in an embodiment of the present invention;

description of reference numerals: 1: a DC power supply; 2: a current limiting resistor; 3: a high voltage to capacitance ratio pulse modulation circuit; 4: a drive module; 5: a control module; 6: a load; S0-S10: zeroth to tenth solid state switches; D1-D5: first to fifth diodes; C1-C5: first to fifth energy storage capacitors.

Detailed Description

The technical scheme of the invention is explained in detail in the following with the accompanying drawings.

As shown in fig. 1, the present invention designs a high voltage pulse generating circuit, which includes a dc regulated power supply 1, a current limiting resistor 2, a high voltage-to-capacitance ratio pulse modulation circuit 3, a driving module 4, a control module 5, and a load 6. The direct current stabilized voltage supply is connected with a current-limiting resistor behind and supplies power to the high-voltage capacitance ratio pulse modulation circuit, the high-voltage capacitance ratio pulse modulation circuit generates pulses to be added to a load, and the control module generates control signals which are amplified by the driving module and respectively connected to corresponding solid-state switches in the high-voltage capacitance ratio pulse modulation circuit.

As shown in fig. 2, the high-voltage capacitance ratio pulse modulation circuit is a cascade structure and includes zeroth to tenth solid-state switches S0 to S10, first to fifth diodes D1 to D5, and first to fifth energy storage capacitors C1 to C5. The first energy storage capacitor forms a first-stage energy storage branch of the high-voltage capacitance ratio pulse modulation circuit, the anode of the first energy storage capacitor and the cathode of the fifth diode are respectively and electrically connected with the current-limiting resistor through the zeroth solid-state switch, and the cathode of the first energy storage capacitor and the anode of the fifth diode are respectively and electrically connected with the grounding end of the direct-current stabilized power supply; the second energy storage branch of the high-voltage-to-capacitance ratio pulse modulation circuit is formed by the second energy storage capacitor, the first diode, the first solid-state switch and the second solid-state switch, the cathode of the first diode is electrically connected with the anode of the second energy storage capacitor, the anode of the first diode is electrically connected with the cathode of the second energy storage capacitor through the first solid-state switch, the cathode of the second energy storage capacitor is electrically connected with the first end of the second solid-state switch, and the second end of the second solid-state switch is electrically connected with the grounding end of the direct-current stabilized power supply; the third energy storage capacitor, the second diode, the third solid-state switch and the sixth solid-state switch form a third-stage energy storage branch circuit of the high-voltage capacitance ratio pulse modulation circuit, the cathode of the second diode is electrically connected with the anode of the third energy storage capacitor, the anode of the second diode is electrically connected with the cathode of the third energy storage diode through the third solid-state switch, the cathode of the third energy storage diode is electrically connected with the first end of the sixth solid-state switch, and the second end of the sixth solid-state switch is electrically connected with the second end of the second solid-state switch through the fourth solid-state switch; the fourth energy storage capacitor, the third diode, the fifth solid-state switch and the tenth solid-state switch form a fourth stage energy storage branch of the high-voltage capacitance ratio pulse modulation circuit, the cathode of the third diode is electrically connected with the anode of the fourth energy storage capacitor, the anode of the third diode is electrically connected with the cathode of the fourth energy storage capacitor through the fifth solid-state switch, the cathode of the fourth energy storage capacitor is electrically connected with the first end of the tenth solid-state switch, the second end of the tenth solid-state switch is electrically connected with the second end of the sixth solid-state switch, and the anode of the third diode is electrically connected with the cathode of the second diode; the fifth energy storage capacitor, the fourth diode and the seventh solid-state switch form a fifth-stage energy storage branch of the high-voltage-to-capacitance-ratio pulse modulation circuit, the cathode of the fourth diode is electrically connected with the anode of the fifth energy storage capacitor, the anode of the fourth diode is electrically connected with the cathode of the fifth energy storage capacitor through the seventh solid-state switch, the cathode of the fifth energy storage capacitor is connected with the first end of the eighth solid-state switch, the second end of the eighth solid-state switch is electrically connected with the second end of the tenth solid-state switch, the anode of the fourth diode is electrically connected with the cathode of the third diode, and the cathode of the fourth diode is electrically connected with a load through the ninth solid-state switch; the output end of the control module is electrically connected with the control ends of the zeroth solid-state switch, the tenth solid-state switch and the zeroth solid-state switch through the driving module, the high-voltage capacitance ratio pulse modulation circuit is charged and discharged by controlling the conduction states of different solid-state switches, and high-voltage pulse output with certain repetition frequency is formed by repeating the charging/discharging states.

As shown in fig. 3, Tc is the period of the control signal, and the control module generates 11 control signals, including a charging state and a discharging state, where the charging state includes the following 8 ordered modes:

① turning on the zeroth, second, fourth, sixth, eighth and tenth solid-state switches, turning off the other solid-state switches, and charging the first to fifth energy-storage capacitors by the DC stabilized voltage supply;

② the first, fourth, sixth, eighth and tenth solid state switches are closed, the other solid state switches are opened, the first and second energy storage capacitors are connected in series to charge the third, fourth and fifth energy storage capacitors together;

③ closing the zeroth and second solid-state switches, disconnecting the other solid-state switches, and charging the first and second energy-storage capacitors by the DC stabilized voltage supply;

④ closing the first, third, fourth, eighth and tenth solid state switches, disconnecting the other solid state switches, connecting the first, second and third energy storage capacitors in series, and charging the fourth and fifth energy storage capacitors together;

⑤ closing the zeroth and second solid-state switches, disconnecting the other solid-state switches, and charging the first and second energy-storage capacitors by the DC stabilized voltage supply;

⑥ the first, the fourth and the sixth solid state switches are closed, the other solid state switches are opened, the first and the second energy storage capacitors are connected in series to charge the third energy storage capacitor together;

⑦ closing the zeroth and second solid-state switches, disconnecting the other solid-state switches, and charging the first and second energy-storage capacitors by the DC stabilized voltage supply;

⑧ the first, third, fourth, fifth and eighth solid state switches are closed, the other solid state switches are opened, the first, second, third and fourth energy storage capacitors are connected in series to charge the fifth energy storage capacitor;

the discharge state is as follows:

and the first, third, fifth, seventh and ninth solid-state switches are closed, the other solid-state switches are opened, and the first to fifth energy storage capacitors are connected in series to discharge for the load together.

In this embodiment, when the ratio of the voltage on the first to fifth energy storage capacitors to the output voltage of the dc regulated power supply is 1: 1: 2: 4: and 8, the corresponding energy storage capacitor is fully charged, and the high-voltage capacity ratio pulse modulation circuit can maximally lift the output voltage of the direct-current stabilized voltage power supply by 16 times.

In this embodiment, preferably, the first to fifth energy storage capacitors are non-inductive absorption capacitors, and have a stray inductance smaller than 20nH and a capacitance larger than 1 μ F. The energy storage values of the first to fifth energy storage capacitors are as follows:

wherein E is_i、C_i、U_iAre respectively provided withThe storage value, the capacitance value and the full charge voltage value of the ith energy storage capacitor are obtained;

according to E₁＝E₂＝E₃＝E₄＝E₅，8U₁＝8U₂＝4U₃＝2U₄＝U₅，

Then there is 64C₁＝64C₂＝16C₃＝4C₄＝C₅。

In this embodiment, it is preferable that the zeroth to tenth solid-state switches are fully-controlled devices, such as IGBTs and MOSFETs, and have a rising edge time and a falling edge time of less than 1 μ s, a switching delay time of less than 600ns, a withstand voltage value of 1.5 times or more of a half of a maximum value of a desired pulse voltage, and a current withstand value of two times or more of an actual measurement value.

In this embodiment, preferably, the control module has at least 11 control signal output capabilities, and the processing speed of the chip in the control module is above 72 MHz.

In this embodiment, the dc regulated power supply can preferably provide a wide-range and low-ripple dc adjustable voltage, and the maximum dc voltage output by the dc regulated power supply is greater than 1/16 of the maximum value of the required pulse voltage.

In this embodiment, preferably, the current-limiting resistor should be a power resistor, the specific parameters should be combined with circuit requirements, and the model selection is performed with a threshold amount left, and the power should be at least greater than the power supply voltage of the dc regulator multiplied by the charging current.

In this embodiment, preferably, the driving module is capable of processing the control signal output by the control module into a driving signal of at least +15V or more, and controlling the delay between the driving signal and the control signal within 400 ns.

In this embodiment, preferably, the load is a resistive load, a capacitive load, or a resistive-capacitive load, an equivalent resistance value of the resistive load is greater than 100 Ω, and an equivalent capacitance value of the capacitive load is greater than 1.6 nF.

In this embodiment, when the dc regulated power supply inputs 60V, the first energy storage capacitor and the second energy storage capacitor are respectively charged to 60V, the third energy storage capacitor is charged to 120V, the fourth energy storage capacitor is charged to 240V, the fifth energy storage capacitor is charged to 480V, when a signal to be discharged is transmitted, the first to fifth energy storage capacitors are connected in series to discharge a load, the pulse voltage at two ends of the load measured by using the high-voltage probe is 0 to 1000V adjustable, the rising edge and the falling edge are within 200ns, the repetition frequency is 1 to 100Hz adjustable, the pulse width is 1 to 10 μ s adjustable, and the single pulse waveform is as shown in fig. 4.

In the description of the present embodiment, it should be noted that, unless otherwise explicitly specified or limited, the terms "connected," "connected," and "connected" should be understood as electrically connected, and the specific meaning of the terms in the present invention can be specifically understood by those skilled in the art.