阅读说明：本技术 一种电荷放大器的复位电路及复位时间获取方法 (Reset circuit of charge amplifier and reset time acquisition method ) 是由 高益 于 2020-06-02 设计创作，主要内容包括：本发明公开了一种电荷放大器的复位电路及复位时间获取方法,将复位期间的电荷放大器的复位电路拆分为两个或者多个子电路,对各个子电路进行独立的复位操作,因为拆分后各个子电路的RC时间常数明显比总复位电路的时间常数要小,因此复位所需要的时间也比较短；因为复位时间是扫描时间的重要组成部分,因此扫描时间也会变短,触摸驱动系统的报点率会提高。(The invention discloses a reset circuit of a charge amplifier and a reset time acquisition method, wherein the reset circuit of the charge amplifier during reset is divided into two or more sub-circuits, and each sub-circuit is subjected to independent reset operation; since the reset time is an important component of the scan time, the scan time is also shortened, and the hit rate of the touch driving system is increased.)

1. A reset time obtaining method of a reset circuit of a charge amplifier is characterized by comprising the following steps:

s1: splitting a reset circuit of the charge amplifier into at least two sub-circuits during a reset period of the charge amplifier;

s2: realizing independent reset for each sub-circuit and obtaining the reset time of each sub-circuit;

s3: comparing the reset time of each sub-circuit, the reset time of the reset circuit of the whole charge amplifier is equal to the maximum value of the reset time of all sub-circuits.

2. A reset circuit for a charge amplifier using the method of claim 1, comprising a reset circuit body that is split into at least two separate sub-circuits during reset of the charge amplifier.

3. The reset circuit of a charge amplifier of claim 2, wherein the reset circuit body comprises:

a first sub-circuit comprising a screen model (1), the screen model (1) comprising an excitation electrode (TX) and an induction electrode (RX), the excitation electrode (TX) being connected to a TX driver;

a second sub-circuit, which comprises a first switch (S1), a feedback capacitor (Cf) and a first operational amplifier (OPA), wherein one end of the first switch (S1) connected with the feedback capacitor (Cf) in parallel is connected with the output end of the first operational amplifier (OPA), the other end of the first switch (S1) connected with the feedback capacitor (Cf) in parallel is connected with the inverting input end of the first operational amplifier (OPA), the non-inverting input end of the first operational amplifier (OPA) is connected with a reference Voltage (VREF), and the output end of the first operational amplifier (OPA) is connected with the output end (Vo) of the charge amplifier;

during the reset period of the charge amplifier, the whole reset circuit of the charge amplifier, which is composed of the first sub-circuit and the second sub-circuit, is split into two independent circuits, the reset time of the two sub-circuits is calculated respectively, and the reset time of the whole reset circuit is equal to the larger one of the reset time of the two sub-circuits.

4. The reset circuit of the charge amplifier according to claim 3, further comprising a second switch (S2) and a third switch (S3), wherein one end of the second switch (S2) is connected to the inverting input terminal of the first operational amplifier (OPA), the other end of the second switch (S2) is connected to the sensing electrode (RX), the other end of the second switch (S2) is further connected to one end of the third switch (S3), and the other end of the third switch (S3) is connected to the reference Voltage (VREF);

during the reset period of the charge amplifier, the second switch (S2) is in an open state, and the third switch (S3) is in a closed state, so that the whole charge amplifier reset circuit composed of the first sub-circuit and the second sub-circuit is divided into two independent circuits.

5. The reset circuit of a charge amplifier according to any one of claims 3 or 4, further comprising a voltage Buffer circuit (Buffer) for enhancing a driving capability of the reference Voltage (VREF), wherein one end of the voltage Buffer circuit (Buffer) is connected to the other end of the third switch (S3), and the other end of the voltage Buffer circuit (Buffer) is connected to the reference Voltage (VREF).

6. The reset circuit of charge amplifier as claimed in claim 5, wherein the voltage Buffer circuit (Buffer) is implemented by a second operational amplifier, the output terminal of the second operational amplifier is connected to the other terminal of the third switch (S3), the inverting input terminal of the second operational amplifier is connected to the other terminal of the third switch (S3), and the forward input terminal of the second operational amplifier is connected to the reference Voltage (VREF).

7. The reset circuit of charge amplifier according to any of claims 3 or 4, wherein the screen model (1) further comprises a mutual capacitance (Cs), one end of the excitation electrode (TX) is connected to one end of the mutual capacitance (Cs), the other end of the mutual capacitance (Cs) is connected to one end of the sense electrode (RX), the other end of the excitation electrode (TX) is connected to the TX driver, and the other end of the sense electrode (RX) is connected to the other end of the second switch (S2).

8. The reset circuit of charge amplifier as claimed in claim 7, wherein the pump electrode (TX) comprises a first line resistor (Rp 1), a second line resistor (Rp 2) and a first ground capacitor (Cp 1), the first line resistor (Rp 1) is connected to one end of the second line resistor (Rp 2), the second line resistor (Rp 2) is connected to one end of the mutual capacitor (Cs), the first line resistor (Rp 1) is connected to the driver, the first line resistor (Rp 1) is further connected to one end of the first ground capacitor (Cp 1), and the first ground capacitor (Cp 1) is grounded.

9. The reset circuit of charge amplifier as claimed in claim 7, wherein the sensing electrode (RX) comprises a third line resistor (Rp 3), a fourth line resistor (Rp 4) and a second ground capacitor (Cp 2), the third line resistor (Rp 3) is connected to one end of the fourth line resistor (Rp 4), the other end of the fourth line resistor (Rp 4) is connected to the other end of the second switch (S2), the other end of the third line resistor (Rp 3) is connected to the other end of the mutual capacitor (Cs), the one end of the third line resistor (Rp 3) is further connected to one end of the second ground capacitor (Cp 2), and the other end of the second ground capacitor (Cp 2) is grounded.

Technical Field

The present invention relates to the field of circuit technologies, and in particular, to a reset circuit of a charge amplifier and a reset time obtaining method.

Background

In recent years, with the rapid popularization of smart terminals (smart phones, smart tablets, and the like), touch screen control technology has rapidly developed. The touch screen senses the touch of the finger, converts a touch signal of the finger into a voltage signal, processes the voltage signal and then sends the voltage signal to the upper control system, and the upper control system calculates and identifies the action of the finger through an algorithm and makes corresponding feedback. At present, there are two main types of touch screens widely used: with the development of the technology, the capacitive screen is more and more dominant. In the capacitive screen system, the touch of a finger is a change in capacitance in terms of electrical characteristics, and the capacitance is a basic unit of a circuit for storing charges, so that sensing the touch of the finger is essentially sensing the change in charge and converting the change in charge into a change in voltage. A charge amplifier is a device, circuit or apparatus for converting a charge signal into a voltage signal, and is widely used in various sensors.

In the field of touch screen driving, the touch point reporting rate is a very important performance index, and the touch sensitivity of the touch screen is determined by the touch point reporting rate, so that the user experience is influenced. And the reporting rate depends on the time required to complete a scan of all the coordinate arrays of the touch screen. Since the charge amplifier needs to perform a reset operation once every scan cycle, the reset time, which is an important component of the above scan time, affects the hit rate of the touch screen driving system.

As shown in fig. 1, the TX driver is a driving signal sent by the driving chip to the TX electrode (excitation electrode) of the panel, and is usually a square wave with a frequency of 10KHz to 300KHz, and the inside of the dashed line frame is a simplified panel model, where Rp is a line resistance of the TX electrode or RX (induction electrode), Cp is a capacitance from Cp to ground, Cs is a mutual capacitance between the two electrodes, VREF is a reference voltage, OPA is an operational amplifier, Cf is a feedback capacitance, S1 is a reset switch, and Vo is an output of the charge amplifier.

Disclosure of Invention

The invention aims to provide a reset circuit of a charge amplifier and a reset time acquisition method, and aims to solve the problem of low report rate caused by overlarge RC time constant of a high-impedance screen body and an ultrathin screen body.

The technical scheme of the invention is as follows: a reset time obtaining method for a reset circuit of a charge amplifier specifically comprises the following steps:

s1: splitting a reset circuit of the charge amplifier into at least two sub-circuits during a reset period of the charge amplifier;

s2: realizing independent reset for each sub-circuit and obtaining the reset time of each sub-circuit;

s3: comparing the reset time of each sub-circuit, the reset time of the reset circuit of the whole charge amplifier is equal to the maximum value of the reset time of all sub-circuits.

In the technical scheme, the reset circuit of the whole charge amplifier can be split into 2, 3 or more sub-circuits, and then the independent reset operation is carried out on each sub-circuit, because the RC time constant of each sub-circuit after splitting is obviously smaller than the time constant of the total circuit, the time required by reset is also shorter.

A reset circuit for a charge amplifier using the method as described above, comprising a reset circuit body which is split into at least two separate sub-circuits during reset of the charge amplifier.

According to actual needs, different structures of the reset circuit of the charge amplifier can be adopted.

The reset circuit of the charge amplifier, wherein the reset circuit body comprises:

the first sub-circuit comprises a screen model, the screen model comprises an exciting electrode and an induction electrode, and the exciting electrode is connected with the induction electrode;

the second sub-circuit comprises a first switch, a feedback capacitor and a first operational amplifier, wherein one end of the first switch connected with the feedback capacitor in parallel is connected with the output end of the first operational amplifier, the other end of the first switch connected with the feedback capacitor in parallel is connected with the inverting input end of the first operational amplifier, the non-inverting input end of the first operational amplifier is connected with a reference voltage, and the output end of the first operational amplifier is connected with the output end of the charge amplifier;

during the reset period of the charge amplifier, the whole reset circuit of the charge amplifier, which is composed of the first sub-circuit and the second sub-circuit, is split into two independent circuits, the reset time of the two sub-circuits is calculated respectively, and the reset time of the whole reset circuit is equal to the larger one of the reset time of the two sub-circuits.

The whole charge amplifier reset circuit formed by the first sub-circuit and the second sub-circuit can be split into two independent circuits by various means, such as directly disconnecting a connecting wire between the first sub-circuit and the second sub-circuit, or arranging a resistor with enough resistance between the first sub-circuit and the second sub-circuit, so that a broken circuit is formed between the first sub-circuit and the second sub-circuit.

The reset circuit of the charge amplifier further comprises a second switch and a third switch, wherein one end of the second switch is connected with the inverting input end of the first operational amplifier, the other end of the second switch is connected with the induction electrode, the other end of the second switch is further connected with one end of the third switch, and the other end of the third switch is connected with the reference voltage;

during the reset period of the charge amplifier, the second switch is in an open state, and the third switch is in a closed state, so that the whole charge amplifier reset circuit formed by the first sub-circuit and the second sub-circuit is divided into two independent circuits.

In the technical scheme, the whole reset circuit is divided into two sub-circuits by arranging the second switch and the third switch, and the independent reset operation is carried out on each sub-circuit, because the RC time constant of each sub-circuit after the division is obviously smaller than the time constant of the whole reset circuit, the time required by the reset can be relatively shortened; the circuit is split by adopting the switch, so that the structure is simple and the operation is convenient.

The reset circuit of the charge amplifier, wherein the reset circuit of the charge amplifier further comprises a voltage buffer circuit for enhancing the driving capability of the reference voltage, one end of the voltage buffer circuit is connected with the other end of the third switch, and the other end of the voltage buffer circuit is connected with the reference voltage.

In this embodiment, the voltage buffer circuit can provide sufficient driving capability for the reference voltage during the reset period.

The reset circuit of the charge amplifier is characterized in that the voltage buffer circuit is realized by adopting a second operational amplifier, the output end of the second operational amplifier is connected with the other end of the third switch, the reverse input end of the second operational amplifier is connected with the other end of the third switch, and the forward input end of the second operational amplifier is connected with the reference voltage.

The reset circuit of the charge amplifier is characterized in that the screen model further comprises a mutual capacitor, one end of the exciting electrode is connected with one end of the mutual capacitor, the other end of the mutual capacitor is connected with one end of the sensing electrode, the other end of the exciting electrode is connected with the TXDrver, and the other end of the sensing electrode is connected with the other end of the second switch.

The reset circuit of the charge amplifier, wherein, the excitation electrode includes first line resistance, second line resistance and first ground capacitance, first line resistance one end is connected with second line resistance one end, the second line resistance other end is connected with mutual capacitance one end, the first line resistance other end with connect TX driver, first line resistance one end still with first ground capacitance one end is connected, first ground capacitance other end ground connection.

The reset circuit of charge amplifier, wherein, the response electrode includes third line resistance, fourth line resistance and second electric capacity ground, third line resistance one end is connected with fourth line resistance one end, and the fourth line resistance other end is connected with the other end of second switch, and the third line resistance other end is connected with the mutual capacitance other end, third line resistance one end still is connected with second electric capacity ground one end, second electric capacity ground connection other end.

The invention has the following advantages:

(1) the reset time of the reset circuit is shorter than that of the reset circuit in the prior art under the assumption that the Buffer bandwidth is the same as the bandwidth of the original amplifier OPA; since the reset time is an important component of the scan time, the scan time is also shortened, and the hit rate of the touch driving system is increased.

(2) In the case that the reset time and the scanning time are the same as those of the prior art, the bandwidth requirement of the main operational amplifier in the charge amplifier is lower than that of the prior art, and the lower bandwidth of the amplifier means higher output signal-to-noise ratio.

Drawings

Fig. 1 is a schematic diagram of a prior art charge amplifier circuit with a simplified screen model.

Fig. 2 is an equivalent circuit schematic of a charge amplifier during reset in the prior art.

FIG. 3 is a waveform diagram of nodes of a charge amplifier when the RC time constant of the screen is too large in the prior art.

Fig. 4 is a schematic diagram of the equivalent load of Vo during reset in the prior art.

Fig. 5 is a schematic diagram of the connection of the reset circuit of the charge amplifier in the present invention.

FIG. 6 is a schematic diagram of one of the sub-circuits during reset in the present invention.

FIG. 7 is another sub-circuit schematic during reset in the present invention.

Fig. 8 is a flowchart of steps of a reset time acquisition method of a reset circuit of a charge amplifier in the present invention.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.

As shown in fig. 8, the present invention discloses a method for obtaining a reset time of a reset circuit of a charge amplifier, which specifically includes the following steps:

s1: splitting a reset circuit of the charge amplifier into at least two sub-circuits during a reset period of the charge amplifier;

s2: realizing independent reset for each sub-circuit and obtaining the reset time of each sub-circuit;

s3: comparing the reset time of each sub-circuit, the reset time of the reset circuit of the whole charge amplifier is equal to the maximum value of the reset time of all sub-circuits.

A reset circuit for a charge amplifier using the method as described above, comprising a reset circuit body which is split into at least two separate sub-circuits during reset of the charge amplifier.

According to the reset time acquisition method and the reset circuit of the charge amplifier described above, the following embodiments are exemplified:

as shown in fig. 5, a reset circuit of a charge amplifier includes:

the screen body model 1 comprises a TX electrode (excitation electrode) and an RX electrode (induction electrode), wherein the TX electrode is connected with a TX driver;

the feedback circuit comprises a first switch S1, a feedback capacitor Cf and a first operational amplifier OPA, wherein one end of the first switch S1, which is connected with the feedback capacitor Cf in parallel, is connected with the output end of the first operational amplifier OPA, the other end of the first switch S1, which is connected with the feedback capacitor Cf in parallel, is connected with the inverting input end of the first operational amplifier OPA, the non-inverting input end of the first operational amplifier OPA is connected with a reference voltage VREF, and the output end of the first operational amplifier OPA is connected with the output end Vo of the charge amplifier;

a second switch S2 and a third switch S3, one end of the second switch S2 being connected to the inverting input terminal of the first operational amplifier OPA, the other end of the second switch S2 being connected to the RX electrode, the other end of the second switch S2 being further connected to one end of a third switch S3, the other end of the third switch S3 being connected to a reference voltage VREF;

in the reset period of the charge amplifier, the second switch S2 is in an open state, the third switch S3 is in a closed state, the entire reset circuit is divided into two sub-circuits with the second switch S2 and the third switch S3 as boundaries, the reset times of the two sub-circuits are calculated, and the larger of the reset times is the reset time of the charge amplifier.

Wherein, TX driver refers to a driving signal sent by the driving chip to the TX electrode of the screen body model 1.

In some embodiments, the reset circuit of the charge amplifier further includes a voltage Buffer circuit Buffer for enhancing a driving capability of the reference voltage VREF, one end of the voltage Buffer circuit Buffer is connected to the other end of the third switch S3, and the other end of the voltage Buffer circuit Buffer is connected to the reference voltage VREF.

In some embodiments, the voltage Buffer circuit Buffer may be implemented by using different circuit structures according to actual needs, as long as the driving capability of the reference voltage VREF can be enhanced. In this embodiment, the voltage Buffer circuit Buffer is implemented by using a second operational amplifier, an output end of the second operational amplifier is connected to the other end of the third switch S3, a reverse input end of the second operational amplifier is connected to the other end of the third switch S3, and a forward input end of the second operational amplifier is connected to the reference voltage VREF.

In some embodiments, VREF has a strong driving capability, and there is no need to add a Buffer circuit Buffer to increase the driving capability, so the Buffer circuit Buffer is not necessary in the present disclosure.

In the above-described charge amplifier, the first operational amplifier OPA is a core part, and thus is also referred to as a main amplifier of the charge amplifier.

In some embodiments, the screen body model 1 further includes a mutual capacitance Cs, one end of the TX electrode is connected to one end of the mutual capacitance Cs, the other end of the mutual capacitance Cs is connected to one end of the RX electrode, the other end of the TX electrode is connected to the TX driver, and the other end of the RX electrode is connected to the other end of the second switch S2.

In some embodiments, the TX electrode includes a first line resistor Rp1, a second line resistor Rp2, and a first ground capacitor Cp1, where one end of the first line resistor Rp1 is connected to one end of the second line resistor Rp2, the other end of the second line resistor Rp2 is connected to one end of the mutual capacitor Cs, the other end of the first line resistor Rp1 is connected to the TX driver, one end of the first line resistor Rp1 is further connected to one end of the first ground capacitor Cp1, and the other end of the first ground capacitor Cp1 is grounded.

In some embodiments, the RX electrode includes a third line resistor Rp3, a fourth line resistor Rp4 and a second ground capacitor Cp2, one end of the third line resistor Rp3 is connected to one end of the fourth line resistor Rp4, the other end of the fourth line resistor Rp4 is connected to the other end of the second switch S2, the other end of the third line resistor Rp3 is connected to the other end of the mutual capacitor Cs, one end of the third line resistor Rp3 is further connected to one end of the second ground capacitor Cp2, and the other end of the second ground capacitor Cp2 is grounded.

For a better understanding of the present invention, first of all, by briefly analyzing the reset time of the prior art in fig. 2, it can be considered that the driving capability of the TXdriver is strong enough, and during the reset period, the voltage stabilization time of the left plate of Cs in fig. 2, i.e., point B, is negligible. The goal to be achieved during the reset of the charge amplifier is that the voltage at the right end of the capacitor Cs, i.e., point a, settles at VREF, and the voltage across the capacitor Cf also settles at VREF. Before the circuit is not split, all charges required for resetting are provided by a main amplifier in the charge amplifiers, and the resetting time depends on the bandwidth of the main amplifier and the time constant of the output load. Fig. 4 shows the equivalent load of Vo during reset, where the equivalent load of Vo is a three-order RC network, the first order is the closed equivalent resistors Ron and Cf of S1, the second order is composed of Rp and Cp, and the last order is composed of Rp and Cs. The settling time at point a depends on the time constant of this third order RC structure. When the screen parameters Rp, Cp and Cs are relatively large, the time constant is also relatively large.

In this embodiment, compared to the prior art, the second switch S2 and the third switch S3 are added to the inverting input terminal of the first operational amplifier OPA, and the second switch S2 is open and the third switch S3 is closed during the reset period of the charge amplifier. Since S2 is off, the charge amplifier is effectively split into two sub-circuits during reset, as shown in fig. 6 and 7.

After being split into two sub-circuits, the reset time of the reset circuit shown in fig. 5 is determined by the largest one of the reset times of the two sub-circuits of fig. 6 and 7.

In this technical solution, similarly, assuming that the driving capability of the TX driver is strong enough, the point B in fig. 6 is fast and stable, the reset period can be regarded as an ac ground, the output load of the Buffer circuit is a second-order RC network, and the stable time of the point a depends on the bandwidth of the Buffer circuit and the time constant of the second-order RC. Compared with the prior art, in the case that the bandwidth of the voltage Buffer circuit Buffer is the same as the bandwidth of the main operational amplifier OPA of the charge amplifier in fig. 2, the load of the circuit in fig. 6 is lighter than that of the prior art, and thus the reset time is shorter than that of the prior art. Similarly, in fig. 7, the output load of the main operational amplifier OPA of the charge amplifier is the first-order RC formed by the on-resistance Ron of the first switch S1 and the feedback capacitor Cf, obviously, because the load is much lighter than the load in the prior art shown in fig. 4, and the reset time of the circuit shown in fig. 7 is shorter than the reset time of the prior art under the condition of the same bandwidth of the amplifier, the reset time of the reset circuit of the present technical solution depends on the maximum reset time of the two sub-circuits shown in fig. 6 and 7, and as mentioned above, the reset time of both sub-circuits is shorter than the reset time of the prior art, therefore, the technical solution proposed in the present invention can shorten the reset time. From another point of view, if the reset time requirement is the same, the requirement of the main operational amplifier OPA of the charge amplifier, whether the requirement of the Buffer bandwidth of the voltage Buffer circuit, or the requirement of the main operational amplifier OPA of the charge amplifier, is lower than the requirement of the main operational amplifier OPA bandwidth of the charge amplifier in the prior art. Thus, less pressure is placed on circuit design. More importantly, in the prior art, to realize a shorter reset time, the bandwidth of the main operational amplifier OPA of the charge amplifier needs to be increased, and the increase of the bandwidth of the main amplifier causes the noise of the output Vo of the charge amplifier to be increased significantly, thereby deteriorating the signal-to-noise ratio of the output, which is very fatal when an application with relatively large environmental noise (such as when a charger is connected). The large bandwidth of the Buffer of the voltage Buffer circuit in fig. 6 does not cause similar problems, and does not affect the output signal-to-noise ratio of the charge amplifier.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.

In addition, units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

Furthermore, the functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.