阅读说明：本技术 一种短路判定和计时控制方法及电路 (Short circuit judgment and timing control method and circuit ) 是由 周阿铖 陈树澍 于 2020-04-29 设计创作，主要内容包括：本发明公开了一种短路判定和计时控制方法及电路,本申请的短路判定和计时控制方法为通过区分短路、启机过流和稳态过流判定,设计控制计时策略,实现推挽式或全桥式变换器的短路温升控制与容性负载能力的兼顾,即实现短路状态下计时短,控制温升小；大容性负载导致的过流状态下计时延长,保证较高的容性负载能力。对应地,本发明的短路判定和计时控制电路包括检测和传输模块、比较模块、逻辑控制和驱动模块、休息计时模块。(The invention discloses a short circuit judgment and timing control method and a circuit, and the short circuit judgment and timing control method designs a control timing strategy by distinguishing short circuit, starting overcurrent and steady-state overcurrent judgment, and realizes the consideration of short circuit temperature rise control and capacitive load capacity of a push-pull type or full-bridge type converter, namely, the short timing and the small control temperature rise are realized in a short circuit state; the timing is prolonged under the overcurrent state caused by the large capacitive load, and the higher capacitive load capacity is ensured. Correspondingly, the short circuit judging and timing control circuit comprises a detection and transmission module, a comparison module, a logic control and driving module and a rest timing module.)

1. A short circuit determination and timing control method for driving and controlling a power tube in a push-pull or full-bridge converter comprises the following steps:

detection and transmission steps: sampling the drain voltage drop of each power tube in the conduction period, and transmitting the voltage drop in the conduction period of each power tube;

a comparison step: respectively comparing the drain voltage drop with the short-circuit threshold voltage, the start-up overcurrent threshold voltage and the steady-state overcurrent threshold voltage in real time, and outputting a comparison result signal; the short-circuit threshold voltage, the start-up overcurrent threshold voltage and the steady-state overcurrent threshold voltage have the following size relations: the short circuit threshold voltage is larger than the starting overcurrent threshold voltage and is larger than the steady-state overcurrent threshold voltage;

logic control and driving steps: selecting a timing mode and switching a driving mode of the power tube according to the comparison result signal: (1) when the voltage drop of the drain electrode is higher than or equal to the short-circuit threshold voltage, judging that a short circuit occurs, performing short-circuit timing, and enabling the power tube to enter current-limiting driving within the short-circuit timing time; (2) when the voltage drop of the drain electrode is higher than or equal to the starting overcurrent threshold voltage and lower than the short-circuit threshold voltage, judging that starting overcurrent occurs, carrying out overcurrent timing, and enabling the power tube to enter current-limiting driving within the overcurrent timing time; (3) when the voltage drop of the drain electrode is higher than or equal to the steady-state overcurrent threshold voltage and lower than the starting overcurrent threshold voltage, judging that steady-state overcurrent occurs, carrying out overcurrent timing, and enabling the power tube to enter current-limiting driving within the overcurrent timing time; (4) when the voltage drop of the drain electrode is lower than the steady-state overcurrent threshold voltage, the power tube is controlled to be fully driven without timing; the magnitude relation of the short-circuit timing time and the overcurrent timing time is as follows: the overcurrent timing time is greater than the short-circuit timing time;

when the timing time is not generated, the three steps are repeated; when the timing time is generated, when the timing time is over, as long as the drain voltage drop is continuously higher than or equal to the steady-state overcurrent threshold voltage, the converter is controlled to enter a rest mode, rest timing is started, the converter is controlled to start up again after the rest timing is over, and then the three steps are executed.

2. The short circuit determination and timing control method according to claim 1, characterized in that: an over-temperature protection judgment step is added in the logic control and driving step, when the temperature of a control chip in the converter reaches a set temperature, the over-temperature is judged, and an over-temperature timer is started; correspondingly, when the over-temperature timing is finished, whether the temperature of a control chip in the converter is continuously higher than or equal to a set temperature or not needs to be judged, if so, the converter is controlled to select to enter a rest mode, the rest timing is started, the converter is controlled to start up again after the rest timing is finished, and then the detection and transmission step, the comparison step and the logic control and driving step are executed.

3. The logic control and driving step of claim 2, wherein the over-temperature timer time is zero.

4. The logic control and driving step of claim 2, wherein the set temperature is a maximum over-temperature protection point of a control chip in the inverter.

5. A short circuit judging and timing control circuit is used for driving and controlling a power tube in a push-pull type or full-bridge type converter and is characterized by comprising a detection and transmission module, a comparison module, a logic control and driving module and a rest timing module;

the detection and transmission module is used for sampling the drain voltage drop of each power tube during the conduction period and transmitting the voltage drop during the conduction period of each power tube;

the comparison module compares the drain voltage drop and the short-circuit threshold voltage, and the start-up overcurrent threshold voltage and the steady-state overcurrent threshold voltage in real time respectively and outputs comparison result signals; the short-circuit threshold voltage, the start-up overcurrent threshold voltage and the steady-state overcurrent threshold voltage have the following size relations: the short circuit threshold voltage is larger than the starting overcurrent threshold voltage and is larger than the steady-state overcurrent threshold voltage;

the logic control and drive module selects a timing mode and switches the drive mode of the power tube according to the comparison result signal: (1) when the voltage drop of the drain electrode is higher than or equal to the short-circuit threshold voltage, judging that a short circuit occurs, performing short-circuit timing, and enabling the power tube to enter current-limiting driving within the short-circuit timing time; (2) when the voltage drop of the drain electrode is higher than or equal to the starting overcurrent threshold voltage and lower than the short-circuit threshold voltage, judging that starting overcurrent occurs, carrying out overcurrent timing, and enabling the power tube to enter current-limiting driving within the overcurrent timing time; (3) when the voltage drop of the drain electrode is higher than or equal to the steady-state overcurrent threshold voltage and lower than the starting overcurrent threshold voltage, judging that steady-state overcurrent occurs, carrying out overcurrent timing, and enabling the power tube to enter current-limiting driving within the overcurrent timing time; (4) when the voltage drop of the drain electrode is lower than the steady-state overcurrent threshold voltage, the power tube is controlled to be fully driven without timing; the magnitude relation of the short-circuit timing time and the overcurrent timing time is as follows: the overcurrent timing time is greater than the short-circuit timing time;

the rest timing module judges whether the timing time generated by the logic control and drive module is over, and when the timing time is over, the converter is controlled to enter a rest mode as long as the drain voltage drop is judged to be continuously higher than or equal to the steady-state overcurrent threshold voltage, the rest timing is started, and the converter is controlled to start again after the rest timing is over.

6. The short circuit determination and timing control circuit of claim 5, wherein: the detection and transmission module comprises a transmission gate 1 and a transmission gate 2; the input end of the transmission gate 1 is used for inputting the drain voltage drop of the first power tube, the control end of the transmission gate is used for inputting the grid driving signal of the first power tube, and the output end of the transmission gate is used for outputting the drain voltage drop of the first power tube; the input end of the transmission gate 2 is used for inputting the drain voltage drop of the second power tube, the control end is used for inputting the grid driving signal of the second power tube, and the output end is used for outputting the drain voltage drop of the second power tube.

7. The short circuit determination and timing control circuit of claim 5, wherein: the comparison module comprises a short circuit judgment comparator CMP1, a start-up overcurrent judgment comparator CMP2 and a steady-state overcurrent judgment comparator CMP 3; the positive input end of the short-circuit determination comparator CMP1 is used for inputting the drain voltage transmitted by the detection and transmission module, the negative input end is used for inputting the short-circuit threshold voltage, and the output end is used for outputting the short-circuit determination comparison result; the positive input end of the start-up overcurrent judgment comparator CMP2 is used for inputting the drain voltage transmitted by the detection and transmission module, the negative input end is used for inputting the start-up overcurrent threshold voltage, and the output end is used for outputting the start-up overcurrent judgment comparison result; the positive input terminal of the steady-state overcurrent determination comparator CMP3 is used for inputting the drain voltage transmitted from the detection and transmission module, the negative input terminal is used for inputting the steady-state overcurrent threshold voltage, and the output terminal is used for outputting the steady-state overcurrent determination comparison result.

8. The short circuit determination and timing control circuit of claim 5, wherein: the logic control AND drive module comprises a transmission gate 3, a transmission gate 4, a transmission gate 5, a transmission gate 6, a two-input AND gate AND2 AND a three-input AND gate AND 3; the input end of the transmission gate 3 is used for inputting a short circuit timing signal, the control end is used for inputting a short circuit judgment comparison result, and the output end is used for outputting a short circuit timing signal; the input end of the transmission gate 4 is used for inputting an overcurrent timing signal, the control end of the transmission gate is connected with the output end of the two-input AND gate AND2, AND the output end of the transmission gate is connected with the input end of the transmission gate 6; the input end of the transmission gate 5 is used for inputting a driving signal for controlling the power tube to be fully driven, the control end is connected with the output end of the three-input AND gate AND3, AND the output end is used for outputting the driving signal for controlling the power tube to be fully driven; the control end of the transmission gate 6 is used for inputting a short circuit judgment comparison result, and the output end is used for outputting a short circuit timing signal or an overcurrent timing signal; a first input end of the two-input AND gate AND2 is used for inputting a start-up overcurrent judgment comparison result, a second input end is used for inputting a steady-state overcurrent judgment comparison result, AND an output end is connected with a control end of the transmission gate 4; the three-input AND gate AND3 has a first input end for inputting the short-circuit judgment comparison result, a second input end for inputting the start-up overcurrent judgment comparison result, a third input end for inputting the steady-state overcurrent judgment comparison result, AND an output end connected to the control end of the transmission gate 5.

9. The short circuit determination and timing control circuit of claim 5, wherein: the logic control and drive module is also added with an over-temperature protection judging function, when the temperature of a control chip in the converter reaches a set temperature, the over-temperature is judged to occur, and an over-temperature timer is started; correspondingly, the rest timing module needs to judge whether the temperature of the control chip in the converter is continuously higher than or equal to the set temperature when the over-temperature timing is finished, if so, the converter is controlled to select to enter a rest mode, the rest timing is started, the converter is controlled to start again after the rest timing is finished, and then the detection and transmission step, the comparison step and the logic control and driving step are executed.

10. The short circuit determination and timing control circuit of claim 9, wherein: the logic control AND drive module comprises a transmission gate 7, a transmission gate 8, a transmission gate 9, a transmission gate 10, a transmission gate 11, a transmission gate 12, a two-input AND gate AND4 AND a four-input AND gate AND 5; the input end of the transmission gate 7 is used for inputting a short circuit timing signal, the control end is used for inputting a short circuit judgment comparison result, and the output end is used for outputting a short circuit timing signal; the input end of the transmission gate 8 is used for inputting an overcurrent timing signal, the control end is connected with the output end of the two-input AND gate AND4, AND the output end is connected with the input end of the transmission gate 10; the input end of the transmission gate 9 is used for inputting a driving signal for controlling the power tube to be fully driven, the control end is connected with the output end of the four-input AND gate AND5, AND the output end is used for outputting the driving signal for controlling the power tube to be fully driven; the input end of the transmission gate 10 is connected with the output end of the transmission gate 8, the control end is used for inputting a short circuit judgment comparison result, and the output end is connected with the input end of the transmission gate 11; the input end of the transmission gate 11 is connected with the output end of the transmission gate 10, the control end is used for inputting an over-temperature protection signal, and the output end is used for outputting a short-circuit timing signal or an over-current timing signal or an over-temperature timing signal; the input end of the transmission gate 12 is used for inputting an over-temperature timing signal, the control end is used for inputting an over-temperature protection signal, and the output end is connected with the output end of the transmission gate 11; a first input end of the two-input AND gate AND4 is used for inputting a start-up overcurrent judgment comparison result, a second input end is used for inputting a steady-state overcurrent judgment comparison result, AND an output end is connected with a control end of the transmission gate 8; the four-input AND gate AND5 has a first input end for inputting the start-up overcurrent determination comparison result, a second input end for inputting the steady-state overcurrent determination comparison result, a third input end for inputting the short-circuit determination comparison result, a fourth input end for inputting the over-temperature protection signal, AND an output end connected to the control end of the transmission gate 9.

Technical Field

The present invention relates to switching converters, and more particularly to short-circuit and overcurrent determination and corresponding timing control in full-bridge, push-pull converters.

Background

The constant-voltage power supply module usually adopts a full-bridge converter and a push-pull converter topology, and has the advantages of simple structure, high efficiency, small size and the like, and is widely applied. However, most of the existing constant-voltage power modules have no protection function, such as a large current flows through a power tube under a short circuit, and the switch device is easily damaged. Based on this, the constant voltage power supply module gradually tends to be integrated, i.e. the work of the constant voltage power supply module is controlled by the driving IC, as shown in fig. 1, and the short circuit protection function and the over-temperature protection function can be integrated in the driving IC, so as to improve the defects of the conventional constant voltage power supply module and enhance the reliability of the system.

The invention discloses a control method of a full-bridge converter, which is a Chinese patent with publication number CN201910852638 and invented name 'a control method and controller of the full-bridge converter'. The control method solves the problems of capacitive load, limited current setting during starting and short-circuit heating in a compromise mode through a mode of current-limiting driving, timing detection and hiccup protection. For the fixed starting machine, the limiting current Ist and the timing time Td have the original secondary side turn ratio of Np to Ns, and the capacitive load value of the constant voltage system can be referred to the following formula.

Disclosure of Invention

In view of the above, the present invention provides a short circuit determination and timing control method and circuit, which can achieve both short circuit temperature rise control and capacitive load capability of a constant voltage module by distinguishing short circuit determination and overcurrent determination and designing a control timing strategy. The short timing and the small temperature rise control under the short circuit state are realized; the timing is prolonged under the overcurrent state caused by the large capacitive load, and the higher capacitive load capacity is ensured.

In order to solve the technical problems, the technical scheme of the short circuit judgment and timing control method provided by the invention is as follows:

a short circuit determination and timing control method for driving and controlling a power tube in a push-pull or full-bridge converter comprises the following steps:

detection and transmission steps: sampling the drain voltage drop of each power tube in the conduction period, and transmitting the voltage drop in the conduction period of each power tube;

a comparison step: respectively comparing the drain voltage drop with the short-circuit threshold voltage, the start-up overcurrent threshold voltage and the steady-state overcurrent threshold voltage in real time, and outputting a comparison result signal; the short-circuit threshold voltage, the start-up overcurrent threshold voltage and the steady-state overcurrent threshold voltage have the following size relations: the short circuit threshold voltage is larger than the starting overcurrent threshold voltage and is larger than the steady-state overcurrent threshold voltage;

logic control and driving steps: selecting a timing mode and switching a driving mode of the power tube according to the comparison result signal: (1) when the voltage drop of the drain electrode is higher than or equal to the short-circuit threshold voltage, judging that a short circuit occurs, performing short-circuit timing, and enabling the power tube to enter current-limiting driving within the short-circuit timing time; (2) when the voltage drop of the drain electrode is higher than or equal to the starting overcurrent threshold voltage and lower than the short-circuit threshold voltage, judging that starting overcurrent occurs, carrying out overcurrent timing, and enabling the power tube to enter current-limiting driving within the overcurrent timing time; (3) when the voltage drop of the drain electrode is higher than or equal to the steady-state overcurrent threshold voltage and lower than the starting overcurrent threshold voltage, judging that steady-state overcurrent occurs, carrying out overcurrent timing, and enabling the power tube to enter current-limiting driving within the overcurrent timing time; (4) when the voltage drop of the drain electrode is lower than the steady-state overcurrent threshold voltage, the power tube is controlled to be fully driven without timing; the magnitude relation of the short-circuit timing time and the overcurrent timing time is as follows: the overcurrent timing time is greater than the short-circuit timing time;

when the timing time is not generated, the three steps are repeated; when the timing time is generated, when the timing time is over, as long as the drain voltage drop is continuously higher than or equal to the steady-state overcurrent threshold voltage, the converter is controlled to enter a rest mode, rest timing is started, the converter is controlled to start up again after the rest timing is over, and then the three steps are executed.

As an improvement of the short circuit determination and timing control method, the method is characterized in that: an over-temperature protection judgment step is added in the logic control and driving step, when the temperature of a control chip in the converter reaches a set temperature, the over-temperature is judged, and an over-temperature timer is started; correspondingly, when the over-temperature timing is finished, whether the temperature of a control chip in the converter is continuously higher than or equal to a set temperature or not needs to be judged, if so, the converter is controlled to select to enter a rest mode, the rest timing is started, the converter is controlled to start up again after the rest timing is finished, and then the detection and transmission step, the comparison step and the logic control and driving step are executed.

Preferably, the over-temperature timer time is zero.

Preferably, the set temperature is the highest over-temperature protection point of a control chip in the inverter.

Correspondingly, the technical scheme of the short circuit judgment and timing control circuit provided by the invention is as follows:

a short circuit judging and timing control circuit is used for driving and controlling a power tube in a push-pull type or full-bridge type converter and is characterized by comprising a detection and transmission module, a comparison module, a logic control and driving module and a rest timing module;

the detection and transmission module is used for sampling the drain voltage drop of each power tube during the conduction period and transmitting the voltage drop during the conduction period of each power tube;

the comparison module compares the drain voltage drop and the short-circuit threshold voltage, and the start-up overcurrent threshold voltage and the steady-state overcurrent threshold voltage in real time respectively and outputs comparison result signals; the short-circuit threshold voltage, the start-up overcurrent threshold voltage and the steady-state overcurrent threshold voltage have the following size relations: the short circuit threshold voltage is larger than the starting overcurrent threshold voltage and is larger than the steady-state overcurrent threshold voltage;

the logic control and drive module selects a timing mode and switches the drive mode of the power tube according to the comparison result signal: (1) when the voltage drop of the drain electrode is higher than or equal to the short-circuit threshold voltage, judging that a short circuit occurs, performing short-circuit timing, and enabling the power tube to enter current-limiting driving within the short-circuit timing time; (2) when the voltage drop of the drain electrode is higher than or equal to the starting overcurrent threshold voltage and lower than the short-circuit threshold voltage, judging that starting overcurrent occurs, carrying out overcurrent timing, and enabling the power tube to enter current-limiting driving within the overcurrent timing time; (3) when the voltage drop of the drain electrode is higher than or equal to the steady-state overcurrent threshold voltage and lower than the starting overcurrent threshold voltage, judging that steady-state overcurrent occurs, carrying out overcurrent timing, and enabling the power tube to enter current-limiting driving within the overcurrent timing time; (4) when the voltage drop of the drain electrode is lower than the steady-state overcurrent threshold voltage, the power tube is controlled to be fully driven without timing; the magnitude relation of the short-circuit timing time and the overcurrent timing time is as follows: the overcurrent timing time is greater than the short-circuit timing time;

the rest timing module judges whether the timing time generated by the logic control and drive module is over, and when the timing time is over, the converter is controlled to enter a rest mode as long as the drain voltage drop is judged to be continuously higher than or equal to the steady-state overcurrent threshold voltage, the rest timing is started, and the converter is controlled to start again after the rest timing is over.

As a specific implementation manner of the detection and transmission module, the method is characterized in that: comprises a transmission gate 1 and a transmission gate 2; the input end of the transmission gate 1 is used for inputting the drain voltage drop of the first power tube, the control end of the transmission gate is used for inputting the grid driving signal of the first power tube, and the output end of the transmission gate is used for outputting the drain voltage drop of the first power tube; the input end of the transmission gate 2 is used for inputting the drain voltage drop of the second power tube, the control end is used for inputting the grid driving signal of the second power tube, and the output end is used for outputting the drain voltage drop of the second power tube.

The specific implementation mode of the comparison module is characterized in that: comprises a short circuit judgment comparator CMP1, a start-up overcurrent judgment comparator CMP2 and a steady-state overcurrent judgment comparator CMP 3; the positive input end of the short-circuit determination comparator CMP1 is used for inputting the drain voltage transmitted by the detection and transmission module, the negative input end is used for inputting the short-circuit threshold voltage, and the output end is used for outputting the short-circuit determination comparison result; the positive input end of the start-up overcurrent judgment comparator CMP2 is used for inputting the drain voltage transmitted by the detection and transmission module, the negative input end is used for inputting the start-up overcurrent threshold voltage, and the output end is used for outputting the start-up overcurrent judgment comparison result; the positive input terminal of the steady-state overcurrent determination comparator CMP3 is used for inputting the drain voltage transmitted from the detection and transmission module, the negative input terminal is used for inputting the steady-state overcurrent threshold voltage, and the output terminal is used for outputting the steady-state overcurrent determination comparison result.

As a specific implementation mode of the logic control and drive module, the method is characterized in that: the transmission device comprises a transmission gate 3, a transmission gate 4, a transmission gate 5, a transmission gate 6, a two-input AND gate AND2 AND a three-input AND gate AND 3; the input end of the transmission gate 3 is used for inputting a short circuit timing signal, the control end is used for inputting a short circuit judgment comparison result, and the output end is used for outputting a short circuit timing signal; the input end of the transmission gate 4 is used for inputting an overcurrent timing signal, the control end of the transmission gate is connected with the output end of the two-input AND gate AND2, AND the output end of the transmission gate is connected with the input end of the transmission gate 6; the input end of the transmission gate 5 is used for inputting a driving signal for controlling the power tube to be fully driven, the control end is connected with the output end of the three-input AND gate AND3, AND the output end is used for outputting the driving signal for controlling the power tube to be fully driven; the control end of the transmission gate 6 is used for inputting a short circuit judgment comparison result, and the output end is used for outputting a short circuit timing signal or an overcurrent timing signal; a first input end of the two-input AND gate AND2 is used for inputting a start-up overcurrent judgment comparison result, a second input end is used for inputting a steady-state overcurrent judgment comparison result, AND an output end is connected with a control end of the transmission gate 4; the three-input AND gate AND3 has a first input end for inputting the short-circuit judgment comparison result, a second input end for inputting the start-up overcurrent judgment comparison result, a third input end for inputting the steady-state overcurrent judgment comparison result, AND an output end connected to the control end of the transmission gate 5.

As an improvement of the above short circuit determination and timing control circuit, characterized in that: the logic control and drive module is also added with an over-temperature protection judging function, when the temperature of a control chip in the converter reaches a set temperature, the over-temperature is judged to occur, and an over-temperature timer is started; correspondingly, the rest timing module needs to judge whether the temperature of the control chip in the converter is continuously higher than or equal to the set temperature when the over-temperature timing is finished, if so, the converter is controlled to select to enter a rest mode, the rest timing is started, the converter is controlled to start again after the rest timing is finished, and then the detection and transmission step, the comparison step and the logic control and driving step are executed.

As a specific implementation manner of the logic control and driving module in the above-mentioned short circuit determination and timing control circuit improvement scheme, the method is characterized in that: the transmission device comprises a transmission gate 7, a transmission gate 8, a transmission gate 9, a transmission gate 10, a transmission gate 11, a transmission gate 12, a two-input AND gate AND4 AND a four-input AND gate AND 5; the input end of the transmission gate 7 is used for inputting a short circuit timing signal, the control end is used for inputting a short circuit judgment comparison result, and the output end is used for outputting a short circuit timing signal; the input end of the transmission gate 8 is used for inputting an overcurrent timing signal, the control end is connected with the output end of the two-input AND gate AND4, AND the output end is connected with the input end of the transmission gate 10; the input end of the transmission gate 9 is used for inputting a driving signal for controlling the power tube to be fully driven, the control end is connected with the output end of the four-input AND gate AND5, AND the output end is used for outputting the driving signal for controlling the power tube to be fully driven; the input end of the transmission gate 10 is connected with the output end of the transmission gate 8, the control end is used for inputting a short circuit judgment comparison result, and the output end is connected with the input end of the transmission gate 11; the input end of the transmission gate 11 is connected with the output end of the transmission gate 10, the control end is used for inputting an over-temperature protection signal, and the output end is used for outputting a short-circuit timing signal or an over-current timing signal or an over-temperature timing signal; the input end of the transmission gate 12 is used for inputting an over-temperature timing signal, the control end is used for inputting an over-temperature protection signal, and the output end is connected with the output end of the transmission gate 11; a first input end of the two-input AND gate AND4 is used for inputting a start-up overcurrent judgment comparison result, a second input end is used for inputting a steady-state overcurrent judgment comparison result, AND an output end is connected with a control end of the transmission gate 8; the four-input AND gate AND5 has a first input end for inputting the start-up overcurrent determination comparison result, a second input end for inputting the steady-state overcurrent determination comparison result, a third input end for inputting the short-circuit determination comparison result, a fourth input end for inputting the over-temperature protection signal, AND an output end connected to the control end of the transmission gate 9.

The working principle of the present invention will be described in detail with reference to specific embodiments, which are not described herein, and the beneficial effects of the present invention are as follows:

1) the short-circuit judgment and the overcurrent judgment are distinguished, different short-circuit judgment threshold values and overcurrent judgment threshold values are set, the timing time during short circuit is set to be short, so that the heat accumulated in the timing stage is small, the short-circuit protection can be normally triggered by the converter, the heat can be dissipated during rest timing, and the temperature rise can be effectively controlled;

2) the timing time when overcurrent occurs is set to be longer so as to ensure that the converter can be started normally when a large capacitive load is carried, and the capacity of the converter carrying the capacitive load is improved;

3) the short-circuit protection and the overcurrent protection can share the same rest timing through logic control, and the area and the cost of a drive IC can be saved.

Drawings

Fig. 1 is a schematic diagram of a conventional constant voltage power module for controlling the operation of the module by a driving IC;

FIG. 2 is a functional block diagram of the present invention;

FIG. 3 is a schematic diagram of a detection and transmission module, comparison module of a first embodiment of the present invention;

FIG. 4 is a schematic diagram of a logic control and drive module of a first embodiment of the present invention;

fig. 5 is a schematic diagram of a logic control and drive module of a second embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Fig. 2 is a schematic block diagram of the short circuit determination and timing control circuit of the present invention, which includes a detection and transmission module, a comparison module, a logic control and driving module, and a rest timing module. The design of the invention of the application is that a control timing strategy is designed by distinguishing short circuit, starting overcurrent and steady-state overcurrent judgment, and the consideration of short circuit temperature rise control and capacitive load capacity of a push-pull type or full-bridge type converter is realized, namely, the short timing and the small control temperature rise are realized in a short circuit state; the timing is prolonged under the overcurrent state caused by the large capacitive load, and the higher capacitive load capacity is ensured.

The signals involved in this document are many, and the meaning of each english code is explained as follows:

VD1, drain voltage drop of the first power tube;

VD2, drain voltage drop of the power tube II;

VDon: sampling drain electrode voltage drop of the first power tube and the second power tube when the first power tube and the second power tube are respectively conducted;

ton 1: a grid driving signal of the first power tube;

ton 2: a grid electrode driving signal of the power tube II;

vth _ osp: a short circuit threshold voltage;

vth _ ocp: starting an overcurrent threshold voltage;

vth _ ocp 0: a steady-state overcurrent threshold voltage;

OSP-L short circuit determination comparison result signal;

OCP _ L, start-up overcurrent judgment comparison result signal;

OCP0_ L steady-state overcurrent determination comparison result signal;

OTP _ L over-temperature protection signal;

td _ osp: a short circuit timing signal;

td _ ocp: an overcurrent timing signal;

td _ otp: an over-temperature timing signal;

tsleep: and (5) timing the rest.

First embodiment

Fig. 3 is a schematic diagram of a detection and transmission module and a comparison module according to a first embodiment of the present invention, and fig. 4 is a schematic diagram of a logic control and driving module according to a first embodiment of the present invention.

The detection and transmission module is composed of a transmission gate 1 and a transmission gate 2. The drain voltage VD1 of the first power tube is input to the input end of the transmission gate 1, the gate drive signal Ton1 of the first power tube is input to the control end, and the output end is connected with the first input end VDon of the comparison module; the input end of the transmission gate 2 inputs the drain voltage VD2 of the second power transistor, the control end inputs the gate driving signal Ton2 of the second power transistor, and the output end is connected to the first input end VDon of the comparison module.

The comparison module is composed of a short circuit determination comparator CMP1, a start-up overcurrent determination comparator CMP2, and a steady-state overcurrent determination comparator CMP 3. The positive input terminal of the short-circuit determination comparator CMP1 is connected to the first input terminal VDon of the comparison module, the negative input terminal thereof inputs the short-circuit threshold voltage signal Vth _ osp, and the output terminal thereof is connected to the first input terminal of the logic control and driving module. The positive input end of the start-up over-current determination comparator CMP2 is connected to the first input end VDon of the comparison module, the negative input end inputs the start-up over-current threshold voltage signal Vth _ ocp, and the output end is connected to the second input end of the logic control and driving module. The positive input end of the steady-state overcurrent determination comparator CMP3 is connected to the first input end VDon of the comparison module, the negative input end thereof inputs the steady-state overcurrent threshold voltage signal Vth _ ocp0, and the output end thereof is connected to the third input end of the logic control and driving module.

The logic control AND drive module is composed of a transmission gate 3, a transmission gate 4, a transmission gate 5, a transmission gate 6, a two-input AND gate AND2 AND a three-input AND gate AND 3. The input end of the transmission gate 3 inputs a short-circuit timing signal Td _ osp, the control end is connected with the first input end of the logic control and drive module, and the output end is connected with the rest timing module. The input end of the transmission gate 4 inputs the overcurrent timing signal Td _ ocp, the control end is connected to the output end of the two-input AND gate AND2, AND the output end is connected to the input end of the transmission gate 6. The input end of the transmission gate 5 inputs a driving signal for controlling the power transistor to be fully driven, the control end is connected with the output end of the three-input AND gate AND3, AND the output end is used for outputting the driving signal for controlling the power transistor to be fully driven. The input end of the transmission gate 6 is connected with the output end of the transmission gate 4, the control end is connected with the first input end of the logic control and drive module, and the output end is connected with the rest timing module. The first input end of the two-input AND gate AND2 is connected to the second input end of the logic control AND drive module, the second input end is connected to the third input end of the logic control AND drive module, AND the output end is connected to the control end of the transmission gate 4. A first input end of the three-input AND gate AND3 is connected to a first input end of the logic control AND drive module, a second input end is connected to a second input end of the logic control AND drive module, a third input end is connected to a third input end of the logic control AND drive module, AND an output end is connected to a control end of the transmission gate 5.

The rest timing module can be realized by adopting the timing mode of the oscillator clock by those skilled in the art, and specifically, the rest timing module can be realized by counting 2 for the clock signal C L K with the duty ratio of D and the period of T as the period during the timing^NThe period is just one, and different N values can be selected for realizing different timings.

The transmission gates mentioned in the present document are all active transmission with high level at the positive control end, transmission is prohibited with low level at the positive control end, and the comparator mentioned V + > V-, outputs low level, V- > V +, outputs high level.

Vth _ osp > Vth _ ocp0, Td _ osp < Td _ ocp are set.

The reason for setting Vth _ osp > Vth _ ocp0 is based on the operating principle of a push-pull or full-bridge converter. The following description is made here:

taking a push-pull converter as an example, integrating a power tube into an IC, wherein the drain voltage drop of a first power tube is VD1, the drain voltage drop of a second power tube is VD2, and the turn ratio of a primary side to a secondary side is Np: ns, secondary diode D1/D2 drops Vd, as shown in FIG. 1. When short circuit occurs, the output voltage is almost zero, the voltage of the primary winding is clamped to be zero by the secondary side, the input voltage almost completely falls on the power tube, and the VDon is approximately equal to Vin. When the output load with the maximum capacitance is started, because the output voltage is very small, the phenomenon is basically consistent with the short circuit, namely VDon is approximately equal to Vin. Therefore, the short-circuit threshold can be set to 10% -20% of the output voltage, and the short-circuit threshold is the drain voltage drop (taking 10% of the output voltage as an example) of the power tube at that time:

during the starting period, the output voltage gradually increases, the power tube Vds _ on gradually decreases, and if the output voltage does not reach a set value (the set value may be 80% -95% of the output voltage) within a set time (for example, Td _ ocp in the embodiment), it is determined that the start-up overcurrent occurs. That is, the drain voltage drop (taking 90% of the output voltage as an example) of the power tube when the starting over-current threshold is the current is:

after the chip is separated from the startup stage, the power tube is driven from low gate voltage to high level hard drive, the secondary output capacitor is full, the drain voltage drop Vds _ on and the current Ids of the power tube depend on the set value of the secondary load, the steady-state overcurrent point refers to the corresponding load current value under the set load power, that is, the drain voltage drop of the power tube when the steady-state overcurrent threshold is at the moment is:

therefore, the relationship between the three thresholds is Vth _ osp > Vth _ ocp0, which can be derived from the above analysis and calculation.

The working principle analysis of the embodiment is as follows:

starting a mode:

when the converter is just started, the converter works in a current-limiting driving state, the control chip samples AND detects drain voltage drop VDon in the period of power tube conduction, if VDon is larger than Vth _ OSP, the short-circuit judgment comparator CMP1 outputs OSP _ L low level, the startup overcurrent judgment comparator CMP2 outputs OCP _ L low level, the steady-state overcurrent judgment comparator CMP3 outputs OCP0_ L low level, at the moment, the output of AND2 is low level, the output of AND3 is low level, the transmission gate 3 is opened, the transmission gates 4, 5 AND 6 are closed, AND the short-circuit timer Td _ OSP is opened:

1) if VDon > Vth _ OSP continues within the time period Td _ OSP, namely OSP _ L continues to be low level, the transmission gate 3 continues to be conducted, after the time period Td _ OSP is finished, the short-circuit protection mode is entered, the rest time Tsleep is started, after the time period Tsleep is finished, the starting mode current-limiting driving is entered again, and the cycle is performed;

2) if VDon < Vth _ OSP within the time period Td _ OSP, the signal OSP _ L is turned high, the transmission gate 3 is turned off, the transmission gate 6 is turned on, the current-limiting driving is kept, the inverter enters an overcurrent determination mode, at the moment, OCP _ L is at a low level, OSP _ L is at a high level, OCP0_ L is at a low level, the transmission gates 3 and5 are turned off, the transmission gates 4 and 6 are turned on, an overcurrent time Td _ OCP is started, and the overcurrent duration is continuously accumulated on the basis of the continuous short circuit time;

3) if VDon is larger than Vth _ OCP continuously in the time of Td _ OCP timing, namely OCP _ L is continuously low, the transmission gates 4 and 6 are continuously conducted until Td _ OCP timing is finished, an overcurrent protection mode is entered, a rest timing Tsleep is started, and the starting mode current-limiting driving is entered again after Tsleep timing is finished, so that circulation is performed;

4) if the time VDon is counted at Td _ OCP < Vth _ OCP0, at this time, OCP _ L is at high level, OSP _ L is at high level, OCP0_ L is at high level, AND2 outputs high level, AND3 outputs high level, transfer gates 3 AND4 are turned off, transfer gates 5 AND 6 are turned on, a driving signal for controlling the power tube to be fully driven is transmitted, it is determined that the start-up is normal, AND the converter enters a steady-state mode.

Steady-state mode:

when the converter works in a steady-state mode, the power tube is in a sufficient driving state, the chip is controlled to sample AND detect drain voltage drop VDon during the conduction period of the power tube, if the VDon is greater than Vth _ OCP0, the converter enters a current-limiting driving state, the short-circuit judgment comparator CMP1 outputs OSP _ L high level, the start-up over-current judgment comparator CMP2 outputs OCP _ L low level, the steady-state over-current judgment comparator CMP3 outputs OCP0_ L low level, at the moment, the AND2 output is low level, the AND3 output is low level, the transmission gates 4 AND 6 are opened, the transmission gates 3 AND5 are closed, AND an over-current timer Td _ OCP is started:

1) if VDon is less than or equal to Vth _ OCP0 after the current-limiting driving state is entered, the current is judged not to be over-current AND not to be short-circuited, at the moment, OCP _ L is at a high level, OSP _ L is at a high level, OCP0_ L is at a high level, AND2 outputs a high level, AND3 outputs a high level, transmission gates 3 AND4 are turned off, transmission gates 5 AND 6 are turned on, a driving signal for controlling the power tube to be fully driven is transmitted, the converter is restored to a steady-state mode, AND the switching tube is fully driven;

2) if VDon is larger than Vth _ OCP continuously in the time of Td _ OCP timing, namely OCP _ L is continuously low, the transmission gates 4 and 6 are continuously conducted until Td _ OCP timing is finished, an overcurrent protection mode is entered, a rest timing Tsleep is started, and the starting mode current-limiting driving is entered again after Tsleep timing is finished, so that circulation is performed;

3) if VDon is greater than Vth _ OSP in the Td _ ocp timing time, the OSP _ L signal turns low, the transmission gates 4, 5 and 6 are closed, the transmission gate 3 is opened, the Td _ ocp is not completed, and the short-circuit timing Td _ OSP is directly switched from the over-current timing Td _ ocp, if VDon is greater than Vth _ OSP after the Td _ ocp timing is completed, the system also directly enters the short-circuit protection mode, and the rest timing Tsleep is started;

4) if VDon < Vth _ OCP0, namely OCP _ L is high level, OSP _ L is high level, OCP0_ L is high level, AND2 outputs high level, AND3 outputs high level, transmission gates 3 AND4 are turned off, transmission gates 5 AND 6 are turned on, AND a driving signal for controlling the power tube to be fully driven is transmitted, overcurrent recovery is judged, the converter enters the steady-state mode again, AND the switching tube is fully driven.

The embodiment requires that the overcurrent timing time is set to be larger than the short circuit timing time to achieve the purpose of the invention: the timing time during short circuit is short, the aim is to ensure that the accumulated heat is small in the timing stage, the converter can normally trigger short circuit protection, and the heat can be dissipated during rest timing, so that the temperature rise can be effectively controlled; the overcurrent timing time is long, the aim is to ensure that the converter can be normally started when a large capacitive load is carried, and the capacity of the converter carrying the capacitive load is improved.

In addition, in the embodiment, the short-circuit protection and the overcurrent protection share the same rest timing through logic control, and the beneficial effects of saving the area and the cost of the drive IC can be achieved.

Second embodiment

In the second embodiment, the overall determination architecture and mode are the same as those of the first embodiment, except that in the second embodiment, an over-temperature protection function is further added, and the over-temperature protection signal OTP _ L is combined with the short-circuit and over-current determination, so that the logic control module is changed, as shown in fig. 5.

The logic control AND driving module of the present embodiment is composed of a transmission gate 7, a transmission gate 8, a transmission gate 9, a transmission gate 10, a transmission gate 11, a transmission gate 12, a two-input AND gate AND4, AND a four-input AND gate AND 5. The input end of the transmission gate 7 inputs the short-circuit timing signal Td _ osp, the control end is connected to the output end of the short-circuit determination comparator CMP1, and the output end is connected to the rest timing module. The input end of the transmission gate 8 inputs the overcurrent timing signal Td _ ocp, the control end is connected to the output end of the two-input AND gate AND4, AND the output end is connected to the input end of the transmission gate 10. The input end of the transmission gate 9 inputs a driving signal for controlling the power tube to be fully driven, the control end is connected with the output end of the four-input AND gate AND5, AND the output end outputs the driving signal for controlling the power tube to be fully driven. The input terminal of the transmission gate 10 is connected to the output terminal of the transmission gate 8, the control terminal is connected to the output terminal of the short-circuit determination comparator CMP1, and the output terminal is connected to the input terminal of the transmission gate 11. The input end of the transmission gate 11 is connected with the output end of the transmission gate 10, the control end inputs the over-temperature protection signal, and the output end is connected with the rest timing module. The input end of the transmission gate 12 inputs an over-temperature timing signal Td _ otp, the control end inputs an over-temperature protection signal, and the output end is connected to the rest timing module. A first input end of the two-input AND gate AND4 is connected with an output end of the start-up overcurrent determination comparator CMP2, a second input end is connected with an output end of the steady-state overcurrent determination comparator CMP3, AND an output end is connected with a control end of the transmission gate 4. The first input end of the four-input AND gate AND5 is connected with the output end of the start-up overcurrent determination comparator CMP2, the second input end is connected with the output end of the steady-state overcurrent determination comparator CMP3, the third input end is connected with the output end of the short-circuit determination comparator CMP1, the fourth input end inputs an over-temperature protection signal, AND the output end is connected with the control end of the transmission gate 9.

In the embodiment, an over-temperature protection signal OTP _ L is added to the input end of a four-input AND gate AND5 of a logic control module, the over-temperature protection signal OTP _ L is high level in a normal state AND is low level after reaching a set temperature, a transmission gate 11 is added after a transmission gate 10, the output end of the transmission gate 10 is connected with the input end of the transmission gate 11, AND the control end of the transmission gate 11 inputs the over-temperature protection signal OTP _ L, a transmission gate 12 is also added, the input end of the transmission gate 12 inputs an over-temperature timer Td _ OTP, AND Td _ OTP is 0, the output end of the transmission gate is connected with a rest timing module, AND the control end of the transmission gate 12 inputs an over-temperature protection signal OTP _ L.

When the converter normally works, the over-temperature protection signal OTP _ L is at a high level, at this time, the transmission gate 11 is turned on, the transmission gate 12 is turned off, and the converter performs normal short-circuit and overcurrent determination.

When the temperature reaches the set temperature (for example, 140 ℃, the temperature is not limited to the highest over-temperature protection point of the chip), the over-temperature protection signal OTP _ L is turned down and becomes low level, the transmission gates 9 and 11 are both closed, the transmission gate 12 is opened, the Td _ OTP timing is performed, as Td _ OTP is set to zero, the rest timing Tsleep is directly started without timing at this time, no matter how long the Td _ osp or Td _ ocp timing lasts at this time, the system directly enters the protection state, the rest timing Tsleep is performed, the heat accumulated before is dissipated, until the temperature reaches the set temperature value, the OTP _ L is turned back to high level, the transmission gate 11 is turned on, and the determination and timing process described in the first embodiment is resumed.

The embodiment also requires that the overcurrent timing time is set to be larger than the short circuit timing time to achieve the purpose of the invention. In addition, this embodiment sets the over-temperature timing time to zero and can avoid accumulating more heat during the over-temperature timing, sets the over-temperature timing time to zero and namely the converter directly starts rest timing when the over-temperature appears, can also dispel the heat that has accumulated before like this more fast to further improve the reliability of converter.

The foregoing is merely a preferred embodiment of the present invention, and it should be noted that the above-described preferred embodiment should not be construed as limiting the present invention. For those skilled in the art, it is obvious that several equivalent changes, modifications and decorations can be made without departing from the spirit and scope of the present invention, and these equivalent changes, modifications and decorations should be regarded as the protection scope of the present invention, which is not described in detail herein without departing from the embodiment, and the protection scope of the present invention should be determined by the scope of the appended claims.