Enable switch control circuit

文档序号:1326388 发布日期:2020-07-14 浏览:18次 中文

阅读说明:本技术 一种使能开关控制电路 (Enable switch control circuit ) 是由 范喆 张宏科 于 2020-03-31 设计创作,主要内容包括:本发明公开了一种使能开关控制电路,包括电源VCC1、比较器U2和三极管V1;当使能禁止端INH接地,且使能信号输入端EN接地或悬空时,三极管V1处于高阻状态,使能开关控制电路为关闭状态;当使能禁止端INH悬空,且使能信号输入端EN悬空时,三极管V1处于高阻状态,使能开关控制电路为关闭状态;当使能禁止端INH悬空,且使能信号输入端EN接地时,三极管V1处于导通状态,使能开关控制电路为开启状态。当使能开关控制电路开启时,则该使能开关控制电路将输出确定的低电平,从而使开关转换过程不会产生抖动,提高了可靠性。(The invention discloses an enable switch control circuit, which comprises a power supply VCC1, a comparator U2 and a triode V1, wherein the power supply VCC1 is connected with the comparator U2; when the enable inhibit terminal INH is grounded and the enable signal input terminal EN is grounded or suspended, the triode V1 is in a high-impedance state, and the enable switch control circuit is in a closed state; when the enable inhibit terminal INH is suspended and the enable signal input terminal EN is suspended, the triode V1 is in a high-impedance state, and the enable switch control circuit is in a closed state; when the enable disable terminal INH is floating and the enable signal input terminal EN is grounded, the transistor V1 is in a conducting state, and the enable switch control circuit is in an on state. When the enabling switch control circuit is started, the enabling switch control circuit outputs a determined low level, so that the switching process cannot generate jitter, and the reliability is improved.)

1. An enable switch control circuit is characterized by comprising a power supply VCC1, a comparator U2 and a triode V1;

the inverting input end of the comparator U2 is connected with the enabling signal input end EN through a resistor R6, the inverting input end is connected with the positive power supply end through a resistor R2, and the enabling signal input end EN is connected with the negative power supply end of the comparator U2 through a resistor R9; the non-inverting input end of the comparator U2 is connected with an enabling forbidding end INH, the non-inverting input end is connected with the power supply negative end of the comparator U2 through a capacitor C2, the enabling forbidding end INH is connected with the power supply positive end through a resistor R3, the enabling forbidding end INH is connected with the power supply negative end through a resistor R8, and the power supply positive end and the power supply negative end are connected through a capacitor C1; the signal output end of the comparator U2 is grounded GND1, the signal output end is connected with the base electrode of a triode V1 through a resistor R5, a resistor R7 is connected between the base electrode and the emitter electrode of the triode V1, and the collector electrode of a triode V1 serves as the output end of the enabling switch control circuit;

when the enable inhibit terminal INH is grounded and the enable signal input terminal EN is grounded or suspended, the triode V1 is in a high-impedance state, and the enable switch control circuit is in a closed state; when the enable inhibit terminal INH is suspended and the enable signal input terminal EN is suspended, the triode V1 is in a high-impedance state, and the enable switch control circuit is in a closed state; when the enable disable terminal INH is floating and the enable signal input terminal EN is grounded, the transistor V1 is in a conducting state, and the enable switch control circuit is in an on state.

2. The enable switch control circuit of claim 1, wherein a diode D1 is connected in series between the signal output terminal of the comparator U2 and the resistor R5.

3. The enabling switch control circuit of claim 2, wherein the diode D1 is a fast recovery diode, and the forward conduction voltage drop is greater than 1V.

4. The enable switch control circuit according to claim 1, wherein the signal output terminal of the comparator U2 is connected to pin 1 of an optocoupler U1, pin 2 of the optocoupler U1 is connected to GND1, pin 3 of the optocoupler U1 is connected to GND2, pin 4 of the optocoupler U1 is connected to a resistor R5, and pin 4 of the optocoupler U1 is connected to a power supply VCC2 through a resistor R4.

5. The enable switch control circuit of claim 4, wherein pin 1 of the optocoupler U1 is connected to a power supply VCC1 through a resistor R1.

6. The enabling switch control circuit according to claim 4, wherein the optocoupler U1 is a high-speed switch type optocoupler.

7. The enable switch control circuit of claim 1, wherein the resistance of transistor V1 is greater than or equal to 1 Μ Ω when transistor V1 is in a high impedance state.

8. The enabling switch control circuit of claim 1, wherein the transistor V1 is an NPN-type low power transistor.

9. The enable switch control circuit of claim 1, wherein the single voltage supply of the power source VCC1 is 2-36V, and the dual voltage supply is ± 1V to ± 18V.

Technical Field

The invention belongs to the field of enabling switches, and relates to an enabling switch control circuit.

Background

The existing enabling switch control circuit conventionally uses means such as a relay, a program-controlled mechanical switch, a manual mechanical switch, a triode or a field effect transistor and the like to realize the switch control of the circuit. The traditional enabling switch control circuit is complex in circuit structure, and the switch can shake instantly, so that the requirements of high reliability and low cost of enabling switch control on a product at present cannot be met.

Disclosure of Invention

The present invention is directed to overcome the above-mentioned shortcomings of the prior art, and to provide an enable switch control circuit, which reduces the circuit cost, and avoids the jitter generated in the switching moment, thereby improving the reliability.

In order to achieve the purpose, the invention adopts the following technical scheme to realize the purpose:

an enable switch control circuit comprises a power supply VCC1, a comparator U2 and a triode V1;

the inverting input end of the comparator U2 is connected with the enabling signal input end EN through a resistor R6, the inverting input end is connected with the positive power supply end through a resistor R2, and the enabling signal input end EN is connected with the negative power supply end of the comparator U2 through a resistor R9; the non-inverting input end of the comparator U2 is connected with an enabling forbidding end INH, the non-inverting input end is connected with the power supply negative end of the comparator U2 through a capacitor C2, the enabling forbidding end INH is connected with the power supply positive end through a resistor R3, the enabling forbidding end INH is connected with the power supply negative end through a resistor R8, and the power supply positive end and the power supply negative end are connected through a capacitor C1; the signal output end of the comparator U2 is grounded GND1, the signal output end is connected with the base electrode of a triode V1 through a resistor R5, a resistor R7 is connected between the base electrode and the emitter electrode of the triode V1, and the collector electrode of a triode V1 serves as the output end of the enabling switch control circuit;

when the enable inhibit terminal INH is grounded and the enable signal input terminal EN is grounded or suspended, the triode V1 is in a high-impedance state, and the enable switch control circuit is in a closed state; when the enable inhibit terminal INH is suspended and the enable signal input terminal EN is suspended, the triode V1 is in a high-impedance state, and the enable switch control circuit is in a closed state; when the enable disable terminal INH is floating and the enable signal input terminal EN is grounded, the transistor V1 is in a conducting state, and the enable switch control circuit is in an on state.

Preferably, a diode D1 is connected in series between the signal output terminal of the comparator U2 and the resistor R5.

Further, the diode D1 adopts a fast recovery diode, and the forward conduction voltage drop is greater than 1V.

Preferably, a signal output end of the comparator U2 is connected with a pin 1 of the optical coupler U1, a pin 2 of the optical coupler U1 is connected with a GND1, a pin 3 of the optical coupler U1 is connected with a GND2, a pin 4 of the optical coupler U1 is connected with a resistor R5, and a pin 4 of the optical coupler U1 is connected with a power supply VCC2 through a resistor R4.

Further, pin 1 of the optocoupler U1 is connected with a power supply VCC1 through a resistor R1.

Further, the optical coupler U1 adopts a high-speed switch type optical coupler.

Preferably, when the transistor V1 is in a high-impedance state, the resistance of the transistor V1 is greater than or equal to 1M Ω.

Preferably, the transistor V1 is an NPN-type low-power transistor.

Preferably, the single voltage of the power supply VCC1 is 2-36V, and the dual power supply is + -1V- + -18V.

Compared with the prior art, the invention has the following beneficial effects:

the invention controls the on or off of the enabling switch control circuit by enabling the inhibiting end INH and the signal input end EN to be in different states of grounding or suspending, realizes the switch enabling and inhibiting the switch enabling functions by fewer components, saves the cost, stabilizes the level of the comparator U2 and enables the level of the non-inverting input end of the comparator U2 to be slower than the power-on speed of the inverting input end at the initial power-on speed by the capacitor C2, so that the enabling switch control circuit outputs a determined low level when the enabling switch control circuit is started, thereby preventing the switch conversion process from generating jitter and improving the reliability.

Further, a diode D1 is connected in series between the comparator U2 and the resistor R5, so that the circuit immunity is improved, and the malfunction of the triode V1 due to the fact that the front section of the triode V1 is interfered by a spike is prevented.

Further, an optocoupler U1 is arranged between the comparator U2 and the triode V1, so that the comparator U2 and the triode V1 are isolated, and the anti-interference performance of the triode V1 is improved.

Further, a resistor R1 is arranged between the optocoupler U1 and the power supply VCC1, so that the primary current of the optocoupler U1 is limited in a safe working area.

Drawings

FIG. 1 is a circuit diagram of the present invention.

Detailed Description

The invention is described in further detail below with reference to the accompanying drawings:

as shown in fig. 1, the enable switch control circuit according to the present invention includes a power supply VCC1, a power supply VCC2, an optocoupler U1, a comparator U2, a capacitor C1, a capacitor C2, a diode D1, resistors R1-R9, and a transistor V1.

The comparator U2 is used for receiving the level change of the input end so as to reflect the level change of the output end to form a required control level signal, the inverting input end of the comparator U2 is connected with the enabling signal input end EN through a resistor R6, the inverting input end is connected with the positive power supply end through a resistor R2, and the enabling signal input end EN is connected with the negative power supply end of the comparator U2 through a resistor R9; resistors R2, R6, and R9, one level higher than the reference voltage and the other level lower than the reference voltage, are generated at the inverting input terminal of the comparator U2.

The non-inverting input end of the comparator U2 is connected with the enable inhibiting end INH, the non-inverting input end is connected with the power supply negative end of the comparator U2 through a capacitor C2, the enable inhibiting end INH is connected with the power supply positive end through a resistor R3, and the enable inhibiting end INH is connected with the power supply negative end through a resistor R8. Resistors R3 and R8 generate two levels, one reference voltage and the other zero voltage, at the non-inverting input end of the comparator U2; when the enable signal input end EN is floating, the level of the resistors R2 and R6 is higher than that of the resistors R3 and R8, and when the enable signal input end EN is grounded, the level of the resistors R2 and R6 is lower than that of the resistors R3 and R8.

The power supply positive terminal and the power supply negative terminal are connected through a capacitor C1, and the capacitor C1 is used as a power supply filter capacitor of the comparator U2.

The signal output end of the comparator U2 is grounded GND1, and the signal output end is connected with a power supply VCC1 through a resistor R1. The resistor R1 limits the primary current of the optocoupler U1 in a safe working area. The single voltage of the power supply VCC1 is 2-36V, the double power supply is + -1V- + -18V, so that the comparator U2 can work under the ultra-low power supply voltage.

The signal output end is connected with the base electrode of the triode V1 through a resistor R5, a resistor R7 is connected between the base electrode and the emitting electrode of the triode V1, and the collecting electrode of the triode V1 serves as the output end EA of the enabling switch control circuit. The triode V1 is used as a final executive device of the enabling switch control circuit, the triode V1 is an NPN type low-power triode which does not require amplification factors, the model of the triode V1 is MMBT4403, and the parameters are as follows: vcemax is-40V, Icmax is-600 mA, and PDmax is 0.225W. Resistor R5 limits the base current of transistor V1 and resistor R7 provides a bleed path between the base and emitter of transistor V1.

A diode D1 is connected in series between the signal output end of the comparator U2 and the resistor R5. Diode D1 is used for improving the circuit noise immunity, prevents triode V1 because the anterior segment receives the spine interference and the malfunction, and diode D1 chooses for use fast recovery diode, specifically is the Schottky diode, and forward conduction voltage drop is greater than 1V, and the model is 10MQ060N (V1H), and diode D1's parameter is: IF is 1A, VR is 60V, and VF is 0.57V.

The signal output end of the comparator U2 is connected with a pin 1 of an optical coupler U1, a pin 2 of the optical coupler U1 is connected with a ground GND1, a pin 3 of the optical coupler U1 is connected with a ground GND2, a pin 4 of the optical coupler U1 is connected with a resistor R5, and a pin 4 of the optical coupler U1 is connected with a power supply VCC2 through a resistor R4. The resistor R4 is used for limiting the current of the auxiliary side of the optocoupler U1 in a safe working area, and the optocoupler U1 adopts a high-speed switch type optocoupler, so that the switching speed is increased, and the real-time performance of adjustment is guaranteed.

Capacitors C1 and C2 were both 0805 surface mount package devices.

The resistors except R7 and R8 are 1W, and the rest resistors are 0.25W surface-mounted packaging devices, and the resistors R7, R8, R9 and R10 are capable of ensuring that the current flowing into the optocoupler U1 can enable the comparator U2 to normally work and keep at least more than 1 mA.

The enabling switch control circuit enables the control switch by generating two determined control states, when the EA end is high-resistance, namely the resistance of a triode V1 is more than or equal to 1M omega, the enabling switch control circuit is defined to be closed, and when the EA end is zero level, the enabling switch control circuit is defined to be opened.

When the enable inhibit terminal INH is grounded, the enable switch control circuit is completely inhibited from functioning, and is in an off state no matter how the state of the signal input terminal EN changes; when the INH enable inhibit terminal INH is empty, the switch function of the enable switch control circuit is determined by the state of the signal input terminal EN. See table 1 for details.

Table 1 enable switch truth table

Therefore, when the enable inhibit terminal INH is grounded and the enable signal input terminal EN is grounded or suspended, the transistor V1 is in a high-impedance state, and the enable switch control circuit is in an off state; when the enable inhibit terminal INH is suspended and the enable signal input terminal EN is suspended, the triode V1 is in a high-impedance state, and the enable switch control circuit is in a closed state; when the enable disable terminal INH is floating and the enable signal input terminal EN is grounded, the transistor V1 is in a conducting state, and the enable switch control circuit is in an on state.

During initial power-on, because the capacitor C2 is connected in parallel to the two ends of the resistor R8, the level of the comparator U2 is guaranteed to be stable, and the level at the non-inverting input end of the comparator U2 is slower than the power-on speed at the inverting input end of the comparator U2, so that when the signal input end EN and the enable disable end INH are both powered on in a floating state, the enable switch control circuit outputs a certain low level, thereby preventing the switching process from generating jitter and improving the reliability.

Due to the use of the diode D1, the noise immunity of the enabling switch control circuit is greatly improved, so that no switch jitter occurs when the circuit is disturbed by the outside.

The contents are only for illustrating the technical idea of the invention, and the protection scope of the invention is not limited thereby, and any modification made on the basis of the technical idea of the invention falls within the protection scope of the claims of the invention.

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