Rapid heat treatment method for wafer control wafer

文档序号:1340014 发布日期:2020-07-17 浏览:28次 中文

阅读说明:本技术 一种晶圆控片的快速热处理方法 (Rapid heat treatment method for wafer control wafer ) 是由 温育杰 叶李欣 吴小贤 蒋磊 于 2019-06-13 设计创作,主要内容包括:本发明公开了一种晶圆控片的快速热处理方法,涉及半导体器件制造技术领域。本方法至少包括以下步骤:提供第一晶圆控片;对所述第一晶圆控片进行第一次快速热处理;对经过第一次快速热处理后的所述第一晶圆控片进行第二次快速热处理,以取得第一电阻值趋势曲线;依据所述第一电阻值趋势曲线,取得所述预设电阻值趋势曲线;依据所述第一电阻值趋势曲线及预设电阻值趋势曲线,取得所述第一晶圆控片的标准快速热处理温度条件。本发明通过对晶圆控片进行两阶段的快速热处理,解决了现有技术所导致的晶圆控片表面边缘区域的电阻值再现性差、晶圆控片表面电阻值偏离目标值的问题。(The invention discloses a rapid heat treatment method of a wafer control wafer, and relates to the technical field of semiconductor device manufacturing. The method at least comprises the following steps: providing a first wafer control wafer; carrying out first rapid thermal treatment on the first wafer control wafer; performing a second rapid thermal processing on the first wafer control wafer after the first rapid thermal processing to obtain a first resistance value trend curve; obtaining the preset resistance value trend curve according to the first resistance value trend curve; and obtaining the standard rapid thermal processing temperature condition of the first wafer control wafer according to the first resistance value trend curve and a preset resistance value trend curve. The invention solves the problems of poor resistance reproducibility of the edge area of the surface of the wafer control wafer and deviation of the surface resistance of the wafer control wafer from a target value in the prior art by carrying out two-stage rapid heat treatment on the wafer control wafer.)

1. A rapid thermal processing method of a wafer control wafer is characterized by at least comprising the following steps:

providing a first wafer control wafer;

carrying out first rapid thermal treatment on the first wafer control wafer;

performing a second rapid thermal processing on the first wafer control wafer after the first rapid thermal processing to obtain a first resistance value trend curve;

obtaining a preset resistance value trend curve according to the first resistance value trend curve;

and obtaining the standard rapid thermal processing temperature condition of the first wafer control wafer according to the first resistance value trend curve and the preset resistance value trend curve.

2. The method as claimed in claim 1, wherein the annealing temperature used in the first rapid thermal process is 900-1050 ℃.

3. The method as claimed in claim 1, wherein the annealing time for the first rapid thermal processing is 1-20 sec.

4. The method as claimed in claim 1, wherein the first rapid thermal processing is performed while the surface of the first wafer control wafer exhibits the following temperature distribution: the temperature of the surface of the first wafer control wafer is increased from the central area to the edge area.

5. The method as claimed in claim 1, wherein the annealing temperature used in the second rapid thermal process is 900-1100 ℃.

6. The method as claimed in claim 1, wherein the second rapid thermal processing is performed while the surface of the first wafer has the following temperature distribution: the temperature of the surface of the first wafer control wafer decreases from the central area to the edge area.

7. The method as claimed in claim 1, wherein the second rapid thermal processing divides the surface of the first wafer into a plurality of concentric circle regions on an average according to the distance from the center point of the wafer.

8. The method as claimed in claim 7, wherein obtaining the standard RTP temperature condition of the first wafer control wafer according to the first resistance trend curve and the predetermined resistance trend curve comprises: and respectively adjusting the temperature of the plurality of concentric circle areas on the surface of the first wafer control wafer according to the first resistance value trend curve and the preset resistance value trend curve, so that the first resistance value trend curve is superposed with the preset resistance value trend curve, and the corresponding temperature condition of each area is the standard rapid thermal treatment temperature condition of the first wafer control wafer.

9. The method as claimed in claim 1, further comprising performing a rapid thermal anneal on the second wafer according to the standard rapid thermal processing temperature condition to verify the standard rapid thermal processing temperature condition.

10. The method as claimed in claim 9, wherein the verification method comprises:

providing a second wafer control wafer;

performing rapid thermal processing on the second wafer control wafer according to the standard rapid thermal processing temperature condition to obtain a second resistance value trend curve of the second wafer control wafer after the rapid thermal processing;

setting a standard resistance value trend curve of the wafer control wafer;

comparing the second resistance trend curve of the second wafer with the standard resistance trend curve of the wafer to prove that the second resistance trend curve obtained by the standard rapid thermal processing temperature condition is convergent with the standard resistance trend curve.

Technical Field

The invention relates to the technical field of semiconductor device manufacturing, in particular to a rapid heat treatment method of a wafer control wafer.

Background

Rapid Thermal Annealing (RTA) is a conventional technique in semiconductor processing and is generally used to activate doping elements in semiconductor materials and restore the amorphous structure resulting from ion implantation to a complete lattice structure. In the manufacturing of a part of types of semiconductor devices, the thermal budgets required by the areas in the surface of a wafer are different in the rapid thermal annealing process, and the wafer after the rapid thermal annealing is easy to have the problem that the heating matching degree of the areas in the surface is not proper.

The conventional rapid thermal annealing technology generally adopts the resistance value of a wafer control wafer to adjust the working condition of the rapid thermal annealing equipment cavity. However, the conventional method for reducing the annealing temperature of the edge region of the surface of the wafer control wafer has the problems of poor reproducibility of the resistance value of the surface region of the wafer control wafer and deviation of the resistance value from a target value, and the quality of the wafer control wafer after heat treatment is seriously affected.

Disclosure of Invention

In view of the above problems, an object of the present invention is to provide a rapid thermal processing method for a wafer control wafer, which performs a two-stage rapid thermal processing on the wafer control wafer, so as to solve the problems of the prior art, such as poor reproducibility of the resistance value of the edge region of the wafer control wafer surface and deviation of the resistance value of the wafer control wafer surface from a target value.

In order to solve the technical problems, the invention is realized by the following technical scheme:

the invention relates to a rapid heat treatment method of a wafer control wafer, which at least comprises the following steps:

providing a first wafer control wafer;

carrying out first rapid thermal treatment on the first wafer control wafer;

performing a second rapid thermal processing on the first wafer control wafer after the first rapid thermal processing to obtain a first resistance value trend curve;

obtaining a preset resistance value trend curve according to the first resistance value trend curve;

and obtaining the standard rapid thermal processing temperature condition of the first wafer control wafer according to the first resistance value trend curve and the preset resistance value trend curve.

As a further improvement of the scheme, the annealing temperature adopted in the first rapid heat treatment is 900-1050 ℃.

As a further improvement of the above, the annealing time used in the first rapid thermal processing is 1 to 20 sec.

As a further improvement of the above solution, the surface of the first wafer control wafer in the first rapid thermal processing exhibits the following temperature distribution state: the temperature of the surface of the first wafer control wafer is increased from the central area to the edge area.

As a further improvement of the scheme, the annealing temperature adopted in the second rapid heat treatment is 900-1100 ℃.

As a further improvement of the above solution, the surface of the first wafer control wafer in the second rapid thermal treatment exhibits the following temperature distribution state: the temperature of the surface of the first wafer control wafer decreases from the central area to the edge area.

As a further improvement of the above solution, in the second rapid thermal processing, the surface of the first wafer control wafer is divided into a plurality of concentric circle regions according to the distance from the center point of the wafer control wafer.

Further, obtaining the standard rapid thermal processing temperature condition of the first wafer control wafer according to the first resistance trend curve and the preset resistance trend curve comprises: and respectively adjusting the temperature of the plurality of concentric circle areas on the surface of the first wafer control wafer according to the first resistance value trend curve and the preset resistance value trend curve, so that the first resistance value trend curve is superposed with the preset resistance value trend curve, and the corresponding temperature condition of each area is the standard rapid thermal treatment temperature condition of the first wafer control wafer.

As a further improvement of the above solution, the method further includes performing rapid thermal annealing on the second wafer control wafer according to the standard rapid thermal processing temperature condition to verify the standard rapid thermal processing temperature condition.

Further, the verification method at least comprises:

providing a second wafer control wafer;

performing rapid thermal processing on the second wafer control wafer according to the standard rapid thermal processing temperature condition to obtain a second resistance value trend curve of the second wafer control wafer after the rapid thermal processing;

setting a standard resistance value trend curve of the wafer control wafer;

comparing the second resistance trend curve of the second wafer with the standard resistance trend curve of the wafer to prove that the second resistance trend curve obtained by the standard rapid thermal processing temperature condition is convergent with the standard resistance trend curve. The invention carries out two-stage rapid thermal treatment on a first wafer control wafer, obtains a first resistance value trend curve through second rapid thermal treatment on the basis of the first rapid thermal treatment, respectively controls the temperature of each area of the first wafer control wafer, and obtains a preset resistance value trend curve on the basis of the first resistance value trend curve, wherein when the first resistance value trend curve is basically coincident with the preset resistance value trend curve, the corresponding temperature condition of each area is the standard rapid thermal treatment temperature condition. The second wafer is rapidly heat-treated according to the standard rapid heat-treatment temperature condition, so that the problems of poor resistance reproducibility of each area on the surface and deviation of the resistance value from the standard value after the edge of the second wafer is cooled in the prior art can be solved.

Of course, it is not necessary for any product in which the invention is practiced to achieve all of the above-described advantages at the same time.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a flowchart illustrating a rapid thermal processing method for a first wafer control wafer according to an embodiment;

FIG. 2 is a first resistance trend graph of the first wafer control wafer of FIG. 1 after a first rapid thermal process;

FIG. 3 is a temperature control area division diagram of the surface of the first wafer control wafer in FIG. 1;

FIG. 4 is a graph illustrating a trend of the predetermined resistance of FIG. 1;

FIG. 5 is a graph comparing trend curves of first resistance values before and after temperature adjustment of temperature control regions on the surface of the first wafer control wafer in FIG. 3;

FIG. 6 is a comparison graph of a trend curve of the first resistance value after the temperature of each temperature control area on the surface of the first wafer control wafer is adjusted and a trend curve of the preset resistance value in FIG. 5;

FIG. 7 is a flow chart illustrating the verification of the standard rapid thermal processing temperature conditions for the second wafer control wafer in the example;

FIG. 8 is a graph comparing a trend curve of a second resistance of the second wafer of FIG. 5 with a trend curve of a standard resistance;

FIG. 9 is a graph illustrating a trend of a second resistance obtained by decreasing the temperature of the second wafer and decreasing the temperature of the edge to 6 ℃ in another embodiment;

FIG. 10 is a graph illustrating a trend of a second resistance obtained by decreasing the temperature of the second wafer and decreasing the temperature of the edge to 8 ℃ in another embodiment;

FIG. 11 is a graph showing a trend curve of a second resistance of a second wafer under the standard rapid thermal processing temperature conditions for different devices according to another embodiment.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

The invention provides a rapid heat treatment method of a wafer control wafer, wherein the wafer control wafer can be a wafer control wafer made of all semiconductor materials such as a silicon wafer control wafer, a sapphire wafer control wafer, a silicon carbide wafer control wafer and the like, in the embodiment, the silicon wafer control wafer is taken as an example, for example, the silicon wafer control wafer with various applicable semiconductor substrates of 2 inches, 4 inches, 6 inches, 8 inches or 12 inches and the like is obtained by ion implantation on the basis of a silicon wafer.

Ion implantation is a process of implanting charged and energetic particles into a wafer. The main benefits of ion implantation over diffusion processes are more accurate control of impurity doping, repeatability and lower process temperatures. The ion implantation process is to accelerate ions in a vacuum system through an electric field and change the movement direction of the ions by utilizing a magnetic field, so that the ions are controlled to be implanted into the wafer at certain energy, and a surface layer (i.e. an implantation layer) with special properties is formed in a selected area, thereby achieving the purpose of doping. Its main side effect is the semiconductor lattice fracture or damage caused by ion collisions. To remove this damage, the wafer must be heat treated at an appropriate time and temperature to remove lattice defects and internal stresses in the wafer, restore lattice integrity, and allow the implanted dopant atoms to diffuse to substitutional sites, resulting in electrical properties.

Rapid thermal processing may be used to activate the doping elements in the semiconductor material and restore the amorphous structure resulting from ion implantation to a complete lattice structure. In the invention, the wafer control wafer after ion implantation is subjected to heat treatment by adopting a rapid heat treatment method so as to eliminate lattice defects and internal stress in the wafer control wafer, so that implanted doping atoms are diffused to a substitution position, and the wafer control wafer with high-quality electrical characteristics is obtained.

In the manufacturing of a part of types of semiconductor devices, the thermal budgets required by the areas in the surface of a wafer are different in the rapid thermal annealing process, and the wafer after the rapid thermal annealing is easy to have the problem that the heating matching degree of the areas in the surface is not proper.

The existing rapid thermal annealing technology usually adopts the resistance value of a wafer control wafer to adjust the working condition of a cavity of rapid thermal annealing equipment, but the existing commonly used method for reducing the annealing temperature of the edge area of the surface of the wafer can generate the problems of poor resistance value reproducibility of the surface area of the wafer and deviation of the resistance value from a target value, thereby seriously influencing the quality of the wafer after heat treatment. For reducing the heat treatment temperature of the surface edge area of the wafer control wafer, the surface edge area of the wafer control wafer can be directly cooled, so that the thermal budget of the surface edge area of the wafer control wafer is reduced, but the resistance value reproducibility of the surface edge area of the wafer control wafer is poor due to unstable temperature control of the surface edge area of the wafer control wafer, and the resistance value deviates from a target resistance value.

For reducing the heat treatment temperature of the surface edge area of the wafer control wafer, a decreasing cooling method can be adopted, namely, the temperature is decreased gradually from the central area of the surface of the wafer control wafer to the edge area of the surface of the wafer control wafer, so that the thermal budget of the edge area of the surface of the wafer control wafer is reduced, but the state of a rapid heat treatment chamber is not constant, so that the heat treatment state is not constant. In addition, the region corresponding to the temperature adjustment also has the problem that the resistance value deviates from the target value, and the closer to the edge region of the wafer control wafer surface, the more serious the resistance value deviates from the target value.

The invention provides a rapid heat treatment method of a wafer control wafer, which adopts a two-stage rapid heat treatment method for the wafer control wafer after ion implantation, reduces the heat treatment temperature of the edge area of the surface of the wafer control wafer, and simultaneously can avoid the problem that the resistance value of the wafer control wafer deviates from a target value.

Referring to fig. 1, a rapid thermal processing method for a wafer control wafer according to the present invention at least includes the following steps:

in this embodiment, in step S101, first, a first wafer control wafer is provided, and in step S102, a first rapid thermal process is performed on the first wafer control wafer, where the first wafer control wafer is consistent with wafer control wafer parameters used in production, an annealing temperature used in the first rapid thermal process is 900-; the gas flow is 10-20slm, for example 15 slm. And ensuring that the surface of the first wafer control wafer presents a temperature distribution state with the temperature rising from the central area to the edge area in the first rapid thermal treatment.

Referring to fig. 1 and fig. 2, it can be seen from the resistance value detection of the first wafer control wafer after the first rapid thermal processing that the temperature distribution in the first rapid thermal processing shows a state that the temperature of the surface of the first wafer control wafer increases from the central region to the edge region, and the detected resistance value shows a trend that the surface of the first wafer control wafer gradually decreases from the central region to the edge region. This is because the intrinsic excitation in the first wafer control wafer starts to act at a high temperature of the heat treatment, the carrier concentration in the first wafer control wafer increases exponentially, and although the mobility at this time still decreases with an increase in temperature, the effect of this decrease in mobility is not as strong as the effect of the increase in carrier concentration, so the total effect is that the resistance decreases with an increase in heat treatment temperature.

In step S103, a second rapid thermal process is performed on the first wafer control wafer after the first rapid thermal process, a resistance detection is performed on the first wafer control wafer after the second rapid thermal process, and a first resistance trend curve is obtained, where a resistance value corresponding to the first resistance trend curve is a superimposed value of a resistance value of the first wafer control wafer after the first rapid thermal process and a resistance value of the first wafer control wafer after the second rapid thermal process, and is obtained based on the resistance trend curve of the first wafer control wafer after the first rapid thermal process. The resistance trend curve is a curve formed by connecting a plurality of points from near to far on the surface of the wafer control wafer according to the distance from the center point of the wafer control wafer and measuring the resistance of the corresponding point.

In this embodiment, the annealing temperature used for the second rapid thermal treatment is 900-; the gas flow is 10-30slm, for example 20 slm. And in the second rapid thermal treatment, the surface of the first wafer control wafer is in a temperature distribution state with the temperature decreasing from the central area to the edge area.

Referring to fig. 3, 4 and 5, the surface of the first wafer control wafer is divided into a plurality of concentric circular areas, for example, 7 concentric circular areas, which are respectively marked as T1-T7 areas, on the basis of the distance from the center point, the curve that is shown after the resistance values on the curve are adjusted to the same horizontal line is set as a preset resistance value trend curve in step S104, since the resistance value of the first wafer control wafer changes along with the temperature change, according to the first resistance value trend curve and the preset resistance value trend curve, in step S105, the temperature of the T1-T7 area is respectively adjusted on the basis of the known heat treatment temperature, so that the first resistance value trend curve substantially coincides with the preset resistance value trend curve, and the adjusted temperature is ensured to still keep the temperature of the center area high, the temperature distribution state of the edge region with low temperature, and the temperature of the T1-T7 region after adjustment, which is obtained at this time, is the standard rapid thermal processing temperature condition.

Referring to fig. 5 and 6, in the present embodiment, the following thermal treatment temperature adjustment manners are adopted to respectively adjust the temperature of the T1-T7 region in the second rapid thermal treatment, such as +2 ℃ in the T1 region, +1 ℃ in the T2 region, +0 ℃ in the T3 region, +0 ℃ in the T4 region, +1 ℃ in the T5 region, +1.5 ℃ in the T6 region, and +3 ℃ in the T7 region. Fig. 5 shows that curve 1 is a resistance trend curve obtained by the first wafer control wafer before the zone temperature control adjustment, curve 2 is a resistance trend curve obtained by the first wafer control wafer after the zone temperature control adjustment, and it can be seen from fig. 5 that the resistance trend curve changes by adjusting the heat treatment temperature in the zone T1-T7, the portion of the original resistance value that originally increases decreases by increasing the temperature, and the portion of the original resistance value that originally decreases by decreasing the temperature increases by decreasing the temperature, as shown in fig. 6, the resistance value on the original first resistance trend curve (curve 2) finally tends to the preset resistance trend curve (curve 1), and the corresponding adjusted heat treatment temperature is the standard rapid heat treatment temperature condition.

Referring to fig. 7 and 8, the method of the present embodiment further includes verifying the second wafer according to the standard rapid thermal processing temperature condition, where the second wafer is a wafer control wafer commonly used in production and has all parameters consistent with those of the first wafer control wafer. The method for verifying the second wafer control wafer at least comprises the following steps: in step S106, a second wafer is provided; in step S107, performing a rapid thermal process on the second wafer according to the standard rapid thermal process temperature condition to obtain a second resistance trend curve of the second wafer after the rapid thermal process; in step S108, a trend curve of the standard resistance of the wafer control wafer is set; in step S109, the second resistance trend curve of the second wafer is compared with the standard resistance trend curve of the wafer to verify that the second resistance trend curve obtained by the standard rapid thermal processing temperature condition is converged with the standard resistance trend curve, which proves that the standard rapid thermal processing temperature condition substantially solves the problem of the resistance deviating from the standard value. If the two curves deviate more, the temperatures of the concentric circle regions on the first wafer control wafer need to be readjusted according to the method, and the standard rapid thermal processing temperature condition is obtained again. As shown in fig. 8, a curve 1 in the graph is a trend curve of the second resistance value obtained after the second wafer control wafer is verified in the present embodiment, and a curve 2 is a trend curve of the standard resistance value of the second wafer control wafer, as can be seen from the graph, the two curves are substantially coincident with each other, which proves that the standard rapid thermal processing temperature condition obtained in the present embodiment is suitable.

The standard rapid thermal treatment temperature condition obtained by the method realizes the cooling of the edge area of the second wafer control wafer, and simultaneously can not cause the problem that the resistance value deviates from the standard resistance value. The method can also be used for cooling areas with different amplitudes in the second rapid heat treatment process, and only the conditions of the first rapid heat treatment need to be adjusted.

Referring to fig. 9, in another embodiment, during the second rapid thermal processing, the known thermal processing temperature of each region is adjusted by decreasing the temperature of each region, the maximum temperature decreasing range of the wafer edge is 6 ℃, and the obtained second resistance trend curve is substantially consistent with the standard resistance trend curve of the second wafer in fig. 8, i.e., curve 2, and conforms to the variation law of the resistance value in the second wafer, which proves that the method of the present invention can achieve a larger temperature decrease of the edge of the second wafer without causing the problem of the deviation of the resistance value from the standard resistance value.

Referring to fig. 10, in another embodiment, during the second rapid thermal process, the known thermal processing temperature is adjusted by decreasing the temperature in each region, the maximum temperature decrease range of the wafer edge is 8 ℃, and the obtained second resistance trend curve is substantially consistent with the standard resistance trend curve, i.e., curve 2, of the second wafer in fig. 8, and conforms to the variation law of the resistance value in the second wafer, which proves that the method of the present invention can achieve a greater temperature decrease of the edge of the second wafer without causing the deviation of the resistance value from the standard resistance value.

Referring to fig. 11, in another embodiment, the standard rapid thermal processing temperature condition verified on one device may be adopted, the second resistance trend curve of the second wafer is verified on a plurality of devices, for example, 3 devices, and the second resistance trend curves of the second wafer obtained by the 3 devices are compared, and the obtained three second resistance trend curves substantially coincide with each other, which proves that the obtained standard rapid thermal processing temperature condition is common to a plurality of production devices.

The preferred embodiments of the invention disclosed above are intended to be illustrative only. The preferred embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention. The invention is limited only by the claims and their full scope and equivalents.

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