阅读说明：本技术 防止开关变换器双边共通的控制方法、电路及变换器 (Control method and circuit for preventing bilateral common of switch converter and converter ) 是由 张程龙 郭春明 于 2020-03-16 设计创作，主要内容包括：本申请实施例公开一种防止开关变换器双边共通的控制方法、电路及变换器。所述变换器包括初级开关器件和次级开关器件。所述控制方法包括：检测所述开关变换器的初级的实时电流；基于所述实时电流的大小对所述初级开关器件的导通延时进行调整；若所述实时电流的大小为大,则增大所述初级开关器件的导通延时；若所述实时电流的大小为小,则减小所述初级开关器件的导通延时。所述电路用于执行所述控制方法。当动态续流大电流出现时,较大的导通延时可保证次级开关器件的可靠性；静态续流小电流出现时或在断续电流模式下,较小的启动延时可保证开关变换器的整体效率。(The embodiment of the application discloses a control method and a circuit for preventing bilateral common of a switching converter and the converter. The converter includes a primary switching device and a secondary switching device. The control method comprises the following steps: detecting a real-time current of a primary of the switching converter; adjusting the turn-on delay of the primary switching device based on the magnitude of the real-time current; if the real-time current is large, increasing the conduction delay of the primary switching device; and if the real-time current is small, reducing the conduction delay of the primary switch device. The circuit is used for executing the control method. When large current of dynamic follow current appears, the reliability of the secondary switch device can be ensured by larger conduction delay; when a small static follow current occurs or in an intermittent current mode, the overall efficiency of the switching converter can be ensured by a small starting delay.)

1. A control method for preventing the bilateral common of the switch converter is characterized in that,

The switching converter includes a primary switching device and a secondary switching device;

The control method comprises the following steps:

A1, detecting the primary real-time current of the switching converter;

A2, adjusting the conduction delay of the primary switch device based on the magnitude of the real-time current; if the real-time current is large, increasing the conduction delay of the primary switching device; and if the real-time current is small, reducing the conduction delay of the primary switch device.

2. The method of claim 1,

The increasing the turn-on delay of the primary switching device specifically includes: slowing down a speed of raising a driving signal for driving a gate of the primary switching device from a low level to a high level;

The reducing of the turn-on delay of the primary switching device specifically includes: the speed of raising a drive signal for driving the gate of the primary switching device from a low level to a high level is increased.

3. The method according to claim 1, wherein said a2 specifically comprises: generating a first signal having a magnitude associated with a magnitude of the real-time current based on the real-time current; and adjusting the conduction delay of the primary switching device by using the first signal, so that the magnitude of the conduction delay of the primary switching device is related to the magnitude of the first signal.

4. The method according to claim 1, wherein said a2 specifically comprises: comparing the real-time current to a first current; if the real-time current is greater than the first current, increasing the conduction delay of the primary switching device; and if the real-time current is smaller than the first current, reducing the conduction delay of the primary switch device.

5. The method of claim 4, further comprising: the first current is a real-time current at the last moment or a preset current.

6. A control circuit for preventing bilateral common of switching converters is characterized in that: the real-time current detection circuit comprises a real-time current detection circuit and a first main circuit;

The real-time current detection circuit is used for detecting the primary real-time current of the switching converter;

The first main circuit is used for adjusting the conduction delay of a primary switching device of the switching converter based on the magnitude of the real-time current; if the real-time current is large, increasing the conduction delay of the primary switching device; and if the real-time current is small, reducing the conduction delay of the primary switch device.

7. The circuit of claim 6, wherein: the first main circuit comprises a first signal generating circuit and a first timing circuit;

The first signal generating circuit is used for generating a first signal with the magnitude correlated with the magnitude of the real-time current based on the real-time current;

The first timing circuit is configured to adjust the turn-on delay of the primary switching device by using the first signal, so that the magnitude of the turn-on delay of the primary switching device is associated with the magnitude of the first signal.

8. The circuit of claim 6, wherein: the first main circuit comprises a first comparison circuit and a second sequential circuit;

The first comparison circuit is used for comparing the real-time current with a first current and outputting a first comparison result and a second comparison result;

The second timing circuit is configured to increase a turn-on delay of the primary switching device according to the first comparison result, and to decrease the turn-on delay of the primary switching device according to the second comparison result.

9. A switching converter, characterized by: comprising a circuit according to any of claims 6 to 8.

10. A computer-readable storage medium characterized by: the computer-readable storage medium has stored therein program instructions which, when executed by a processor of a computer, cause the processor to carry out the method according to any one of claims 1 to 5.

Technical Field

The present disclosure relates to the field of switching converters, and in particular, to a control method, a circuit and a converter for preventing bilateral common of switching converters.

Background

As the requirements for converter efficiency increase, synchronous rectification circuits are increasingly commonly used in switching converters. Due to the increasing demand for power density, more and more switching converters start to adopt freewheeling mode of operation. In the freewheeling mode, the primary coil and the secondary coil of the switching converter may be in common, or the primary switching device and the secondary switching device may be in common, which may cause a pulse spike to occur at a drain of the secondary switching device, such as a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET), thereby greatly reducing the reliability of the synchronous rectification circuit.

The above background disclosure is only for the purpose of assisting in understanding the inventive concepts and technical solutions of the present application and does not necessarily pertain to the prior art of the present application, and should not be used to assess the novelty and inventive step of the present application in the absence of explicit evidence to suggest that such matter has been disclosed at the filing date of the present application.

Disclosure of Invention

The application provides a control method, a circuit and a converter for preventing bilateral common of a switch converter, which can improve the reliability of the whole switch converter.

In a first aspect, the present application provides a control method of preventing bilateral common-conduction of a switching converter, the switching converter comprising a primary switching device and a secondary switching device;

The control method comprises the following steps:

A1, detecting the primary real-time current of the switching converter;

A2, adjusting the conduction delay of the primary switch device based on the magnitude of the real-time current; if the real-time current is large, increasing the conduction delay of the primary switching device; and if the real-time current is small, reducing the conduction delay of the primary switch device.

In some preferred embodiments, the increasing the turn-on delay of the primary switching device specifically includes: slowing down a speed of raising a driving signal for driving a gate of the primary switching device from a low level to a high level; the reducing of the turn-on delay of the primary switching device specifically includes: the speed of raising a drive signal for driving the gate of the primary switching device from a low level to a high level is increased.

In some preferred embodiments, said a2 specifically comprises: generating a first signal having a magnitude associated with a magnitude of the real-time current based on the real-time current; and adjusting the conduction delay of the primary switching device by using the first signal, so that the magnitude of the conduction delay of the primary switching device is related to the magnitude of the first signal.

In some preferred embodiments, said a2 specifically comprises: comparing the real-time current to a first current; if the real-time current is greater than the first current, increasing the conduction delay of the primary switching device; and if the real-time current is smaller than the first current, reducing the conduction delay of the primary switch device.

In some preferred embodiments, the first current is a real-time current at a previous time or a preset current.

In a second aspect, the present application provides a control circuit for preventing bilateral common of switching converters, including a real-time current detection circuit and a first main circuit;

The real-time current detection circuit is used for detecting the primary real-time current of the switching converter;

The first main circuit is used for adjusting the conduction delay of a primary switching device of the switching converter based on the magnitude of the real-time current; if the real-time current is large, increasing the conduction delay of the primary switching device; and if the real-time current is small, reducing the conduction delay of the primary switch device.

In some preferred embodiments, the first main circuit comprises a first signal generating circuit and a first timing circuit;

The first signal generating circuit is used for generating a first signal with the magnitude correlated with the magnitude of the real-time current based on the real-time current;

The first timing circuit is configured to adjust the turn-on delay of the primary switching device by using the first signal, so that the magnitude of the turn-on delay of the primary switching device is associated with the magnitude of the first signal.

In some preferred embodiments, the first main circuit comprises a first comparison circuit and a second timing circuit;

The first comparison circuit is used for comparing the real-time current with a first current and outputting a first comparison result and a second comparison result;

The second timing circuit is configured to increase a turn-on delay of the primary switching device according to the first comparison result, and to decrease the turn-on delay of the primary switching device according to the second comparison result.

In a third aspect, the present application provides a switching converter comprising the above-described control circuit for preventing bilateral common-conduction of the switching converter.

In a fourth aspect, the present application provides a computer-readable storage medium characterized by: the computer-readable storage medium has stored therein program instructions that, when executed by a processor of a computer, cause the processor to perform the above-described method.

Compared with the prior art, the beneficial effects of the embodiment of the application are as follows:

Correlating the conduction delay of the primary switching device with the current of the turn-on time of the freewheeling mode, namely the magnitude of the real-time current; when the real-time current at the starting time of the freewheeling mode is large, increasing the conduction delay of the primary switching device; when the real-time current at the start time of the freewheel mode is small, the turn-on delay of the primary switching device is reduced. Therefore, when large current of dynamic follow current appears, the reliability of the secondary switch device can be ensured by larger conduction delay; when a small static follow current occurs or in an intermittent current mode, the overall efficiency of the switching converter can be ensured by a small starting delay.

Drawings

FIG. 1 is a schematic diagram of a circuit configuration of a switching converter;

FIG. 2 illustrates ideal signals for a synchronous rectifier converter in freewheel mode;

FIG. 3 shows the actual signal of a synchronous rectifier converter in freewheel mode;

Fig. 4 is a schematic circuit diagram of a switching converter according to a first embodiment of the present application;

Fig. 5 shows a signal diagram of a case where a current is small when a primary side of a switching converter in a freewheel mode according to an embodiment of the present application is turned on;

Fig. 6 is a signal diagram illustrating a case where a current is large when a primary side of a switching converter in a freewheel mode according to an embodiment of the present application is turned on;

Fig. 7 shows a structure of a control circuit of a second embodiment of the present application;

Fig. 8 is a flowchart of a control method for preventing bilateral common of the switching converters according to the first embodiment of the present application.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the embodiments of the present application more clearly apparent, the present application is further described in detail below with reference to fig. 1 to 8 and the embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or be indirectly connected to the other element. The connection may be for fixation or for circuit connection.

It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship indicated in the drawings that is solely for the purpose of facilitating the description of the embodiments and simplifying the description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be considered as limiting the application.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present application, "a plurality" means two or more unless specifically defined otherwise.

First embodiment

The present embodiment provides a switching converter, and in particular, an isolated switching converter with a synchronous rectification circuit, which can prevent double-side common.

Referring to fig. 1, the switching converter of the present embodiment includes a control circuit 100, a primary switching device 200, a secondary switching device 300, and a transformer 400. The control circuit 100 is a control circuit for preventing the switching converters from being shared at both sides. The control circuit 100 of the present embodiment may also be referred to as a primary drive circuit or a primary controller. The primary switching device 200 is a power switching device or a switching tube, in particular a MOSFET. The secondary switching device 300 is a synchronous rectifier MOSFET. The control circuit 100 is used to control the primary switching device 200.

The embodiment also provides a control method for preventing the bilateral common of the switching converters. The control circuit 100 of the present embodiment can implement the control method of the present embodiment.

Referring to fig. 8, the control method for preventing bilateral common of the switching converters of the present embodiment includes step a1 and step a 2.

Step A1, detecting the primary real-time current of the switching converter.

The transformer 400 has a primary coil 401 and a secondary coil 402.

Referring to fig. 4, the control circuit 100 of the present embodiment includes a real-time current detection circuit 1 and a first main circuit 2. Wherein step a1 is performed by the real-time current detection circuit 1. The real-time current detection circuit 1 detects a real-time current of the primary of the switching converter, specifically, detects a real-time current of the primary coil 401 of the transformer 400. In the present embodiment, the drain of the primary switching device 200 is connected to the primary coil 401, and therefore, the real-time current detection circuit 1 collects the current flowing through the source of the primary switching device 200; specifically, the real-time current detection circuit 1 collects the current flowing through the source of the primary switching device 200 when the switching converter operates in the freewheeling mode, that is, the freewheeling operating current Ics. The follow current Ics is the aforementioned real-time current.

Step A2, adjusting the turn-on delay of the primary switching device based on the magnitude of the real-time current; if the real-time current is large, the conduction delay of the primary switching device is increased; if the magnitude of the real-time current is small, the turn-on delay of the primary switching device is reduced.

In the present embodiment, the first main circuit 2 performs step a 2.

Referring to fig. 2, wherein Gate _ p refers to a driving signal DRV of the Gate of the primary switching device 200; gate _ s refers to a drive signal DRV of the Gate of the secondary switching device 300; ip is the primary coil current of the switching converter; is refers to the secondary coil current of the switching converter. The driving signal DRV driving the primary switching device 200 is a PWM signal; the primary switching device 200 is turned on at a high level and turned off at a low level. Referring to fig. 2, for the driving signal DRV, going from low level to high level occurs instantaneously, i.e., the rising edge of the PWM signal is almost vertical. In the present embodiment, the turn-on delay (also referred to as an on delay) refers to the time between the low level and the high level of the driving signal DRV, or the duration of the rising edge.

Referring to fig. 3, due to the driving delay of the synchronous rectification controller, in the area outlined by the dashed oval in fig. 3, the primary winding 401 and the secondary winding 402 share the common phenomenon, that is, the primary switching device 200 and the secondary switching device 300 are turned on at the same time, and a pulse occurs at the drain of the synchronous rectification MOSFET, that is, the secondary switching device 300. The pulse of the synchronous rectifier MOSFET can be reduced by setting the on-delay of the primary switching device 200 by the control circuit 100. Since the control circuit 100, that is, the primary driving circuit, sets a delay time, the current of the primary winding 401 when the common is generated is greatly reduced, and therefore, the energy generated on the synchronous rectification MOSFET is also greatly reduced.

However, the efficiency of the switching converter is reduced due to the large primary on-time delay of the primary switching device 200, so that the efficiency is not improved due to the excessive time delay. Since the high-current freewheeling mode usually occurs under the condition that the output load dynamically changes, such as heavy load to light load, the embodiment associates the primary conduction delay with the current of the freewheeling mode on-time, that is, the magnitude of the real-time current Ics; referring to fig. 5, when the real-time current Ics at the start time of the freewheel mode is large, the turn-on delay of the primary switching device 200 is increased; referring to fig. 6, when the real-time current Ics of the start time of the freewheel mode is small, the turn-on delay of the primary switching device 200 is reduced. Thus, when a large dynamic freewheeling current occurs, a large conduction delay can ensure the reliability of the rectifier MOSFET, i.e., the secondary switching device 300; when a small static follow current occurs or in an intermittent current mode, the overall efficiency of the switching converter can be ensured by a small starting delay.

Increasing the conduction delay td of the primary switching device 200 is specifically: referring to fig. 5, the speed of raising the driving signal DRV for driving the gate of the primary switching device 200 from a low level to a high level is slowed down; thus, the driving signal DRV gradually rises from a low level to a high level, wherein a miller plateau occurs; the slowing is relatively speaking, such as a speed relative to the previous time or a preset speed slowing; it can be considered that the slope of the rising edge of the drive signal DRV becomes smaller in general. As the on-time td becomes larger, the speed at which the current Ip flowing through the drain and source of the primary switching device 200 rises also becomes slower.

Referring to fig. 6, reducing the on-time delay td of the primary switching device 200 is specifically: accelerating a speed of raising the drive signal DRV for driving the gate of the primary switching device 200 from a low level to a high level; thus, the driving signal DRV gradually rises from a low level to a high level; wherein, the speeding up is relatively speaking, such as speeding up relatively to the last time or a preset speed; it can be considered that the slope of the rising edge of the drive signal DRV becomes large in general. Since the on-time delay td becomes small, the speed at which the current Ip flowing through the drain and source of the primary switching device 200 rises also becomes fast.

Referring to fig. 4, the first main circuit 2 of the present embodiment includes a first signal generating circuit 21 and a first timing circuit 22. Correspondingly, step a2 in this embodiment specifically includes: the first signal generation circuit 21 generates a first signal having a magnitude correlated with the magnitude of the real-time current Ics based on the real-time current Ics; the first timing circuit 22 adjusts the turn-on delay of the primary switching device 200 using the first signal such that the magnitude of the turn-on delay of the primary switching device 200 is correlated with the magnitude of the first signal.

The first signal is a current signal. In other embodiments, the first signal may also be a voltage signal.

The first signal generating circuit 21 is connected to the real-time current Ics, so that the real-time current Ics and the preset current are subtracted or superposed, and then a current is output, wherein the current is a first signal. Specifically, the real-time current Ics offsets a part of the preset current, so that the magnitude of the output current is reduced, that is, the magnitude of the current of the first signal is reduced; the larger the real-time current Ics, the smaller the first signal, and vice versa. The first signal is input to the first timing circuit 22 for changing the on-delay of the primary switching device 200; if the first signal is smaller, the speed of the driving signal DRV rising from the low level to the high level is slower, and the turn-on delay of the primary switching device 200 is larger; the turn-on delay of the primary switching device 200 is smaller if the first signal is larger and the driving signal DRV rises from a low level to a high level faster.

Referring to fig. 4, the first signal generation circuit 21 includes an access sub-circuit 211 and a current source 212. The access sub-circuit 211 is used for accessing the real-time current Ics to the current source 212; the access sub-circuit 211 comprises a switch S1 and a capacitor C1; one end of the switch S1 is used for inputting the real-time current Ics, and the other end is connected to the current source 212; the capacitor C1 is used for filtering the accessed real-time current Ics; the access sub-circuit 211 closes the switch S1 based on the drive signal DRV, so that the real-time current Ics will be accessed. The current source 212 is used for generating a preset current, and specifically comprises a first constant current source a1 and a second constant current source a2 which are connected in series; the first constant current source a1 generates a current Ichg and the second constant current source a2 generates a current Idchg. An output terminal 213 is provided between the first constant current source a1 and the second constant current source a2, and is used for inputting the first signal to the first timing circuit 22. Before the real-time current Ics is not accessed, the current source 212 inputs a preset current to the first timing circuit 22; when the real-time current Ics is applied, the real-time current Ics cancels at least a portion of the current Idchg generated by the second constant current source a2, so that the magnitude of the first signal output by the output terminal 213 of the current source 212 changes.

The control circuit 100 has a simple structure, is easy to implement, and can reduce the cost.

Second embodiment

The present embodiment differs from the first embodiment in that: referring to fig. 7, the first main circuit 2 of the present embodiment includes a first comparison circuit 23 and a second timing circuit 24; correspondingly, step a2 specifically includes: the first comparison circuit 23 compares the real-time current Ics with the first current; if the real-time current Ics is greater than the first current, increasing the turn-on delay of the primary switching device 200; if the real-time current Ics is less than the first current, the turn-on delay of the primary switching device is reduced.

The first current may be a real-time current at a previous time or a preset current.

In the present embodiment, the first comparison circuit 23 compares the real-time current Ics with the first current and outputs a first comparison result and a second comparison result; the first comparison result shows that the real-time current Ics is larger than the first current, and the second comparison result shows that the real-time current Ics is smaller than the first current; the second timing circuit 24 increases the turn-on delay of the primary switching device 200 according to the first comparison result, and decreases the turn-on delay of the primary switching device 200 according to the second comparison result; specifically, the second timing circuit 24 changes the duration of the rising edge of the driving signal DRV to be larger and smaller, respectively.

In other embodiments, the real-time current Ics is converted to a real-time voltage, which is then compared to the first voltage; the turn-on delay of the primary switching device 200 is then adjusted based on the comparison. The first voltage may be a voltage obtained by real-time current conversion at the previous time or a preset voltage.

The embodiment of the present application does not require secondary information of the switching converter, such as the on-time of the secondary switching device 300 or the adjustment of the on-time of the secondary switching device 300, which can reduce the cost.

Those skilled in the art will appreciate that all or part of the processes of the embodiments methods may be performed by a computer program, which may be stored in a computer-readable storage medium and executed to perform the processes of the embodiments methods. And the aforementioned storage medium includes: various media capable of storing program codes, such as ROM or RAM, magnetic or optical disks, etc.

The foregoing is a further detailed description of the present application in connection with specific/preferred embodiments and is not intended to limit the present application to that particular description. For a person skilled in the art to which the present application pertains, several alternatives or modifications to the described embodiments may be made without departing from the concept of the present application, and these alternatives or modifications should be considered as falling within the scope of the present application.