Virtual voltage vector-based five-phase inverter common-mode voltage suppression method

文档序号:1356659 发布日期:2020-07-24 浏览:10次 中文

阅读说明:本技术 一种基于虚拟电压矢量的五相逆变器共模电压抑制方法 (Virtual voltage vector-based five-phase inverter common-mode voltage suppression method ) 是由 宋文胜 余彬 郭永琪 李建新 冯晓云 王青元 孙鹏飞 王嵩 黄景春 于 2020-05-14 设计创作,主要内容包括:本发明公开了一种基于虚拟电压矢量的五相逆变器共模电压抑制方法,包括:选择α-β子空间三个相邻大矢量按固定占空比合成有效虚拟电压矢量,选择方向相反的两个大矢量按0.5的占空比合成虚拟零矢量,消除x-y子空间的谐波电压;简化虚拟电压矢量控制集,有效减小了预测模型和评价函数的计算次数;在预测模型的基础上加入对控制器固有一拍延时的补偿;简化评价函数,省去权重系数,避免了参数的整定。本发明有效抑制低次谐波电流的同时,共模电压降低了80%;本发明简化了控制集,降低了计算复杂度,易于数字化实现。(The invention discloses a virtual voltage vector-based five-phase inverter common-mode voltage suppression method which comprises the steps of selecting α - β three adjacent large vectors in a subspace to synthesize an effective virtual voltage vector according to a fixed duty ratio, selecting two large vectors in opposite directions to synthesize a virtual zero vector according to a 0.5 duty ratio, eliminating harmonic voltages of an x-y subspace, simplifying a virtual voltage vector control set, effectively reducing the calculation times of a prediction model and an evaluation function, adding compensation for inherent one-beat time delay of a controller on the basis of the prediction model, simplifying the evaluation function, omitting a weight coefficient and avoiding parameter setting.)

1. A common-mode voltage suppression method of a five-phase inverter based on a virtual voltage vector is characterized by comprising the following steps:

step 1, select α - β sub-space adjacent 3 large vectorsSynthesizing into virtual voltage vectors according to fixed duty ratios of 0.382, 0.236 and 0.382 to obtain 10 effective virtual voltage vectors VvkAnd k is 1,2,3.. 10, selecting 2 large vectors in opposite directions, synthesizing a virtual zero vector according to the same duty ratio, wherein the projection amplitudes of the virtual voltage vectors in the x-y subspace are all 0, and obtaining the effective virtual voltage vector amplitudes in α - β subspaces:

|Vv|αβ=0.5527Vdc

wherein, | Vv|αβIs the effective virtual voltage vector magnitude, V, in the subspace α - βdcIs a dc bus voltage;

step 2: simplifying the virtual voltage vector control set: if the optimal virtual vector of the last control period is VoldThen the current control period is selected and VoldAdjacent 4 virtual voltage vectors, virtual zero vectors and VoldConstructing a virtual voltage vector control set;

and 3, estimating current through a prediction model, compensating the inherent one-beat delay of the controller, and substituting 6 groups of current estimation values into an evaluation function to obtain the optimal vector selection, wherein the evaluation function G only comprises α - β subspace current terms and does not comprise a weight coefficient:

wherein iαA and iβGiving reference currents, i, for the k instants α and β axesα k+2And iβ k+2The k +2 times α and β axis current estimates.

2. The virtual voltage vector-based five-phase inverter common-mode voltage suppression method according to claim 1, wherein the same duty ratio in step 1 is 0.5.

Technical Field

The invention belongs to the field of design and manufacture of five-phase motor alternating current control systems in the field of power electronics and power transmission, and particularly relates to a five-phase inverter common-mode voltage suppression method based on a virtual voltage vector.

Background

The model predictive control has the advantages of simplicity and flexibility in control, low switching frequency, multi-objective optimization and the like, and has received more and more attention in recent years, wherein finite set model predictive current control (FCS-MPCC) is one of the commonly used methods in the field of power electronics, the FCS-MPCC directly controls the current, and the concept of the FCS-MPCC is intuitive and is simple to implement. The traditional model prediction control method can generate a large common-mode voltage (CMV), under the action of the common-mode voltage, electric charges can be gradually accumulated on a motor shaft, and when the CMV can break down an insulating lubricant to a certain degree, shaft current and leakage current are generated, so that common-mode electromagnetic interference is formed, and the normal work of other electric equipment of the system is influenced; in addition, the too large common mode voltage can cause the too large motor shaft voltage and shaft current, cause the motor to generate heat, reduce the motor life-span. Control methods to reduce the common mode voltage have therefore gained increasing attention and research.

Compared with a three-phase voltage source type inverter, the five-phase inverter has the outstanding advantages of low torque ripple, low voltage, high power, more control freedom and the like in the application fields of high power and high reliability, such as railway locomotive traction transmission, electric automobiles, ship electric propulsion and the like. The classic five-phase inverter FCS-MPCC method uses a plurality of effective voltage vectors and 1 zero vector as a finite control set, but the method has the problems of high harmonic content and large calculation amount. Therefore, the improved algorithm mostly focuses on harmonic suppression and reduction of calculation load, and research on common mode voltage suppression is less. In the existing five-phase inverter common-mode voltage suppression method, a common-mode voltage evaluation item is added into an evaluation function to suppress the vector selection frequency generating large common-mode voltage, but part of steady-state performance is sacrificed, and parameter setting is difficult because the setting of the weight coefficient of the evaluation function lacks theoretical support.

Disclosure of Invention

Aiming at the defects in the prior art, the invention provides a five-phase inverter common-mode voltage suppression method based on a virtual voltage vector.

A common-mode voltage suppression method of a five-phase inverter based on a virtual voltage vector comprises the following steps:

step 1, selecting α - β adjacent large vectors in subspace, synthesizing the large vectors into virtual voltage vectors according to fixed duty ratios of 0.382, 0.236 and 0.382 in sequence to obtain 10 effective virtual voltage vectors VvkAnd k is 1,2,3.. 10. 2 large vectors with opposite directions are selected, and virtual zero vectors are synthesized according to the same duty ratio (0.5). the projection amplitudes of the virtual voltage vectors in the x-y subspace are all 0, so that the effective virtual voltage vector amplitudes in α - β subspaces are obtained:

|Vv|αβ=0.5527Vdc

wherein, | Vv|αβIs the effective virtual voltage vector magnitude, V, in the subspace α - βdcIs the dc bus voltage.

Step 2: simplifying the virtual voltage vector control set: if the optimal virtual vector of the last control period is VoldThen the current control period is selected and VoldAdjacent 4 virtual voltage vectors, virtual zero vectors and VoldAnd a virtual voltage vector control set is constructed, so that the calculation times of a prediction model and an evaluation function are effectively reduced.

And 3, estimating current through a prediction model, compensating the inherent one-beat delay of the controller, and substituting 6 groups of current estimation values into an evaluation function to obtain the optimal vector selection, wherein the evaluation function G only comprises α - β subspace current terms and does not comprise a weight coefficient:

wherein iα *And iβ *Giving reference currents, i, for the k time α and β axesα k+2And iβ k+2The k +2 times α and β axis current estimates.

Compared with the prior art, the invention has the beneficial technical effects that:

the method adopts the voltage vector which generates the minimum common-mode voltage to synthesize the virtual voltage vector, the common-mode voltage is reduced by 80%, the projection amplitude of the synthesized virtual voltage vector in the x-y subspace is 0, harmonic voltage cannot be generated, and low-order harmonic current is restrained, the evaluation function only comprises α - β subspace current evaluation items and does not contain weight factors, so that complicated parameter setting is avoided, a control set is simplified, the calculation complexity is reduced, and the method is easy to realize digitally.

Drawings

Fig. 1 is a diagram of a five-phase two-level voltage source inverter topology.

FIG. 2 is a voltage vector distribution diagram of a five-phase inverter at α - β subspace.

FIG. 3 is a voltage vector distribution diagram for a five-phase inverter in the x-y subspace.

FIG. 4 shows the α - β subspace virtual voltage vector composition.

FIG. 5 shows the x-y subspace virtual voltage vector composition

FIG. 6 shows the switching sequence of the inverter output during a control cycle and its corresponding CMV value (in V)v1For example).

Fig. 7 is a schematic diagram of voltage vector selection before vector control set simplification.

FIG. 8 is a simplified voltage vector selection diagram of the vector control set.

Fig. 9 shows the phase current and CMV experimental waveforms of the conventional virtual voltage vector method.

Fig. 10 shows experimental waveforms of phase currents and CMV in a conventional five-phase inverter common-mode voltage suppression method.

FIG. 11 is a phase current and CMV experimental waveform for the method of the present invention.

FIG. 12 is a comparison of the execution time of the method of the present invention and two conventional methods.

Detailed Description

The invention is described in further detail below with reference to the figures and specific embodiments.

In one embodiment of the present application, referring to fig. 1, the present solution is directed to a five-phase two-level voltage source inverter. The five-phase inverter has 32 basic voltage vectors including 30 effective voltage vectors and 2 zero vectors. Defining a switching function as Si(i ═ a, b, c, d, e), when the upper arm is on, Si1 is ═ 1; when the lower bridge arm is conducted, SiThe method can map symmetrical physical quantities under a natural coordinate system into α - β and x-y two orthogonal subspaces according to an expanded park rotation transformation matrix, wherein the amplitudes of large, medium and small voltage vectors in the α - β subspaces are 0.6472U respectivelydc、0.4Udc、0.2472UdcFIGS. 2 and 3 show voltage vector distribution diagrams of the five-phase inverter at α - β and x-y subspace,

common mode voltage u of five-phase inverterCMThe expression of (a) is:

the common mode voltage values generated by the different voltage vectors are shown in table 1, and it is clear that the small and large vectors generate the minimum CMV.

TABLE 1 different Voltage vectors CMV

FIG. 4, FIG. 5 shows α - β and the case of synthesizing virtual voltage vectors in x-y subspace.3 large vectors are synthesized into new voltage vectors in two subspaces respectively, and in order to eliminate the third harmonic, the vector amplitude of x-y subspace synthesis is made to be 0, and V is usedv1For example, 3 large vector combined duty cycle calculations are given:

wherein λ is1、λ2、λ3The effective virtual voltage vector magnitude in the α - β subspace can be found:

|Vv|αβ=0.5527Vdc

from table 1, it can be known that the CMV generated by the zero vector is the largest, and in order to reduce the CMV, two large vectors with opposite directions are selected to replace the conventional zero vector by the synthetic virtual zero vector with equal duty ratio. Meanwhile, in order to reduce the switching frequency, 10 sets of virtual zero vector synthesis modes are obtained according to the optimal vector at the previous moment, as shown in table 2, wherein VoldThe optimal voltage vector at the last moment.

TABLE 2 virtual zero vector Synthesis

FIG. 6 shows the switching sequence and its corresponding CMV value (in V) during one control cyclev1For example).

Fig. 7 shows the case of vector selection in one control cycle, and the current estimation value and the evaluation value need to be calculated 11 times in total. In order to reduce the calculation load, the vector selection strategy shown in fig. 8 is adopted, and the current estimation value and the evaluation value need to be calculated only 6 times per control period, and the control performance is not affected basically.

The prediction model needs to consider the inherent one-beat delay of the controller, and the current prediction model after delay compensation is as follows:

wherein iαβ kSampled currents of subspace α - β at time k iαβ k+2Estimated currents for the k +2 instants α - β subspace uαβ kThe projection values of the optimal voltage vector at the time k on α and β axes, uαβ k+1For controlling the projection values of the concentrated voltage vectors on α and β axes, R is the load side resistance, L is the load side inductance, T is the voltage vectorsIs a control cycle.

The projected amplitude of the virtual voltage vector in the x-y subspace is 0, so the evaluation function only needs to contain α - β subspace current evaluation terms, as follows:

the existing virtual voltage vector method synthesizes virtual voltage vectors through large vectors and medium vectors in the same direction, although the current harmonic content is reduced, the method uses zero vectors and medium vectors, so that the CMV is very large; the existing common-mode voltage suppression method of the five-phase inverter adds a common-mode voltage evaluation item into an evaluation function, reduces the selection frequency of a zero vector and a middle vector, and suppresses the CMV, but the method sacrifices partial steady-state performance. Fig. 9 shows phase currents and CMV waveforms of a conventional virtual voltage vector method, fig. 10 shows phase currents and CMV waveforms of a conventional five-phase inverter common mode voltage suppression method, and fig. 11 shows phase currents and CMV waveforms of a method according to the present invention. Obviously, the method provided by the invention reduces the common-mode voltage to +/-0.1V while maintaining good steady-state performancedc(±10V)。

Fig. 12 shows a comparison of the execution time of the method of the present invention with that of two conventional methods.

While the embodiments of the invention have been described in detail in connection with the accompanying drawings, it is not intended to limit the scope of the invention. Various modifications and changes may be made by those skilled in the art without inventive step within the scope of the present invention as described in the claims.

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