阅读说明：本技术 一种抑制片上功率放大器地节点二次谐波的电路 (Circuit for suppressing second harmonic of ground node of on-chip power amplifier ) 是由 胡雪青 于 2019-11-07 设计创作，主要内容包括：本发明公开了一种抑制片上功率放大器地节点二次谐波的电路,包括：连接片上功率放大器地节点的可变电容器、连接所述可变电容器的参考电压产生电路；其中,所述可变电容器,用于调谐谐振LC网络的谐振频率,得到低阻通路；所述可编程的参考电压产生电路,包括：主控设置单元、带隙参考电流源和电阻阵列,所述带隙参考电流源输出电流作用到所述电阻阵列上,得到一系列电压值；所述主控设置单元,用于通过查表方式对电阻阵列中各电阻对应的多路控制开关进行设置,以选择其中一个电阻产生的电压作为参考电压,所述参考电压输入到所述可变电容器。(The invention discloses a circuit for suppressing second harmonic of a ground node of an on-chip power amplifier, which comprises a variable capacitor connected with the ground node of the on-chip power amplifier and a reference voltage generating circuit connected with the variable capacitor, wherein the variable capacitor is used for tuning the resonance frequency of a resonance L C network to obtain a low-impedance path, the programmable reference voltage generating circuit comprises a main control setting unit, a band-gap reference current source and a resistor array, the band-gap reference current source outputs current to act on the resistor array to obtain a series of voltage values, and the main control setting unit is used for setting a plurality of paths of control switches corresponding to resistors in the resistor array in a table look-up mode to select the voltage generated by one resistor as reference voltage which is input into the variable capacitor.)

1. A circuit for suppressing a second harmonic of a ground node of an on-chip power amplifier, the circuit comprising: a variable capacitor connected to an on-chip power amplifier ground node, a reference voltage generating circuit connected to the variable capacitor; wherein the content of the first and second substances,

the variable capacitor is used for tuning the resonance frequency of the resonance L C network to obtain a low-impedance path;

the programmable reference voltage generation circuit comprises: the band-gap reference current source outputs current to act on the resistor array to obtain a series of voltage values;

the main control setting unit is used for setting the multi-path control switches corresponding to the resistors in the resistor array in a table look-up mode so as to select the voltage generated by one of the resistors as a reference voltage, and the reference voltage is input into the variable capacitor.

2. The circuit of claim 1, wherein the resonant network comprises an L C series resonant network connected in parallel with a DC ground path of the power amplifier;

an inductance in the resonant network, comprising: various parasitic inductances of routing, via holes and bonding wires from an on-chip ground node of the power amplifier to a system ground on the PCB;

a capacitance in the resonant network, comprising: the power amplifier comprises a parasitic capacitance on a routing from an on-chip ground node of the power amplifier to a system ground on a PCB, a parasitic capacitance on a via hole and a bonding wire, an on-chip fixed capacitance and a variable capacitance.

3. The circuit of claim 2, wherein the fixed capacitor and the variable capacitor are in parallel, and the function of tuning the resonant frequency is performed by the variable capacitor.

4. The circuit of claim 2, wherein the variable capacitance is comprised of two variable capacitors in series;

the two variable capacitors are connected in series in the following manner: the polarities are connected in the order of positive, negative and positive;

and the negative end of the variable capacitor receives the programmable reference voltage generated by the programmable reference voltage generating circuit.

5. The circuit of claim 1, wherein the programmable reference voltage generation circuit is configured to set the control switch by means of a look-up table;

for broadband applications, the table holds a set of switch control words for each communication channel; for narrowband applications, only one set needs to be reserved.

Technical Field

The invention relates to the electronic technology, in particular to a circuit for suppressing second harmonic of a ground node of an on-chip power amplifier.

Background

A power amplifier is an important module in a radio frequency transceiver and functions to generate a power output large enough to drive a load (e.g., a transmitting antenna) under a given distortion condition. A typical radio frequency transmit antenna impedance is 50 Ω, while a typical on-chip power amplifier has a transmit power range of about 4dBm to 22 dBm. For a radio frequency chip powered with 3.3V, the operating current of the power amplifier can be estimated approximately in the order of hundreds of milliamps.

The power amplifier has a large operating current and a strong signal amplitude, so that the power amplifier is often a source of interference for the whole transceiver. For example, strong transmit power may cause voltage controlled oscillator pulling (VCO pulling), and insufficient transmit/receive isolation may affect the performance of the receiver. The operating current of the power amplifier is a significant portion of the overall transceiver, and therefore it also often affects the performance of other circuit blocks by way of power coupling. For these reasons, on-chip power amplifiers typically employ a differential architecture, as shown in fig. 2. The odd harmonics of the node pair on the chip of the differential power amplifier are equivalent to virtual earth, so the components of the odd harmonics are usually small and the influence on the system is small; but not even harmonics. Due to the parasitic resistance and inductance of layout routing, packaging and PCB routing, the node has non-low resistance characteristic to the ground node of the PCB system, so that the node on the chip has larger even harmonic component. These components affect the performance of the power amplifier, such as transmission efficiency and linearity, and also affect other circuit blocks through coupling between the power supply and ground.

By introducing a path with low resistance characteristic to the even harmonic into the node on the chip, the even harmonic component of the node can be effectively reduced. As is well known, the capacitance-inductance series network has a low resistance at the resonant frequency, so that only one capacitance-inductance resonant network needs to be introduced between the "on-chip ground" node of the power amplifier and the "ground" of the system PCB. The main problems faced by this solution are two:

1) as mentioned above, the capacitance and inductance in the whole path are affected by various factors such as parasitic capacitance and inductance, package bonding wires, PCB board-level routing and via holes, and many factors are not easy to be estimated accurately, and some of the factors are in an unknown state even in the chip design stage;

2) the power amplifier has a certain working frequency range, and the method can only ensure the effectiveness at a single frequency point and cannot ensure the effectiveness of the full working frequency band of the power amplifier (especially a broadband power amplifier). In addition, to ensure that the resonant network impedance is sufficiently low, the devices in the network must have a high Q value.

Disclosure of Invention

It is therefore an object of the present invention to provide a circuit for suppressing second harmonics of a ground node of an on-chip power amplifier.

In order to achieve the purpose, the technical scheme of the invention is realized as follows:

the embodiment of the invention provides a circuit for inhibiting the second harmonic of a ground node of an on-chip power amplifier, which is characterized by comprising the following components: a variable capacitor connected to an on-chip power amplifier ground node, a reference voltage generating circuit connected to the variable capacitor; wherein the content of the first and second substances,

the variable capacitor is used for tuning the resonance frequency of the resonance L C network to obtain a low-impedance path;

the programmable reference voltage generation circuit comprises: the band-gap reference current source outputs current to act on the resistor array to obtain a series of voltage values;

the main control setting unit is used for setting the multi-path control switches corresponding to the resistors in the resistor array in a table look-up mode so as to select the voltage generated by one of the resistors as a reference voltage, and the reference voltage is input into the variable capacitor.

In the scheme, the resonant network comprises an L C series resonant network and a power amplifier, wherein the L C series resonant network is connected with a direct current ground path of the power amplifier in parallel;

an inductance in the resonant network, comprising: various parasitic inductances of routing, via holes and bonding wires from an on-chip ground node of the power amplifier to a system ground on the PCB;

a capacitance in the resonant network, comprising: the power amplifier comprises a parasitic capacitance on a routing from an on-chip ground node of the power amplifier to a system ground on a PCB, a parasitic capacitance on a via hole and a bonding wire, an on-chip fixed capacitance and a variable capacitance.

In the above scheme, the fixed capacitor and the variable capacitor are connected in parallel, and the tuning function of the resonant frequency is realized by the variable capacitor.

In the above scheme, the variable capacitor is formed by connecting two variable capacitors in series;

the two variable capacitors are connected in series in the following manner: the polarities are connected in the order of positive, negative and positive;

and the negative end of the variable capacitor receives the programmable reference voltage generated by the programmable reference voltage generating circuit.

In the above solution, the programmable reference voltage generating circuit is configured to set the control switch in a table look-up manner;

for broadband applications, the table holds a set of switch control words for each communication channel; for narrowband applications, only one set needs to be reserved.

The circuit for suppressing the second harmonic of the ground node of the on-chip power amplifier comprises a variable capacitor connected with the ground node of the on-chip power amplifier and a reference voltage generating circuit connected with the variable capacitor, wherein the variable capacitor is used for tuning the resonance frequency of a resonance L C network to obtain a low-resistance path, the programmable reference voltage generating circuit comprises a main control setting unit, a band-gap reference current source and a resistor array, the band-gap reference current source outputs current to act on the resistor array to obtain a series of voltage values, the main control setting unit is used for setting a multi-path control switch corresponding to each resistor in the resistor array in a table look-up mode to select the voltage generated by one resistor as a reference voltage, and the reference voltage is input to the variable capacitor.

Drawings

Fig. 1 is a schematic diagram of a circuit for suppressing a second harmonic of a ground node of an on-chip power amplifier according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of the second harmonic suppression principle;

reference numerals: 101. a power amplifier main body circuit section; 102. a programmable reference voltage generating circuit part; 103. a resonant network tuning section.

Detailed Description

In various embodiments of the invention, the circuit for suppressing the second harmonic of the on-chip power amplifier ground node comprises a variable capacitor connected with the on-chip power amplifier ground node and a reference voltage generating circuit connected with the variable capacitor, wherein the variable capacitor is used for tuning the resonance frequency of a resonance L C network to obtain a low-impedance path, the programmable reference voltage generating circuit comprises a main control setting unit, a band-gap reference current source and a resistor array, the band-gap reference current source outputs current to act on the resistor array to obtain a series of voltage values, and the main control setting unit is used for setting a plurality of paths of control switches corresponding to resistors in the resistor array in a table look-up mode to select the voltage generated by one resistor as a reference voltage which is input into the variable capacitor.

The present invention will be described in further detail with reference to examples.

The embodiment provides a circuit for suppressing second harmonic of a ground node of an on-chip power amplifier, which is characterized by comprising: a variable capacitor, a reference voltage generating circuit; wherein the content of the first and second substances,

the variable capacitor is used for tuning the resonance frequency of the resonance (L C) network to obtain a low-impedance path;

the programmable reference voltage generation circuit comprises: the band-gap reference current source outputs current to act on the resistor array to obtain a series of voltage values;

the main control setting unit is used for setting the multi-path control switches corresponding to the resistors in the resistor array in a table look-up mode so as to select the voltage generated by one of the resistors as a reference voltage; the reference voltage is input to the variable capacitor.

The resonant network comprises an L C series resonant network and a power amplifier, wherein the L C series resonant network is connected with a direct current ground path of the power amplifier in parallel;

an inductance in the resonant network, comprising: various parasitic inductances of routing, via holes and bonding wires from an on-chip ground node of the power amplifier to a system ground on the PCB;

a capacitance in the resonant network, comprising: parasitic capacitance on a routing from an on-chip ground node of the power amplifier to a system ground on a PCB, parasitic capacitance on a via hole and a bonding wire, on-chip fixed capacitance and variable capacitance; the fixed capacitor and the variable capacitor are connected in parallel, and the function of tuning the resonant frequency is realized by the variable capacitor.

Wherein the variable capacitor is formed by connecting two variable capacitors in series;

the two variable capacitors are connected in series in the following manner: the polarities are connected in the order of positive, negative and positive;

and the negative end of the variable capacitor receives the programmable reference voltage generated by the programmable reference voltage generating circuit.

The programmable reference voltage generating circuit is used for setting the control switch in a table look-up mode;

for broadband applications, the table holds a set of switch control words for each communication channel; for narrowband applications, only one set needs to be reserved.

The contents of the table to be searched may be preset and stored by a developer. The developer determination method may be determined based on the resistance values of the resistors in the resistor array.

Specifically, as shown in fig. 1, the structure of a current-to-voltage circuit according to an embodiment of the present invention is schematically illustrated, and the circuit includes: a variable capacitor, a programmable reference voltage generating circuit.

The variable capacitor is used to tune the resonant frequency of the resonant (L C) network, resulting in a low impedance path.

The programmable reference voltage generating circuit consists of a band-gap reference current source and a resistor array. The band-gap reference current source outputs band-gap reference current to act on the resistor array, so that a series of voltage values are obtained.

The programmable reference voltage generating circuit also comprises a main control unit, wherein the main control unit is used for setting the multi-way switch in a table look-up mode and selecting one of the multi-way switch as a reference voltage; the selected reference voltage is input to the variable capacitor.

Specifically, the resonant network is mainly an L C series resonant network, which is connected in parallel with the "dc ground path" of the power amplifier.

Wherein, inductance mainly contains among the resonant network: various parasitic inductances of traces, vias and bond wires between the "on-chip ground" node of the power amplifier 101 to the "system ground" on the PCB board; an on-chip spiral inductor is not required.

The capacitance in the resonance network mainly comprises: parasitic capacitance on the above path, and on-chip fixed and variable capacitors.

Here, the fixed capacitor and the variable capacitor are connected in parallel, and the function of tuning the resonance frequency is realized by the variable capacitor.

Further, the variable capacitance is composed of two variable capacitors connected in series, the polarities of the capacitors of which are connected in the order of "positive negative positive" and "negative positive". A programmable reference voltage is applied to the negative terminal of the variable capacitor.

Specifically, the control switches in the programmable reference voltage generation circuit are set by means of table lookup, the table lookup is realized by the main control unit, and the control switches S0 and S1 … SN are controlled according to the table lookup result.

In practical applications, for broadband applications, the table holds a set of switch control words for each communication channel; for narrowband applications, only one set needs to be reserved.

The embodiment of the invention provides a circuit for inhibiting the second harmonic of a ground node of an on-chip power amplifier, which realizes a low-resistance path by introducing a resonant network with serially connected capacitors and inductors between an 'on-chip ground' node of the power amplifier and a 'systematic ground' node of a PCB (printed circuit board).

In order to solve the problem that the capacitance inductance value in the series network is not easy to accurately estimate or is influenced by an application scheme, and the possible wider working frequency range of the power amplifier is considered, tuning characteristics are introduced between L C series networks in the embodiment, the tuning is mainly realized by a variable capacitor under the conditions that the area of an on-chip spiral inductor is large, the Q value is low and the like, the variable capacitor in the embodiment is realized by a MOS variable capacitor, the bias voltage of the variable capacitor can be programmed through a main control, and the resonant frequency of the L C network is adjusted by setting different bias voltages.

Currently, many communication standards support a wide operating frequency band, the frequency band is divided into a plurality of communication channels (channels) with narrower bandwidths, and a power amplifier needs to support the whole frequency band, but signals are concentrated in a single channel at each transmission. For such a communication system, the working frequency band of the power amplifier cannot be approximated to a frequency point, but bias voltages can be respectively set for each channel to enable the capacitance-inductance network to resonate at the frequency in the channel, so that a bias voltage setting table for the full working frequency band is finally obtained. When the power amplifier works, control words belonging to different channels are configured in a table look-up mode.

The above description is only exemplary of the present invention and should not be taken as limiting the scope of the present invention, and any modifications, equivalents, improvements, etc. that are within the spirit and principle of the present invention should be included in the present invention.