阅读说明：本技术 一种自适应偏置阻性源退化的低噪声跨导放大器 (Self-adaptive bias resistive source degeneration low-noise transconductance amplifier ) 是由 邹亮 刘玮 于 2020-04-21 设计创作，主要内容包括：本发明公开了一种自适应偏置阻性源退化的低噪声跨导放大器,其特征在于,包括：主放大器电路和偏置电路；主放大器电路采用PMOS差分对管输入,共源共栅结构,阻性源退化输出；偏置电路包括：P共栅管偏置电路、N电流源偏置电路和N共栅管偏置电路；P共栅管偏置电路、N电流源偏置电路和N共栅管偏置电路分别为主放大器电路提供P共栅管偏置电压、N电流源偏置电压、N共栅管偏置电压；主放大器电路的输入和输出分支分别引出一路支流,再并联构建偏置电路。本发明提供了一种自适应偏置阻性源退化的低噪声跨导放大器,在工艺电压和温度波动的情况下,保证工作点稳定,同时也避免了大电阻的问题。(The invention discloses a self-adaptive bias resistive source degeneration low-noise transconductance amplifier which is characterized by comprising the following components: a main amplifier circuit and a bias circuit; the main amplifier circuit adopts PMOS differential pair tube input, a cascode structure and resistive source degeneration output; the bias circuit includes: the P-common-gate transistor biasing circuit, the N current source biasing circuit and the N-common-gate transistor biasing circuit; the P common-gate tube bias circuit, the N current source bias circuit and the N common-gate tube bias circuit respectively provide P common-gate tube bias voltage, N current source bias voltage and N common-gate tube bias voltage for the main amplifier circuit; the input branch and the output branch of the main amplifier circuit respectively lead out a branch, and then are connected in parallel to construct a bias circuit. The invention provides a self-adaptive bias resistive source degeneration low-noise transconductance amplifier, which ensures the stability of a working point under the condition of process voltage and temperature fluctuation and avoids the problem of large resistance.)

1. A self-adaptively biased resistive source degeneration low noise transconductance amplifier, comprising: a main amplifier circuit and a bias circuit;

the main amplifier circuit adopts PMOS differential pair tube input, a cascode structure and resistive source degeneration output;

the bias circuit includes: the P-common-gate transistor biasing circuit, the N current source biasing circuit and the N-common-gate transistor biasing circuit;

the P common-gate tube bias circuit, the N current source bias circuit and the N common-gate tube bias circuit respectively provide P common-gate tube bias voltage, N current source bias voltage and N common-gate tube bias voltage for the main amplifier circuit;

and the input branch and the output branch of the main amplifier circuit respectively lead out a branch, and then are connected in parallel to construct the bias circuit.

2. The adaptive bias resistive source degeneration low noise transconductance amplifier of claim 1, wherein the main amplifier circuit comprises MOS transistor Mp0+, MOS transistor Mp0-, MOS transistor Mp1+, MOS transistor Mp1-, MOS transistor Mp2+, MOS transistor Mp2-, MOS transistor Mn1+, MOS transistor Mn1-, MOS transistor Mn2+, MOS transistor Mn2-, a first current source, a resistance Rp +, a resistance Rp-, a resistance Rn +, and a resistance Rn-; one end of the resistor Rp + is connected with a high level, the other end of the resistor Rp + is connected with the source electrode of the MOS transistor Mp1+, one end of the resistor Rp-is connected with the high level, and the other end of the resistor Rp-is connected with the source electrode of the MOS transistor Mp 1-; the drain electrode of the MOS tube Mp1+ is connected with the source electrode of the MOS tube Mp2 +; the drain electrode of the MOS tube Mp2+ is connected with the drain electrode of the MOS tube Mn2 +; the source electrode of the MOS transistor Mn2+ is connected with the drain electrode of the MOS transistor Mn1 +; the source electrode of the MOS transistor Mn1+ is connected with one end of the resistor Rn +, and the other end of the resistor Rn + is grounded; the drain electrode of the MOS tube Mp 1-is connected with the source electrode of the MOS tube Mp 2-; the drain electrode of the MOS tube Mp 2-is connected with the drain electrode of the MOS tube Mn 2-; the source electrode of the MOS transistor Mn 2-is connected with the drain electrode of the MOS transistor Mn 1-; the source electrode of the MOS transistor Mn 1-is connected with one end of the resistor Rn-, and the other end of the resistor Rn-is grounded; the MOS tube Mp1+ and the MOS tube Mp 1-grid are connected in common, and the drain electrode of the MOS tube Mp2+ is connected; the MOS tube Mp2+ and the MOS tube Mp 2-grid are connected in common; the MOS transistor Mn1+ and the MOS transistor Mn 1-are connected in common; the MOS transistor Mn2+ and the MOS transistor Mn 2-are connected in common; the source of the MOS transistor Mp0+ and the source of the MOS transistor Mp 0-are connected in common, one end of the first current source is connected with a common source point, and the other end of the first current source is connected with a high level; the drain electrode of the MOS tube Mp0+ is connected with the source electrode of the MOS tube Mn 2-; the drain electrode of the MOS tube Mp 0-is connected with the source electrode of the MOS tube Mn2 +.

3. The adaptively biased resistive source degeneration low noise transconductance amplifier of claim 2, wherein said N-current source bias circuit comprises: a MOS tube Mn3+, a MOS tube Mn 3-and a second current source; the source electrode of the MOS transistor Mn3+ is connected with the source electrode of the MOS transistor Mn1 +; the source electrode of the MOS transistor Mn 3-is connected with the source electrode of the MOS transistor Mn 1-; the MOS tube Mn3+ and the MOS tube Mn 3-are connected in common, and are simultaneously connected with one end of the second current source, and the other end of the second current source is connected with a high level; and the gate-source common contact is connected with the gate of the MOS transistor Mn1 +.

4. The adaptive bias resistive source degeneration low noise transconductance amplifier of claim 2, wherein the P-common gate transistor bias circuit comprises: MOS tube Mp4+, MOS tube Mp4-, MOS tube Mp5 and a third current source; the source electrode of the MOS tube Mp4+ is connected with the source electrode of the MOS tube Mp1-, and the source electrode of the MOS tube Mp 4-is connected with the source electrode of the MOS tube Mp1 +; the drain electrode of the MOS tube Mp4+, the drain electrode of the MOS tube Mp 4-and the source electrode of the MOS tube Mp5 are connected in common; the grid electrode of the MOS tube Mp4+, the grid electrode of the MOS tube Mp4-, the grid electrode of the MOS tube Mp5, the drain electrode of the MOS tube Mp5, the grid electrode of the MOS tube Mp 2-and one end of the third current source are connected, and the other end of the third current source is grounded.

5. The adaptive bias resistive source degeneration low noise transconductance amplifier of claim 2, wherein the N-common gate transistor bias circuit comprises: MOS transistor Mn4+, MOS transistor Mn4-, MOS transistor Mn5 and a fourth current source; the source electrode of the MOS transistor Mn4+ is connected with the source electrode of the MOS transistor Mn1+, and the source electrode of the MOS transistor Mn 4-is connected with the source electrode of the MOS transistor Mn 1-; the drain electrode of the MOS transistor Mn4+, the drain electrode of the MOS transistor Mn 4-and the source electrode of the MOS transistor Mn5 are connected in common; the grid electrode of the MOS transistor Mn4+, the grid electrode of the MOS transistor Mn4-, the grid electrode of the MOS transistor Mn5, the drain electrode of the MOS transistor Mn5, the grid electrode of the MOS transistor Mn 2-and one end of the third current source are connected, and the other end of the third current source is connected with a high level.

Technical Field

The invention relates to the technical field of amplifiers, in particular to a self-adaptive bias resistive source degeneration low-noise transconductance amplifier.

Background

The amplifier is a very critical part in an integrated circuit and is a core component of advanced systems such as a data converter, a filter, a sensor and the like, and the noise performance of the amplifier often determines the overall noise performance of the system, so that the low-noise design of the amplifier is very important.

The amplifier is mainly dominated by 1/f noise in the low frequency band, and the 1/f noise is far higher than the thermal noise of the device in the low frequency band. Because the resistor is a passive element and mainly contributes to thermal noise, the common MOS tube current source is changed into a resistive source degradation (resistive source degradation) current source, and the low-frequency noise of the current output can be obviously reduced. In low noise amplifiers, resistive source degeneration structures are widely used to reduce noise.

The folded cascode amplifier is a common transconductance amplifier structure, can provide a wider input common mode range and an output common mode range, and has the advantages of wide application range and flexible use.

Disclosure of Invention

In view of this, the invention provides a self-adaptive bias resistive source degeneration low-noise transconductance amplifier, which ensures stable working point and avoids the problem of large resistance under the condition of process voltage and temperature fluctuation.

In order to achieve the above purpose, the invention provides the following technical scheme:

an adaptively biased resistive source degeneration low noise transconductance amplifier, comprising: a main amplifier circuit and a bias circuit;

the main amplifier circuit adopts PMOS differential pair tube input, a cascode structure and resistive source degeneration output;

the bias circuit includes: the P-common-gate transistor biasing circuit, the N current source biasing circuit and the N-common-gate transistor biasing circuit;

the P common-gate tube bias circuit, the N current source bias circuit and the N common-gate tube bias circuit respectively provide P common-gate tube bias voltage, N current source bias voltage and N common-gate tube bias voltage for the main amplifier circuit;

and the input branch and the output branch of the main amplifier circuit respectively lead out a branch, and then are connected in parallel to construct the bias circuit.

Preferably, in the adaptive bias resistive source degeneration low-noise transconductance amplifier, the main amplifier circuit includes a MOS transistor Mp0+, a MOS transistor Mp0-, a MOS transistor Mp1+, a MOS transistor Mp1-, a MOS transistor Mp2+, a MOS transistor Mp2-, a MOS transistor Mn1+, a MOS transistor Mn1-, a MOS transistor Mn2+, a MOS transistor Mn2-, a first current source, a resistor Rp +, a resistor Rp-, a resistor Rn +, and a resistor Rn-; one end of the resistor Rp + is connected with a high level, the other end of the resistor Rp + is connected with the source electrode of the MOS transistor Mp1+, one end of the resistor Rp-is connected with the high level, and the other end of the resistor Rp-is connected with the source electrode of the MOS transistor Mp 1-; the drain electrode of the MOS tube Mp1+ is connected with the source electrode of the MOS tube Mp2 +; the drain electrode of the MOS tube Mp2+ is connected with the drain electrode of the MOS tube Mn2 +; the source electrode of the MOS transistor Mn2+ is connected with the drain electrode of the MOS transistor Mn1 +; the source electrode of the MOS transistor Mn1+ is connected with one end of the resistor Rn +, and the other end of the resistor Rn + is grounded; the drain electrode of the MOS tube Mp 1-is connected with the source electrode of the MOS tube Mp 2-; the drain electrode of the MOS tube Mp 2-is connected with the drain electrode of the MOS tube Mn 2-; the source electrode of the MOS transistor Mn 2-is connected with the drain electrode of the MOS transistor Mn 1-; the source electrode of the MOS transistor Mn 1-is connected with one end of the resistor Rn-, and the other end of the resistor Rn-is grounded; the MOS tube Mp1+ and the MOS tube Mp 1-grid are connected in common, and the drain electrode of the MOS tube Mp2+ is connected; the MOS tube Mp2+ and the MOS tube Mp 2-grid are connected in common; the MOS transistor Mn1+ and the MOS transistor Mn 1-are connected in common; the MOS transistor Mn2+ and the MOS transistor Mn 2-are connected in common; the source of the MOS transistor Mp0+ and the source of the MOS transistor Mp 0-are connected in common, one end of the first current source is connected with a common source point, and the other end of the first current source is connected with a high level; the drain electrode of the MOS tube Mp0+ is connected with the source electrode of the MOS tube Mn 2-; the drain electrode of the MOS tube Mp 0-is connected with the source electrode of the MOS tube Mn2 +.

Preferably, in the adaptive bias resistive source degeneration low noise transconductance amplifier described above, the N current source bias circuit includes: a MOS tube Mn3+, a MOS tube Mn 3-and a second current source; the source electrode of the MOS transistor Mn3+ is connected with the source electrode of the MOS transistor Mn1 +; the source electrode of the MOS transistor Mn 3-is connected with the source electrode of the MOS transistor Mn 1-; the MOS tube Mn3+ and the MOS tube Mn 3-are connected in common, and are simultaneously connected with one end of the second current source, and the other end of the second current source is connected with a high level; and the gate-source common contact is connected with the gate of the MOS transistor Mn1 +.

Preferably, in the adaptive bias resistive source degeneration low noise transconductance amplifier described above, the P-common gate transistor bias circuit includes: MOS tube Mp4+, MOS tube Mp4-, MOS tube Mp5 and a third current source; the source electrode of the MOS tube Mp4+ is connected with the source electrode of the MOS tube Mp1-, and the source electrode of the MOS tube Mp 4-is connected with the source electrode of the MOS tube Mp1 +; the drain electrode of the MOS tube Mp4+, the drain electrode of the MOS tube Mp 4-and the source electrode of the MOS tube Mp5 are connected in common; the grid electrode of the MOS tube Mp4+, the grid electrode of the MOS tube Mp4-, the grid electrode of the MOS tube Mp5, the drain electrode of the MOS tube Mp5, the grid electrode of the MOS tube Mp 2-and one end of the third current source are connected, and the other end of the third current source is grounded.

Preferably, in the adaptive bias resistive source degeneration low noise transconductance amplifier described above, the N-common gate transistor bias circuit includes: MOS transistor Mn4+, MOS transistor Mn4-, MOS transistor Mn5 and a fourth current source; the source electrode of the MOS transistor Mn4+ is connected with the source electrode of the MOS transistor Mn1+, and the source electrode of the MOS transistor Mn 4-is connected with the source electrode of the MOS transistor Mn 1-; the drain electrode of the MOS transistor Mn4+, the drain electrode of the MOS transistor Mn 4-and the source electrode of the MOS transistor Mn5 are connected in common; the grid electrode of the MOS transistor Mn4+, the grid electrode of the MOS transistor Mn4-, the grid electrode of the MOS transistor Mn5, the drain electrode of the MOS transistor Mn5, the grid electrode of the MOS transistor Mn 2-and one end of the third current source are connected, and the other end of the third current source is connected with a high level.

Compared with the prior art, the low-noise transconductance amplifier with the self-adaptive bias resistive source degeneration, disclosed by the invention, has the advantages that the stability of the working point is ensured under the condition of process voltage and temperature fluctuation, and meanwhile, the problem of large resistance is avoided. The MOS transistor Mn3+ and the MOS transistor Mn 3-in the N current source bias circuit respectively draw currents from the resistor Rn + and the resistor Rn-, and then are connected in parallel with the grid and the drain, and the N current source bias circuit is equivalent to a single-resistor bias circuit from the perspective of common-mode signals. MOS pipe Mn3+ and MOS pipe Mn 3-are symmetrical, and guarantee that the differential operation of the amplifier is not influenced. In the P-common-gate transistor bias circuit, from the perspective of common-mode signals, a single Mn4 is seen, and then this Mn4 is connected in series with Mn5 to provide a bias voltage to Mn 2. In the N-common-gate tube bias circuit, a single Mp4 is seen from the perspective of common-mode signals, and then the Mp4 is connected with the Mp5 in series to provide bias voltage for the Mp 2.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

FIG. 1 is a schematic circuit diagram of the present invention;

fig. 2 shows a bias circuit of a single resistor according to the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

An adaptively biased resistive source degeneration low noise transconductance amplifier, as shown in fig. 1, comprising: a main amplifier circuit and a bias circuit;

the main amplifier circuit adopts PMOS differential pair tube input, a cascode structure and resistive source degeneration output;

the bias circuit includes: the P-common-gate transistor biasing circuit, the N current source biasing circuit and the N-common-gate transistor biasing circuit;

the P common-gate tube bias circuit, the N current source bias circuit and the N common-gate tube bias circuit respectively provide P common-gate tube bias voltage, N current source bias voltage and N common-gate tube bias voltage for the main amplifier circuit;

the input branch and the output branch of the main amplifier circuit respectively lead out a branch, and then are connected in parallel to construct a bias circuit.

In order to further optimize the technical scheme, the main amplifier circuit comprises an MOS tube Mp0+, an MOS tube Mp0-, an MOS tube Mp1+, an MOS tube Mp1-, an MOS tube Mp2+, an MOS tube Mp2-, an MOS tube Mn1+, an MOS tube Mn1-, an MOS tube Mn2+, an MOS tube Mn2-, a first current source, a resistor Rp +, a resistor Rp-, a resistor Rn + and a resistor Rn-; one end of the resistor Rp + is connected with a high level, the other end of the resistor Rp + is connected with the source electrode of the MOS transistor Mp1+, one end of the resistor Rp-is connected with the high level, and the other end of the resistor Rp-is connected with the source electrode of the MOS transistor Mp 1-; the drain electrode of the MOS tube Mp1+ is connected with the source electrode of the MOS tube Mp2 +; the drain electrode of the MOS tube Mp2+ is connected with the drain electrode of the MOS tube Mn2 +; the source electrode of the MOS transistor Mn2+ is connected with the drain electrode of the MOS transistor Mn1 +; the source electrode of the MOS transistor Mn1+ is connected with one end of the resistor Rn +, and the other end of the resistor Rn + is grounded; the drain electrode of the MOS tube Mp 1-is connected with the source electrode of the MOS tube Mp 2-; the drain electrode of the MOS tube Mp 2-is connected with the drain electrode of the MOS tube Mn 2-; the source electrode of the MOS transistor Mn 2-is connected with the drain electrode of the MOS transistor Mn 1-; the source electrode of the MOS transistor Mn 1-is connected with one end of the resistor Rn-, and the other end of the resistor Rn-is grounded; the MOS tube Mp1+ and the MOS tube Mp 1-are connected in common, and are connected with the drain electrode of the MOS tube Mp2 +; the MOS transistor Mp2+ and the MOS transistor Mp 2-grid are connected in common; the MOS transistor Mn1+ and the MOS transistor Mn 1-are connected in common; the MOS transistor Mn2+ and the MOS transistor Mn 2-are connected in common; the source electrode of the MOS tube Mp0+ and the source electrode of the MOS tube Mp 0-are connected in common, one end of the first current source is connected with a common source electrode point, and the other end of the first current source is connected with a high level; the drain electrode of the MOS tube Mp0+ is connected with the source electrode of the MOS tube Mn 2-; the drain electrode of the MOS tube Mp 0-is connected with the source electrode of the MOS tube Mn2 +.

In order to further optimize the above technical solution, the N current source bias circuit includes: a MOS tube Mn3+, a MOS tube Mn 3-and a second current source; the source electrode of the MOS transistor Mn3+ is connected with the source electrode of the MOS transistor Mn1 +; the source electrode of the MOS transistor Mn 3-is connected with the source electrode of the MOS transistor Mn 1-; the MOS tube Mn3+ and the MOS tube Mn 3-are connected in common, and are simultaneously connected with one end of a second current source, and the other end of the second current source is connected with a high level; the gate-source common contact is connected with the gate of the MOS transistor Mn1 +.

In order to further optimize the technical scheme, the P common-gate tube biasing circuit comprises: MOS tube Mp4+, MOS tube Mp4-, MOS tube Mp5 and a third current source; the source electrode of the MOS tube Mp4+ is connected with the source electrode of the MOS tube Mp1-, and the source electrode of the MOS tube Mp 4-is connected with the source electrode of the MOS tube Mp1 +; the drain electrode of the MOS tube Mp4+, the drain electrode of the MOS tube Mp 4-and the source electrode of the MOS tube Mp5 are connected in common; the grid electrode of the MOS tube Mp4+, the grid electrode of the MOS tube Mp4-, the grid electrode of the MOS tube Mp5, the drain electrode of the MOS tube Mp5, the grid electrode of the MOS tube Mp 2-and one end of the third current source are connected, and the other end of the third current source is grounded.

In order to further optimize the technical scheme, the N-common-gate tube biasing circuit comprises: MOS transistor Mn4+, MOS transistor Mn4-, MOS transistor Mn5 and a fourth current source; the source electrode of the MOS tube Mn4+ is connected with the source electrode of the MOS tube Mn1+, and the source electrode of the MOS tube Mn 4-is connected with the source electrode of the MOS tube Mn 1-; the drain electrode of the MOS tube Mn4+, the drain electrode of the MOS tube Mn 4-and the source electrode of the MOS tube Mn5 are connected in common; the grid electrode of the MOS transistor Mn4+, the grid electrode of the MOS transistor Mn4-, the grid electrode of the MOS transistor Mn5, the drain electrode of the MOS transistor Mn5, the grid electrode of the MOS transistor Mn 2-and one end of a third current source are connected, and the other end of the third current source is connected with a high level.

As shown in fig. 1, taking the NMOS bias as an example, the MOS transistor Mn3+ and the MOS transistor Mn 3-draw currents from the resistor Rn + and the resistor Rn-respectively, and then are connected in common with the gate and the drain, so that the bias circuit shown in fig. 2 is equivalent in terms of common mode signals. MOS transistor Mn3+ and MOS transistor Mn 3-are symmetrical and therefore do not affect the differential operation of the amplifier.

MOS transistor Mn4+ is similar to MOS transistor Mn 4-and from a common mode signal point of view, can be seen as a single Mn4, and then this Mn4 is connected in series with Mn5 to provide a bias voltage for Mn 2.

The P-tube need only provide a bias for the common-gate tube Mp2, similar to the case of the N-common-gate tube.

As shown in fig. 2, the single resistor bias circuit can intuitively determine that the output current I2 perfectly replicates the input current I1, and simultaneously can maintain the advantage of low noise caused by the resistive degradation principle. Compared with a traditional resistive degeneration current source, only the transistor M1 is added, and since the bias circuit generally sets the width-to-length ratio of M1 to be far smaller than M2, the noise current contribution of M1 is far smaller than M2, so that the total noise current output of I2 is only slightly increased.

However, the single resistor bias circuit shown in fig. 1 breaks the differential operation of the transconductance amplifier. The bias voltage is essentially a common mode signal. Therefore, a method of respectively leading out one branch from two branches of the transconductance amplifier and then connecting the branches in parallel is proposed to construct the bias circuit.

Has the advantages that:

the self-adaptive bias resistive source degeneration low-noise transconductance amplifier ensures the stability of a working point under the condition of process voltage and temperature fluctuation, and simultaneously avoids the problem of large resistance.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.