阅读说明：本技术 一种有源偏置集成电路宽带低噪声放大器 (Active bias integrated circuit broadband low-noise amplifier ) 是由 李怀明 朱世贵 于 2020-06-17 设计创作，主要内容包括：本发明公开了一种有源偏置集成电路宽带低噪声放大器,该放大器包括PHEMT放大管芯、源极匹配电路、有源偏置电路、输入匹配电路、输出匹配电路和负反馈电路,PHEMT放大管芯FET1、源极匹配电路和有源偏置电路集成在GaAs芯片上,输入匹配电路、输出匹配电路和负反馈电路由分立器件构成。本发明既可以很好地解决在高低温下放大管参数波动的问题,同时片上有源偏置结构体积远小于混合集成的BJT晶体管,更有利于减小体积、提高产品一致性、降低成本；本发明的放大器具有批量一致性好、体积小、成本低廉、灵活度高、噪声低、工作频段宽以及易于集成使用的优点,进而使得其在组件和微系统中应用更为灵活,使用更为方便。(The invention discloses an active bias integrated circuit broadband low noise amplifier, which comprises a PHEMT amplifying tube core, a source electrode matching circuit, an active bias circuit, an input matching circuit, an output matching circuit and a negative feedback circuit, wherein the PHEMT amplifying tube core FET1, the source electrode matching circuit and the active bias circuit are integrated on a GaAs chip, and the input matching circuit, the output matching circuit and the negative feedback circuit are formed by discrete devices. The invention can well solve the problem of parameter fluctuation of the amplification tube at high and low temperature, and meanwhile, the volume of the on-chip active bias structure is far smaller than that of a hybrid integrated BJT transistor, thereby being more beneficial to reducing the volume, improving the product consistency and reducing the cost; the amplifier has the advantages of good batch consistency, small volume, low cost, high flexibility, low noise, wide working frequency range and easy integrated use, thereby leading the amplifier to be more flexible and convenient to use in components and microsystems.)

1. The broadband low-noise amplifier is characterized by comprising a PHEMT amplification tube core, a source matching circuit, an active bias circuit, an input matching circuit, an output matching circuit and a negative feedback circuit, wherein the PHEMT amplification tube core FET1, the source matching circuit and the active bias circuit are integrated on a GaAs chip, the input matching circuit, the output matching circuit and the negative feedback circuit are formed by discrete devices, the input matching circuit, the PHEMT amplification tube core FET1, the negative feedback circuit and the output matching circuit are sequentially connected in a cascade mode, the source matching circuit is connected with the source of the PHEMT amplification tube core FET1, and the active bias circuit is respectively connected with the negative feedback circuit and the grid of the PHEMT amplification tube core FET 1.

2. The active bias integrated circuit broadband low noise amplifier of claim 1, wherein the input matching circuit comprises a capacitor C1 and a microstrip line TL1, one end of the capacitor C1 is used as an input terminal of the amplifier, the other end is connected to the microstrip line TL1 through gold wire, and the other end of the microstrip line TL1 is connected to the gate of the PHEMT amplifying die FET1 through gold wire.

3. The active bias integrated circuit wideband low noise amplifier of claim 1, wherein the negative feedback circuit comprises a resistor R3, a resistor R4, a capacitor C2, an inductor L1, and an inductor L4, the resistor R4 and the inductor L4 are connected in parallel, and a first terminal is connected to the drain of PHEMT amplifier die FET1, and a second terminal is connected to the gate of PHEMT amplifier die FET1 through the resistor R3, the capacitor C2, and the inductor L1 connected in series.

4. The active bias integrated circuit wideband low noise amplifier of claim 3, wherein the second terminal of the resistor R4 and the inductor L4 connected in parallel is connected to the amplifier power supply via the inductor L3.

5. The active bias integrated circuit broadband low noise amplifier according to claim 3, wherein the output matching circuit comprises a capacitor C3 and a microstrip line TL2, one end of the capacitor C2 is used as the output end of the amplifier, the other end of the capacitor C2 is connected with the microstrip line TL2 through a gold wire, and the other end of the microstrip line TL2 is connected with the second ends of the resistor R4 and the inductor L4 through a gold wire.

6. The actively biased integrated circuit broadband low noise amplifier as claimed in any one of claims 1, 3, 4 and 5, wherein the source matching circuit comprises a resistor R5 and an inductor L2 connected in series, the other end of the resistor R5 is connected to the source of the PHEMT amplifying die FET1, and the other end of the inductor L2 is grounded.

7. The actively biased integrated circuit wideband low noise amplifier of claim 6, wherein the resistor R5 and/or the inductor L2 are formed by discrete devices.

8. The actively biased integrated circuit wideband low noise amplifier as claimed in claim 3 or 5, wherein said active bias circuit comprises PHEMT amplifying die FET2, resistor R1 and resistor R2, the gate of said PHEMT amplifying die FET2 is connected to the drain, the drain of said PHEMT amplifying die FET2 is connected to the gate of PHEMT amplifying die FET1 via resistor R2 and also to the amplifier power supply via resistor R1, the source of said PHEMT amplifying die FET2 is connected to ground.

9. The active bias integrated circuit wideband low noise amplifier of claim 8, further comprising a PHEMT amplifier die FET3 cascaded with the PHEMT amplifier die FET2, the gate of the PHEMT amplifier die FET3 connected to the drain, the drain of the PHEMT amplifier die FET3 connected to the source of PHEMT amplifier die FET2, the source of the PHEMT amplifier die FET3 connected to ground.

Technical Field

The invention belongs to the technical field of low-noise amplifiers, and particularly relates to an active bias integrated circuit broadband low-noise amplifier.

Background

A Low Noise Amplifier (LNA) is a key component of a receiver, and its performance largely determines the receiving sensitivity of the receiver. The low noise amplifier, and particularly the first stage low noise amplifier, is critical to the overall receiving system, and its performance largely determines the sensitivity of the system. In recent years, with the development of ultra-wideband radar and ultra-wideband communication systems, the demand for wideband receivers has increased dramatically, and further, the demand for wideband low-noise amplifiers has increased.

The design and implementation modes of the traditional amplifier are generally divided into two types, one type is a hybrid integrated circuit based on an integrated circuit and discrete components, and the amplifier has the advantages of flexible design, low cost and large size and debugging amount; the other is a monolithic integrated circuit, all components are integrated on one chip, and the monolithic integrated circuit has the advantages of good consistency, small volume and high development cost and is limited by a specific process.

Due to the temperature fluctuation of the internal and external environments caused by the fluctuation of the external temperature and the heating of the whole receiver, the low noise amplifier is required to stably work in a certain temperature range (for example, -55 ℃ to 125 ℃), which requires that the parameter fluctuation of the low noise amplifier at high and low temperatures is not too large. Due to the fact that the IV characteristic curve and the starting voltage of the amplification tube are different at different temperatures, parameters of gain, noise, power and the like of the whole amplifier fluctuate under different temperature states, and accordingly the parameter change of the whole amplifier is large under different temperature environments.

Under the high and low temperature working conditions, corresponding required voltages need to be provided for the amplifying tube at different temperatures to ensure that the working condition of the amplifier is approximately constant. In the amplifier with the conventional structure, the way of supplying the gate voltage to the amplifying tube is resistance voltage division, and the IV curve of the resistance material at high and low temperatures (e.g., -65 ℃ to 150 ℃) is approximately a straight line, the resistance of the resistance material is approximately a constant value, and the voltage division resistance is constant for the voltage supplied by the amplifying tube. Under different temperature states, the voltage given by the resistor voltage division mode cannot change along with the voltage required by the amplifier, so that the working current of the amplifier under high and low temperatures is greatly changed.

For this situation, the original solutions are generally divided into two types: one is that when the component or the micro-system uses the amplifier, the additional design introduces a corresponding temperature compensation device to ensure the stability of the parameters. Because of the process difficulty and the realization form of the temperature compensation device, the device can not be integrated on a chip, the mode is only suitable for the occasions with low requirements on volume and weight, and meanwhile, the temperature compensation device has limited types, can not meet the index requirements of all amplifiers, has high cost and is not beneficial to batch production; another solution is to use BJT transistors instead of the voltage dividing resistors of the amplifier, and to implement the active bias circuit in a hybrid integration manner to provide voltage to the amplifier tubes. The scheme can provide corresponding working voltage for the amplifying tube core in different temperature states, and can solve the problem of index fluctuation of the amplifier at high and low temperatures to a certain extent, but the mixed integration of BJT transistors has the disadvantages of large debugging amount, large parasitic parameters of devices and poor consistency when realizing active bias, and in addition, the independent transistors have large volumes, so that the amplifier for realizing the purposes of large volume, high cost and non-conformity with the trend of miniaturization, light weight and low cost.

Disclosure of Invention

Aiming at the defects in the prior art, the invention provides an active bias integrated circuit broadband low-noise amplifier which is built by combining chip integration and hybrid integration.

In order to achieve the purpose of the invention, the invention adopts the technical scheme that:

an active bias integrated circuit broadband low-noise amplifier comprises a PHEMT amplifying tube core, a source electrode matching circuit, an active bias circuit, an input matching circuit, an output matching circuit and a negative feedback circuit, wherein the PHEMT amplifying tube core FET1, the source electrode matching circuit and the active bias circuit are integrated on a GaAs chip, the input matching circuit, the output matching circuit and the negative feedback circuit are composed of discrete devices, the input matching circuit, the PHEMT amplifying tube core FET1, the negative feedback circuit and the output matching circuit are sequentially connected in a cascade mode, the source electrode matching circuit is connected with a source electrode of the PHEMT amplifying tube core FET1, and the active bias circuit is respectively connected with the negative feedback circuit and a grid electrode of the PHEMT amplifying tube core FET 1.

Further, the input matching circuit comprises a capacitor C1 and a microstrip line TL1, one end of the capacitor C1 is used as an input end of the amplifier, the other end of the capacitor C1 is connected with the microstrip line TL1 through a gold wire, and the other end of the microstrip line TL1 is connected with a gate of the PHEMT amplification die FET1 through a gold wire.

Further, the negative feedback circuit comprises a resistor R3, a resistor R4, a capacitor C2, an inductor L1 and an inductor L4, wherein the resistor R4 and the inductor L4 are connected in parallel, a first end of the resistor R4 is connected with the drain of the PHEMT amplifying die FET1, and a second end of the resistor R3, the capacitor C2 and the inductor L1 are connected with the gate of the PHEMT amplifying die FET1 in series.

Further, a second end of the resistor R4 connected in parallel with the inductor L4 is connected to an amplifier power supply via an inductor L3.

Further, the output matching circuit comprises a capacitor C3 and a microstrip line TL2, one end of the capacitor C2 serves as an output end of the amplifier, the other end of the capacitor C2 is connected with the microstrip line TL2 through a gold wire, and the other end of the microstrip line TL2 is connected with the second ends of the resistor R4 and the inductor L4 through the gold wire.

Further, the source matching circuit comprises a resistor R5 and an inductor L2 which are connected in series, the other end of the resistor R5 is connected with the source of the PHEMT amplifying die FET1, and the other end of the inductor L2 is grounded.

Further, the resistor R5 and/or the inductor L2 are formed by discrete devices.

Further, the active bias circuit comprises a PHEMT amplifier die FET2, a resistor R1, and a resistor R2, the gate and the drain of the PHEMT amplifier die FET2 are connected, the drain of the PHEMT amplifier die FET2 is connected to the gate of the PHEMT amplifier die FET1 via a resistor R2, and is also connected to an amplifier power supply via a resistor R1, and the source of the PHEMT amplifier die FET2 is grounded.

Further, the active bias circuit further includes a PHEMT amplifier die FET3 cascaded with the PHEMT amplifier die FET2, the gate and drain of the PHEMT amplifier die FET3 being connected, the drain of the PHEMT amplifier die FET3 being connected to the source of the PHEMT amplifier die FET2, the source of the PHEMT amplifier die FET3 being grounded.

The invention has the following beneficial effects:

the active bias circuit and the source electrode matching circuit are integrated on the GaAs chip, so that the problem of parameter fluctuation of the amplification tube at high and low temperatures can be well solved, and meanwhile, the volume of the on-chip active bias structure is far smaller than that of a hybrid integrated BJT transistor, so that the volume is reduced, the product consistency is improved, and the cost is reduced; the method combines the advantages of precision and batch consistency of chip circuits and the characteristics of low cost and flexible debugging of the hybrid integrated circuit, and the realized amplifier has the advantages of good batch consistency, small volume, low cost, high flexibility, low noise, wide working frequency range and easy integrated use, thereby leading the application of the amplifier in assemblies and microsystems to be more flexible and leading the use to be more convenient.

Drawings

FIG. 1 is a schematic diagram of an active bias integrated circuit broadband low noise amplifier of the present invention;

fig. 2 is a schematic diagram of an active bias integrated circuit broadband low noise amplifier according to an embodiment of the present invention.

Detailed Description

The following description of the embodiments of the present invention is provided to facilitate the understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and it will be apparent to those skilled in the art that various changes may be made without departing from the spirit and scope of the invention as defined and defined in the appended claims, and all matters produced by the invention using the inventive concept are protected.

As shown in fig. 1, an embodiment of the present invention provides an active bias integrated circuit broadband low noise amplifier, which includes a PHEMT amplifier die, a source matching circuit, an active bias circuit, an input matching circuit, an output matching circuit, and a negative feedback circuit, where the PHEMT amplifier die FET1, the source matching circuit, and the active bias circuit are integrated on a GaAs chip, the input matching circuit, the output matching circuit, and the negative feedback circuit are formed by discrete devices, the input matching circuit, the PHEMT amplifier die FET1, the negative feedback circuit, and the output matching circuit are sequentially connected in cascade, the source matching circuit is connected to a source of the PHEMT amplifier die FET1, and the active bias circuit is connected to gates of the negative feedback circuit and the PHEMT amplifier die FET1, respectively.

The invention is different from the realization mode of singly packaging the amplifier tube and integrating discrete components in the traditional hybrid integrated amplifier, creatively adopts the combination mode of single-chip integration and hybrid integration, integrates the source matching network and the active bias network which have high circuit sensitivity, high debugging difficulty and high requirements on precision and consistency in the hybrid integrated amplifier and the PHEMT amplifier tube core on a GaAs single chip, and combines other discrete devices to realize the active bias integrated circuit broadband low noise amplifier.

The source matching network and the active bias network are integrated on the GaAs chip together with the amplifier tube core to form a quasi chip, so that the volume of the amplifier is greatly reduced, the product consistency is improved, and the production cost is reduced; and then the integrated quasi-chip is cascaded with an input-output matching network and a feed network which are composed of the surface-mounted element and the ceramic circuit, so as to realize the active bias hybrid integrated broadband low-noise amplifier.

The invention adopts GaAs E-pHEMT process design to improve the amplifier chip with the active bias negative feedback structure, and compared with a divider resistor, the active bias can provide different voltages along with different bias conditions of the amplifier tube core at high and low temperatures, thereby effectively ensuring the stability of the bias voltage during temperature change and further ensuring the stable work of the circuit in a wide temperature range.

The invention improves the current negative feedback and voltage negative feedback circuits of the amplifier, further optimizes the index of the amplifier and widens the amplification gain bandwidth.

In an alternative embodiment of the present invention, as shown in fig. 2, the input matching circuit of the present invention is implemented by using discrete devices, and specifically includes a capacitor C1 and a microstrip line TL1, one end of the capacitor C1 is used as an input terminal of an amplifier, the other end is connected to the microstrip line TL1 through a gold wire, and the other end of the microstrip line TL1 is connected to the gate of the PHEMT amplifier die FET1 through a gold wire.

In an alternative embodiment of the present invention, as shown in fig. 2, the negative feedback circuit of the present invention is implemented by using discrete devices, and specifically includes a resistor R3, a resistor R4, a capacitor C2, an inductor L1, and an inductor L4, where the resistor R4 and the inductor L4 are connected in parallel, a first end of the parallel structure is connected to the drain of the PHEMT amplifier die FET1, and a second end of the parallel structure is connected to the gate of the PHEMT amplifier die FET1 through the resistor R3, the capacitor C2, and the inductor L1 connected in series.

In addition, the second end of the resistor R4 connected in parallel with the inductor L4 is also connected with the amplifier power supply through the inductor L3.

In an alternative embodiment of the present invention, as shown in fig. 2, the output matching circuit of the present invention is implemented by using discrete devices, and specifically includes a capacitor C3 and a microstrip line TL2, one end of a dc blocking capacitor C2 is used as an output terminal of the amplifier, the other end of the dc blocking capacitor C2 is connected to the microstrip line TL2 through a gold wire, and the other end of the microstrip line TL2 is connected to the second ends of the resistor R4 and the inductor L4 through a gold wire.

The input matching circuit, the output matching circuit and the negative feedback circuit are all formed by discrete devices, and particularly, the input matching circuit, the output matching circuit and the negative feedback circuit can be realized by adopting a ceramic substrate, a surface-mounted element and a ceramic microstrip line.

In an alternative embodiment of the present invention, as shown in fig. 2, the source matching circuit of the present invention includes a resistor R5 and an inductor L2 connected in series, where the other end of the resistor R5 is connected to the source of the PHEMT amplifier die FET1, and the other end of the inductor L2 is grounded, so as to effectively improve the performance of the amplifier while ensuring the stability of the circuit structure.

In addition, the resistor R5 and/or the inductor L2 can be externally connected by a discrete device instead of being completely integrated on a GaAs chip.

In an alternative embodiment of the present invention, as shown in fig. 2, the active bias circuit of the present invention includes PHEMT amplifier die FET2, resistor R1 and resistor R2, the gate of PHEMT amplifier die FET2 being connected to the drain, the drain of PHEMT amplifier die FET2 being connected to the gate of PHEMT amplifier die FET1 via resistor R2, powering the gate of PHEMT amplifier die FET1, the drain of PHEMT amplifier die FET2 also being connected to the amplifier power supply via current limiting resistor R1, and the source of PHEMT amplifier die FET2 being connected to ground.

In addition, the invention may also have a PHEMT amplifier die FET3 cascaded to the source of PHEMT amplifier die FET2, the gate of PHEMT amplifier die FET3 connected to the drain, the drain of PHEMT amplifier die FET3 connected to the source of PHEMT amplifier die FET2, and the source of PHEMT amplifier die FET3 grounded.

The PHEMT amplifier die FET1, PHEMT amplifier die FET2, and PHEMT amplifier die FET3 of the present invention all employ GaAs E-PHEMT type amplifier dies.

The active bias circuit and the source electrode matching circuit are integrated on the GaAs chip, so that the problem of parameter fluctuation of the amplification tube at high and low temperatures can be well solved, and meanwhile, the volume of the on-chip active bias structure is far smaller than that of a hybrid integrated BJT transistor, so that the volume is reduced, the product consistency is improved, and the cost is reduced. The mode combines the advantages of precision and batch consistency of chip circuits and the characteristics of low cost and flexible debugging of hybrid integrated circuits, and the realized amplifier has the advantages of good batch consistency, small volume, low cost, high flexibility, low noise, wide working frequency range and easy integrated use, and the characteristics ensure that the amplifier is flexibly applied to components and microsystems and is convenient to use.

It will be appreciated by those of ordinary skill in the art that the embodiments described herein are intended to assist the reader in understanding the principles of the invention and are to be construed as being without limitation to such specifically recited embodiments and examples. Those skilled in the art can make various other specific changes and combinations based on the teachings of the present invention without departing from the spirit of the invention, and these changes and combinations are within the scope of the invention.