阅读说明：本技术 一种三相二次回路空载在线巡检测试仪 (Three-phase secondary circuit no-load on-line inspection tester ) 是由 王晖南 闫永升 宋世卫 谢振刚 马斌 韩海洲 韩迎军 吴万军 刘佳易 孙晋凯 苗 于 2020-05-25 设计创作，主要内容包括：本发明涉及一种三相二次回路空载在线巡检测试仪。主要解决现有电能表空载计量在线巡检测试仪存在的不能给出完整相量图和没有相量图数据库的技术问题。本发明的技术方案是：其由输入信号电路、电流信号模数变换电路、电压信号模数变换电路、电压电流信号相位测量电路和LCD液晶屏组成,所述输入信号电路的电流信号输出端和电压信号输出端与所述电流信号模数变换电路的输入端和电压信号模数变换电路的输入端连接,所述电流信号模数变换电路的输出端与电压电流信号相位测量电路的电流信号输入端连接,所述电压信号模数变换电路的输出端与电压电流信号相位测量电路的电压信号输入端连接,所述电压电流信号相位测量电路的显示信号输出端与LCD液晶屏连接。(The invention relates to a three-phase secondary circuit no-load on-line inspection tester. The electric energy meter no-load measurement online inspection tester mainly solves the technical problems that an existing electric energy meter no-load measurement online inspection tester cannot provide a complete phasor diagram and does not have a phasor diagram database. The technical scheme of the invention is as follows: the LCD liquid crystal display device is composed of an input signal circuit, a current signal analog-to-digital conversion circuit, a voltage current signal phase measurement circuit and an LCD liquid crystal display, wherein a current signal output end and a voltage signal output end of the input signal circuit are connected with an input end of the current signal analog-to-digital conversion circuit and an input end of the voltage signal analog-to-digital conversion circuit, an output end of the current signal analog-to-digital conversion circuit is connected with a current signal input end of the voltage current signal phase measurement circuit, an output end of the voltage signal analog-to-digital conversion circuit is connected with a voltage signal input end of the voltage current signal phase measurement circuit, and a display signal output end of the voltage.)

1. The utility model provides a no-load on-line inspection tester of three-phase secondary circuit which characterized in that: the LCD liquid crystal display device is characterized by comprising an input signal circuit, a current signal analog-to-digital conversion circuit, a voltage current signal phase measurement circuit and an LCD liquid crystal display, wherein a current signal output end of the input signal circuit is connected with an input end of the current signal analog-to-digital conversion circuit, a voltage signal output end of the input signal circuit is connected with an input end of the voltage signal analog-to-digital conversion circuit, an output end of the current signal analog-to-digital conversion circuit is connected with a current signal input end of the voltage current signal phase measurement circuit, an output end of the voltage signal analog-to-digital conversion circuit is connected with a voltage signal input end of the voltage current signal phase measurement circuit, and a display signal output end of.

2. The no-load on-line inspection tester for the three-phase secondary circuit according to claim 1, characterized in that: the input signal circuit consists of an A-phase aviation plug L1, a B-phase aviation plug L2, a C-phase aviation plug L3, a power input transformer B1, a switching power source UR, a power switch K, three voltage loop transformation transformers B2, B3 and B4, three current loop isolation transformers B5, B6 and B7, a three-phase secondary voltage conversion relay J1, three voltage current loop relays J2, J3 and J4, two diodes D1 and D2, pins 1 and 2 of the A-phase aviation plug L1 are connected with the primary side of the power input transformer B1 and the primary side of a first voltage loop transformation transformer B2, pins 3 and 4 of the A-phase aviation plug L1 are connected with the primary side of a first current loop isolation transformer B5, pins 1 and 2 of the B-phase aviation plug L2 are connected with the primary side of a second voltage loop transformation transformer B3, and pins 3 and 4 of the B-phase aviation plug L2 are connected with the primary side of a second voltage loop isolation transformer B6, pins 1 and 2 of the C-phase air plug L3 are connected with the primary of a third voltage loop transformation transformer B4, pins 3 and 4 of the C-phase air plug L3 are connected with the primary of a third current loop isolation transformer B7, the secondary of the power input transformer B1 is connected with the input end of a switching power source UR, the power switch K is arranged on a line between the secondary of the power input transformer B1 and the input end of the switching power source UR, one end of the secondary of the three voltage loop transformation transformers B2, B3 and B4 is connected with the normally closed contact of a three-phase secondary voltage transformation relay J1, the movable contact of the three-phase secondary voltage transformation relay J1 is connected with one normally open contact of three voltage current loop relays J2, J3 and J4, the middle end of the secondary of the three voltage loop transformation relays B2, B3 and B4 is connected with the normally open contact of the three-phase secondary voltage transformation relay J1, the other ends of the secondary sides of the three voltage loop transformer converters B2, B3 and B4 are grounded, the secondary terminals of the three current loop isolation transformers B5, B6 and B7 are connected with the other normally open contact of the three voltage current loop relays J2, J3 and J4, the other ends of the secondary sides of the three current loop isolation transformers B5, B6 and B7 are grounded, one movable contact of the three voltage current loop relays J2, J3 and J4 is connected to form a voltage signal output end u, the other movable contact of the three voltage-current loop relays J2, J3 and J4 is connected to form a current signal output terminal i, the anode of the first diode D1 is connected with the cathode of the second diode D2 and then connected with the current signal output terminal i, and the cathode of the first diode D1 is connected with the anode of the second diode D2 and then grounded to form a voltage limiting loop of the current loop.

3. The no-load on-line inspection tester for the three-phase secondary circuit according to claim 1, characterized in that: the current signal analog-digital conversion circuit comprises 15 resistors R1 to R15, a first variable resistor RP1, 5 operational amplifiers OP1 to OP5 and two capacitors C1 and C2, one end of the first resistor R1 is connected with the current signal output end i of the input signal circuit, the other end of the first resistor R1 is connected with the 3-pin of the first operational amplifier OP1, the 6-pin of the first operational amplifier OP1 is connected with one end of the second resistor R2 and one end of the fourth resistor R4, the 2-pin of the first operational amplifier OP1 is connected with the other end of the second resistor R2 and one end of the third resistor R3, the other end of the third resistor R9 is grounded, the other end of the fourth resistor R4 is connected with the 3-pin of the second operational amplifier OP2, the 6-pin of the second operational amplifier OP2 is connected with one end of the fifth resistor R5 and one end of the seventh resistor R6 7, and the other end of the second operational amplifier OP 847 is connected with the first resistor R87458 and the sixth resistor R2, the other end of the sixth resistor R6 is grounded, the other end of the seventh resistor R7 is connected to one end of an eighth resistor R8, one end of a first capacitor C1 and one end of a second capacitor C2, the other end of the second capacitor C2 is connected to the pin 2 of a third operational amplifier OP3 and one end of a ninth resistor R9, the pin 6 of the third operational amplifier OP3 is connected to the other end of a first capacitor C1, one fixed end and one movable end of a first variable resistor RP1 and one end of an eleventh resistor R11, the other fixed end of the first variable resistor RP1 is connected to the other end of a ninth resistor R9, the pin 3 of the third operational amplifier OP3 is grounded through a tenth resistor R10, the other end of the eighth resistor R8 is grounded, the other end of the eleventh resistor R11 is connected to the pin 3 of a fourth operational amplifier OP4, the pin 2 of the fourth operational amplifier 4 is grounded through a twelfth resistor R12, the pin 6 of the fourth operational amplifier OP4 is connected to the pin 2 of the fifth operational amplifier OP5 through a thirteenth resistor R13, the pin 3 of the fifth operational amplifier OP5 is connected to the ground through a fourteenth resistor R14, the pin 1 of the fifth operational amplifier OP5 is connected to the ground, the pin 4 of the fifth operational amplifier OP5 is connected to the-5V power supply of the switching power UR in the input signal circuit, the pins 5, 6 and 8 of the fifth operational amplifier OP5 are connected to the pin 7 of the fifth operational amplifier OP5 through a fifteenth resistor R15 after being connected to form a current signal fi output terminal, and the pins 5, 6 and 8 of the fifth operational amplifier OP5 are further connected to the +5V power supply of the switching power UR in the input signal circuit.

4. The no-load on-line inspection tester for the three-phase secondary circuit according to claim 1, characterized in that: the voltage signal analog-digital conversion circuit consists of 9 resistors R16 to R24, second and third variable resistors RP2, RP3, 4 operational amplifiers OP6 to OP9, two capacitors C3, C4 and an analog-digital converter A/D, one end of the sixteenth resistor R16 is connected with a voltage signal output end u of the input signal circuit, the other end of the sixteenth resistor R6 is connected with a pin 3 of a sixth operational amplifier OP6, a pin 6 of the sixth operational amplifier OP6 is connected with a fixed end of the second variable resistor RP2 and one ends of the third capacitor C3 and the fourth capacitor C4, a pin 2 of the sixth operational amplifier OP6 is connected with one end of a seventeenth resistor R17 and the other fixed end and movable end of the second variable resistor RP2, the other end of the seventeenth resistor R17 is grounded, the other end of the fourth capacitor C4 is connected with a pin 2 of the seventh operational amplifier OP7 and an eighteenth resistor R18, a pin 6 of the seventh operational amplifier OP7 is connected to the other end of the third capacitor C3, a fixed end and an active end of the third variable resistor RP3, and one end of the twentieth resistor R20, another fixed end of the third variable resistor RP3 is connected to the other end of the eighteenth resistor R18, a pin 3 of the seventh operational amplifier OP7 is grounded through a nineteenth resistor R19, a pin 6 of the seventh operational amplifier OP7 is further connected to a pin CH0 of the analog-to-digital converter a/D, another end of the twentieth resistor R20 is connected to a pin 3 of the eighth operational amplifier OP8, a pin 2 of the eighth operational amplifier OP8 is grounded through a twenty-first resistor R21, a pin 6 of the eighth operational amplifier 63op 92 is connected to a pin 2 of the ninth operational amplifier 9 through a second twelfth resistor R8, a pin 3 of the eighth operational amplifier OP9 is grounded through a second thirteenth resistor R23, and a pin 361 of the ninth operational amplifier is grounded, the pins 4 of the ninth operational amplifier OP9 are connected with the power supply of-5V of the switching power supply UR in the input signal circuit, the pins 5, 6 and 8 of the ninth operational amplifier OP9 are connected with the pin 7 of the ninth operational amplifier OP9 through the twenty-fourth resistor R24 to form the output end of the voltage signal fu, and the pins 5, 6 and 8 of the ninth operational amplifier OP9 are also connected with the power supply of +5V of the switching power supply UR in the input signal circuit.

5. The no-load on-line inspection tester for the three-phase secondary circuit according to claim 1, characterized in that: the voltage and current signal phase measuring circuit consists of a NAND gate logic chip U, a counter HM, a microprocessor MCU, a crystal oscillator XTAL, 5 capacitors C5-C9 and a resistor R25, wherein pins 1 and 2 of the NAND gate logic chip U are connected with the voltage signal fu output end of a voltage signal analog-to-digital conversion circuit, pin 5 of the NAND gate logic chip U is connected with the current signal fi output end of the current signal analog-to-digital conversion circuit, pin 11 of the NAND gate logic chip U is connected with pin 10 of the counter HM, pin 13 of the NAND gate logic chip U is connected with pin 15 of the microprocessor MCU, pin 11 of the counter HM is connected with pin 14 of the microprocessor MCU, pins 9, 7, 6, 5, 3, 2, 4 and 13 of the counter HM are respectively connected with pins 1-8 of the microprocessor MCU, pin 16 of the counter HM is connected with a 5V power supply of a switching power supply UR in an input signal circuit, the 8 pin of the counter HM is grounded, one end of the crystal oscillator XTAL is connected with one end of a 19 pin and a ninth capacitor C9 of the microprocessor MCU, the other end of the crystal oscillator XTAL is connected with one end of a 18 pin and an eighth capacitor C8 of the microprocessor MCU, the other end of the eighth capacitor C8 and the other end of the ninth capacitor C9 are grounded, WR and RD pins of the microprocessor MCU are connected with the input end of the LCD, a 13 pin of the microprocessor MCU is connected with the current signal fi output end of the current signal analog-to-digital conversion circuit, a 12 pin of the microprocessor MCU is connected with the voltage signal fu output end of the voltage signal analog-to-digital conversion circuit, a 9 pin of the microprocessor MCU is connected with one end of a twenty-fifth resistor R25 and one end of a seventh capacitor C7, a 40 pin of the microprocessor MCU is connected with one end of a fifth capacitor C5, one end of a sixth C6 is connected with a VCC power supply, a 20 pin of the microprocessor MCU is connected with the other end of a fifth capacitor C5 and the other end of, the other end of the seventh capacitor C7 is connected with a VCC power supply, and the other end of the twenty-fifth resistor R25 is grounded.

Technical Field

The invention belongs to the technical field of electric energy metering and detection, and particularly relates to a three-phase secondary circuit no-load online inspection tester.

Background

The power grid secondary circuit generally mainly comprises a current transformer, a voltage transformer, an electric energy meter and the like, when the three-phase secondary circuit is inspected on line, the circuit is frequently idle or shunt running under light load, the existing instrument can not detect the situation, and the electric energy meter displays that the current is only a few mA. The existing electric energy meter testing instrument cannot judge whether the polarity and the phase of a wiring loop of a mutual inductor and an electric energy meter are correct or not, whether the external load property is changed or not, whether each part works normally or not on line, and metering and detecting personnel often return without any effect. Chinese patent ZL201720352457.8 discloses an electric energy meter no-load measurement online inspection tester, which measures whether there is no load by a method of measuring angle difference and converting it into phase angle, and can only determine qualitatively that a complete phasor diagram cannot be given, and the instrument power-taking mode is a mains supply or battery power supply mode, and in addition, there is no phasor database.

Disclosure of Invention

The invention aims to solve the technical problems that the existing electric energy meter no-load measurement online inspection tester cannot provide a complete phasor diagram and does not have a phasor diagram database, and provides a three-phase secondary circuit no-load online inspection tester.

In order to achieve the purpose, the invention adopts the technical scheme that:

a three-phase secondary circuit no-load online inspection tester is composed of an input signal circuit, a current signal analog-to-digital conversion circuit, a voltage current signal phase measurement circuit and an LCD (liquid crystal display), wherein a current signal output end of the input signal circuit is connected with an input end of the current signal analog-to-digital conversion circuit, a voltage signal output end of the input signal circuit is connected with an input end of the voltage signal analog-to-digital conversion circuit, an output end of the current signal analog-to-digital conversion circuit is connected with a current signal input end of the voltage current signal phase measurement circuit, an output end of the voltage signal analog-to-digital conversion circuit is connected with a voltage signal input end of the voltage current signal phase measurement circuit, and a display signal output end of the voltage current signal phase measurement.

Further, the input signal circuit is composed of an A-phase navigation plug L1, a B-phase navigation plug L2, a C-phase navigation plug L3, a power input transformer B1, a switching power UR, a power switch K, three voltage loop transformation converters B2, B3 and B4, three current loop isolation transformers B5, B6 and B7, a three-phase secondary voltage transformation relay J1, three voltage current loop relays J2, J3 and J4, and two diodes D1, D2, the 1 pin and the 2 pin of the A-phase navigation plug L1 are connected with the primary side of a power input transformer B1 and the primary side of a first voltage loop transformation converter B2, the 3 pin and the 4 pin of the A-phase navigation plug L1 are connected with the primary side of a first current loop isolation transformer B5, the 1 pin and the 2 pin of the B-phase navigation plug L2 are connected with the primary side of a second voltage loop transformation converter B3, the 1 pin and the second pin of the B3 pin 6 of the B-phase navigation plug L6 are connected with the second current loop isolation transformer B6, pins 1 and 2 of the C-phase air plug L3 are connected with the primary of a third voltage loop transformation transformer B4, pins 3 and 4 of the C-phase air plug L3 are connected with the primary of a third current loop isolation transformer B7, the secondary of the power input transformer B1 is connected with the input end of a switching power source UR, the power switch K is arranged on a line between the secondary of the power input transformer B1 and the input end of the switching power source UR, one end of the secondary of the three voltage loop transformation transformers B2, B3 and B4 is connected with the normally closed contact of a three-phase secondary voltage transformation relay J1, the movable contact of the three-phase secondary voltage transformation relay J1 is connected with one normally open contact of three voltage current loop relays J2, J3 and J4, the middle end of the secondary of the three voltage loop transformation relays B2, B3 and B4 is connected with the normally open contact of the three-phase secondary voltage transformation relay J1, the other ends of the secondary sides of the three voltage loop transformer converters B2, B3 and B4 are grounded, the secondary terminals of the three current loop isolation transformers B5, B6 and B7 are connected with the other normally open contact of the three voltage current loop relays J2, J3 and J4, the other ends of the secondary sides of the three current loop isolation transformers B5, B6 and B7 are grounded, one movable contact of the three voltage current loop relays J2, J3 and J4 is connected to form a voltage signal output end u, the other movable contact of the three voltage-current loop relays J2, J3 and J4 is connected to form a current signal output terminal i, the anode of the first diode D1 is connected with the cathode of the second diode D2 and then connected with the current signal output terminal i, and the cathode of the first diode D1 is connected with the anode of the second diode D2 and then grounded to form a voltage limiting loop of the current loop.

Furthermore, the current signal analog-to-digital conversion circuit is composed of 15 resistors R1 to R15, a first variable resistor RP1, 5 operational amplifiers OP1 to OP5, and two capacitors C1 and C2, one end of the first resistor R1 is connected to the current signal output terminal i of the input signal circuit, the other end of the first resistor R1 is connected to the 3-pin of the first operational amplifier OP1, the 6-pin of the first operational amplifier OP1 is connected to one end of the second resistor R2 and one end of the fourth resistor R4, the 2-pin of the first operational amplifier OP1 is connected to the other end of the second resistor R2 and one end of the third resistor R3, the other end of the third resistor R9 is grounded, the other end of the fourth resistor R4 is connected to the 3-pin of the second operational amplifier 82op 56, the 6-pin of the second operational amplifier 2 is connected to one end of the fifth resistor R5 and one end of the seventh resistor R6 7, the other end of the sixth resistor OP 36 2 is connected to the sixth resistor R5 and the second operational amplifier 6, the other end of the sixth resistor R6 is grounded, the other end of the seventh resistor R7 is connected to one end of an eighth resistor R8, one end of a first capacitor C1 and one end of a second capacitor C2, the other end of the second capacitor C2 is connected to the pin 2 of a third operational amplifier OP3 and one end of a ninth resistor R9, the pin 6 of the third operational amplifier OP3 is connected to the other end of a first capacitor C1, one fixed end and one movable end of a first variable resistor RP1 and one end of an eleventh resistor R11, the other fixed end of the first variable resistor RP1 is connected to the other end of a ninth resistor R9, the pin 3 of the third operational amplifier OP3 is grounded through a tenth resistor R10, the other end of the eighth resistor R8 is grounded, the other end of the eleventh resistor R11 is connected to the pin 3 of a fourth operational amplifier OP4, the pin 2 of the fourth operational amplifier 4 is grounded through a twelfth resistor R12, the pin 6 of the fourth operational amplifier OP4 is connected to the pin 2 of the fifth operational amplifier OP5 through a thirteenth resistor R13, the pin 3 of the fifth operational amplifier OP5 is connected to the ground through a fourteenth resistor R14, the pin 1 of the fifth operational amplifier OP5 is connected to the ground, the pin 4 of the fifth operational amplifier OP5 is connected to the-5V power supply of the switching power UR in the input signal circuit, the pins 5, 6 and 8 of the fifth operational amplifier OP5 are connected to the pin 7 of the fifth operational amplifier OP5 through a fifteenth resistor R15 after being connected to form a current signal fi output terminal, and the pins 5, 6 and 8 of the fifth operational amplifier OP5 are further connected to the +5V power supply of the switching power UR in the input signal circuit.

Furthermore, the voltage signal analog-to-digital conversion circuit is composed of 9 resistors R16-R24, second and third variable resistors RP2, RP3, 4 operational amplifiers OP 6-OP 9, two capacitors C3, C4 and an analog-to-digital converter a/D, one end of the sixteenth resistor R16 is connected to the voltage signal output terminal u of the input signal circuit, the other end of the sixteenth resistor R6 is connected to the pin 3 of the sixth operational amplifier OP6, the pin 6 of the sixth operational amplifier OP6 is connected to one fixed end of the second variable resistor RP2 and one end of the third capacitor C3 and one end of the fourth capacitor C4, the pin 2 of the sixth operational amplifier OP6 is connected to one end of the seventeenth resistor R17 and the other fixed end and the movable end of the second variable resistor RP2, the other end of the seventeenth resistor R17 is grounded, the other end of the fourth capacitor C5 is connected to the eighteenth operational amplifier OP 582 and one end of the eighteenth operational amplifier OP 18, a pin 6 of the seventh operational amplifier OP7 is connected to the other end of the third capacitor C3, a fixed end and an active end of the third variable resistor RP3, and one end of the twentieth resistor R20, another fixed end of the third variable resistor RP3 is connected to the other end of the eighteenth resistor R18, a pin 3 of the seventh operational amplifier OP7 is grounded through a nineteenth resistor R19, a pin 6 of the seventh operational amplifier OP7 is further connected to a pin CH0 of the analog-to-digital converter a/D, another end of the twentieth resistor R20 is connected to a pin 3 of the eighth operational amplifier OP8, a pin 2 of the eighth operational amplifier OP8 is grounded through a twenty-first resistor R21, a pin 6 of the eighth operational amplifier 63op 92 is connected to a pin 2 of the ninth operational amplifier 9 through a second twelfth resistor R8, a pin 3 of the eighth operational amplifier OP9 is grounded through a second thirteenth resistor R23, and a pin 361 of the ninth operational amplifier is grounded, the pins 4 of the ninth operational amplifier OP9 are connected with the power supply of-5V of the switching power supply UR in the input signal circuit, the pins 5, 6 and 8 of the ninth operational amplifier OP9 are connected with the pin 7 of the ninth operational amplifier OP9 through the twenty-fourth resistor R24 to form the output end of the voltage signal fu, and the pins 5, 6 and 8 of the ninth operational amplifier OP9 are also connected with the power supply of +5V of the switching power supply UR in the input signal circuit.

Furthermore, the voltage and current signal phase measuring circuit consists of a NAND gate logic chip U, a counter HM, a microprocessor MCU, a crystal oscillator XTAL, 5 capacitors C5-C9 and a resistor R25, wherein pins 1 and 2 of the NAND gate logic chip U are connected with the voltage signal fu output end of a voltage signal analog-to-digital conversion circuit, pins 5 of the NAND gate logic chip U are connected with the current signal fi output end of the current signal analog-to-digital conversion circuit, pins 11 of the NAND gate logic chip U are connected with pins 10 of the counter HM, pins 13 of the NAND gate logic chip U are connected with pins 15 of the microprocessor MCU, pins 11 of the counter HM are connected with pins 14 of the microprocessor MCU, pins 9, 7, 6, 5, 3, 2, 4 and 13 of the counter HM are respectively connected with pins 1-8 of the microprocessor MCU, pins 16 of the counter HM are connected with a 5V power supply of a switching power supply UR in an input signal circuit, the 8 pin of the counter HM is grounded, one end of the crystal oscillator XTAL is connected with one end of a 19 pin and a ninth capacitor C9 of the microprocessor MCU, the other end of the crystal oscillator XTAL is connected with one end of a 18 pin and an eighth capacitor C8 of the microprocessor MCU, the other end of the eighth capacitor C8 and the other end of the ninth capacitor C9 are grounded, WR and RD pins of the microprocessor MCU are connected with the input end of the LCD, a 13 pin of the microprocessor MCU is connected with the current signal fi output end of the current signal analog-to-digital conversion circuit, a 12 pin of the microprocessor MCU is connected with the voltage signal fu output end of the voltage signal analog-to-digital conversion circuit, a 9 pin of the microprocessor MCU is connected with one end of a twenty-fifth resistor R25 and one end of a seventh capacitor C7, a 40 pin of the microprocessor MCU is connected with one end of a fifth capacitor C5, one end of a sixth C6 is connected with a VCC power supply, a 20 pin of the microprocessor MCU is connected with the other end of a fifth capacitor C5 and the other end of, the other end of the seventh capacitor C7 is connected with a VCC power supply, and the other end of the twenty-fifth resistor R25 is grounded.

The invention has the beneficial effects that:

1. according to the invention, all input voltage and current signals are isolated and conditioned by the transformer to obtain pure sine wave signals, so that misjudgment of a user loop caused by misdetection of clutter or harmonic waves is avoided;

2. the invention amplifies and filters the voltage signal and the current signal accurately, through the method of measuring the phase angle directly, the range is 0- +/-180 degrees, 360 degrees are covered, so that the data is more real and effective, the displayed image is real and reliable, the judgment is more accurate, and the wrong wiring and the compensation of the electric quantity can be known by comparing the image database;

3. aiming at weak current signals in a no-load state, the weak current signals are amplified by 100 ten thousand times through a multi-stage high-fidelity amplifier, time sequence and logic operation are carried out under the control of a microprocessor, and the phases of voltage and current and the magnitude of the voltage are accurately measured;

4. the invention directly gets electricity through the test loop, and the electricity is converted and conditioned to the switch power supply, thereby saving that the field commercial power can not be obtained or the battery is not charged enough.

Drawings

FIG. 1 is an input signal circuit diagram of the present invention;

FIG. 2 is a circuit diagram of the current signal analog-to-digital conversion of the present invention;

FIG. 3 is a circuit diagram of the voltage signal analog-to-digital conversion of the present invention;

FIG. 4 is a circuit diagram of the voltage current signal phase measurement circuit and LCD display screen of the present invention.

Detailed Description

The invention is further described below with reference to the figures and examples.

As shown in fig. 1 to 4, the three-phase secondary circuit no-load on-line inspection tester in the embodiment, which consists of an input signal circuit, a current signal analog-to-digital conversion circuit, a voltage and current signal phase measurement circuit and an LCD (liquid crystal display), the current signal output end of the input signal circuit is connected with the input end of the current signal analog-to-digital conversion circuit, the voltage signal output end of the input signal circuit is connected with the input end of the voltage signal analog-to-digital conversion circuit, the output end of the current signal analog-to-digital conversion circuit is connected with the current signal input end of the voltage and current signal phase measurement circuit, the output end of the voltage signal analog-to-digital conversion circuit is connected with the voltage signal input end of the voltage current signal phase measurement circuit, and the display signal output end of the voltage and current signal phase measuring circuit is connected with an LCD (liquid crystal display).

As shown in fig. 1, the input signal circuit is composed of an a-phase vogue L1, a B-phase vogue L2, a C-phase vogue L3, a power input transformer B1, a switching power UR, a power switch K, three voltage loop transformer transformers B2, B3 and B4, three current loop isolation transformers B5, B6 and B7, a three-phase secondary voltage conversion relay J1, three voltage current loop relays J2, J3 and J4, and two diodes D1, D2, the 1 and 2 pins of the a-phase vogue L1 are connected with the primary of a power input transformer B2 and the primary of a first voltage loop transformer B2, the 3 and 4 pins of the a-phase vogue L1 are connected with the primary of a first current loop isolation transformer B5, the 1 and 2 pins of the B-phase vogue L2 are connected with the primary of a second voltage loop transformer B3, the 1 and 2 pins of the B-phase vogue L8658 are connected with the primary of a second current loop isolation transformer B6, pins 1 and 2 of the C-phase air plug L3 are connected with the primary of a third voltage loop transformation transformer B4, pins 3 and 4 of the C-phase air plug L3 are connected with the primary of a third current loop isolation transformer B7, the secondary of the power input transformer B1 is connected with the input end of a switching power source UR, the power switch K is arranged on a line between the secondary of the power input transformer B1 and the input end of the switching power source UR, one end of the secondary of the three voltage loop transformation transformers B2, B3 and B4 is connected with the normally closed contact of a three-phase secondary voltage transformation relay J1, the movable contact of the three-phase secondary voltage transformation relay J1 is connected with one normally open contact of three voltage current loop relays J2, J3 and J4, the middle end of the secondary of the three voltage loop transformation relays B2, B3 and B4 is connected with the normally open contact of the three-phase secondary voltage transformation relay J1, the other ends of the secondary sides of the three voltage loop transformer converters B2, B3 and B4 are grounded, the secondary terminals of the three current loop isolation transformers B5, B6 and B7 are connected with the other normally open contact of the three voltage current loop relays J2, J3 and J4, the other ends of the secondary sides of the three current loop isolation transformers B5, B6 and B7 are grounded, one movable contact of the three voltage current loop relays J2, J3 and J4 is connected to form a voltage signal output end u, the other movable contact of the three voltage-current loop relays J2, J3 and J4 is connected to form a current signal output terminal i, the anode of the first diode D1 is connected with the cathode of the second diode D2 and then connected with the current signal output terminal i, and the cathode of the first diode D1 is connected with the anode of the second diode D2 and then grounded to form a voltage limiting loop of the current loop. The three voltage loop transformer transformers B2, B3 and B4 are secondary double taps, the 1 st tap is 100/√ 3V/2V, and the 2 nd tap is 100V/2V; the three current loop isolation transformers B5, B6 and B7 are 1:1 isolation transformers; the three-phase secondary voltage conversion relay J1 is 3Z 0.01A; the three voltage-current loop relays J2, J3, and J4 are 2Z 0.01A. The A-phase aviation plug L1 can be connected with a three-phase three-wire system secondary circuit voltage uab or a three-phase four-wire system secondary circuit voltage ua or a single-phase secondary circuit voltage u according to the actual situation of a test power grid; the C-phase aerial plug L3 can be connected with a three-phase three-wire system secondary circuit voltage uca or a three-phase four-wire system secondary circuit voltage uc according to the actual situation of a test power grid; the B-phase aviation plug L2 can be connected with a three-phase four-wire system secondary circuit voltage ub according to the actual situation of a test power grid.

As shown in fig. 2, the current signal analog-to-digital conversion circuit is composed of 15 resistors R1 to R15, a first variable resistor RP1, 5 operational amplifiers OP1 to OP5, and two capacitors C1 and C2, one end of the first resistor R1 is connected to the current signal output terminal i of the input signal circuit, the other end of the first resistor R1 is connected to the 3-pin of the first operational amplifier OP1, the 6-pin of the first operational amplifier OP1 is connected to one end of the second resistor R2 and one end of the fourth resistor R4, the 2-pin of the first operational amplifier OP1 is connected to the other end of the second resistor R2 and one end of the third resistor R3, the other end of the third resistor R9 is grounded, the other end of the fourth resistor R4 is connected to the 3-pin of the second operational amplifier OP2, the 6-pin of the second operational amplifier 2 is connected to one end of the fifth resistor R5 and one end of the seventh resistor R6 7, the other end of the sixth resistor R2 and the sixth resistor R8658 are connected to the fifth operational amplifier 5, the other end of the sixth resistor R6 is grounded, the other end of the seventh resistor R7 is connected to one end of an eighth resistor R8, one end of a first capacitor C1 and one end of a second capacitor C2, the other end of the second capacitor C2 is connected to the pin 2 of a third operational amplifier OP3 and one end of a ninth resistor R9, the pin 6 of the third operational amplifier OP3 is connected to the other end of a first capacitor C1, one fixed end and one movable end of a first variable resistor RP1 and one end of an eleventh resistor R11, the other fixed end of the first variable resistor RP1 is connected to the other end of a ninth resistor R9, the pin 3 of the third operational amplifier OP3 is grounded through a tenth resistor R10, the other end of the eighth resistor R8 is grounded, the other end of the eleventh resistor R11 is connected to the pin 3 of a fourth operational amplifier OP4, the pin 2 of the fourth operational amplifier 4 is grounded through a twelfth resistor R12, the pin 6 of the fourth operational amplifier OP4 is connected to the pin 2 of the fifth operational amplifier OP5 through a thirteenth resistor R13, the pin 3 of the fifth operational amplifier OP5 is connected to the ground through a fourteenth resistor R14, the pin 1 of the fifth operational amplifier OP5 is connected to the ground, the pin 4 of the fifth operational amplifier OP5 is connected to the-5V power supply of the switching power UR in the input signal circuit, the pins 5, 6 and 8 of the fifth operational amplifier OP5 are connected to the pin 7 of the fifth operational amplifier OP5 through a fifteenth resistor R15 after being connected to form a current signal fi output terminal, and the pins 5, 6 and 8 of the fifth operational amplifier OP5 are further connected to the +5V power supply of the switching power UR in the input signal circuit.

As shown in fig. 3, the voltage signal analog-to-digital conversion circuit is composed of 9 resistors R16 to R24, second and third variable resistors RP2, RP3, 4 operational amplifiers OP6 to OP9, two capacitors C3, C4, and an analog-to-digital converter a/D, one end of the sixteenth resistor R16 is connected to the voltage signal output terminal u of the input signal circuit, the other end of the sixteenth resistor R6 is connected to the pin 3 of the sixth operational amplifier OP6, the pin 6 of the sixth operational amplifier OP6 is connected to one fixed end of the second variable resistor RP2 and one end of the third capacitor C3 and one end of the fourth capacitor C4, the pin 2 of the sixth operational amplifier OP6 is connected to one end of the seventeenth resistor R17 and the other fixed end and the movable end of the second variable resistor RP2, the other end of the seventeenth resistor R17 is grounded, the other end of the fourth capacitor C5 is connected to the eighteenth operational amplifier OP 582 and one end of the eighteenth operational amplifier OP 18, a pin 6 of the seventh operational amplifier OP7 is connected to the other end of the third capacitor C3, a fixed end and an active end of the third variable resistor RP3, and one end of the twentieth resistor R20, another fixed end of the third variable resistor RP3 is connected to the other end of the eighteenth resistor R18, a pin 3 of the seventh operational amplifier OP7 is grounded through a nineteenth resistor R19, a pin 6 of the seventh operational amplifier OP7 is further connected to a pin CH0 of the analog-to-digital converter a/D, another end of the twentieth resistor R20 is connected to a pin 3 of the eighth operational amplifier OP8, a pin 2 of the eighth operational amplifier OP8 is grounded through a twenty-first resistor R21, a pin 6 of the eighth operational amplifier 63op 92 is connected to a pin 2 of the ninth operational amplifier 9 through a second twelfth resistor R8, a pin 3 of the eighth operational amplifier OP9 is grounded through a second thirteenth resistor R23, and a pin 361 of the ninth operational amplifier is grounded, the pins 4 of the ninth operational amplifier OP9 are connected with the power supply of-5V of the switching power supply UR in the input signal circuit, the pins 5, 6 and 8 of the ninth operational amplifier OP9 are connected with the pin 7 of the ninth operational amplifier OP9 through the twenty-fourth resistor R24 to form the output end of the voltage signal fu, and the pins 5, 6 and 8 of the ninth operational amplifier OP9 are also connected with the power supply of +5V of the switching power supply UR in the input signal circuit.

As shown in fig. 4, the voltage-current signal phase measuring circuit is composed of a nand gate logic chip U, a counter HM, a microprocessor MCU, a crystal oscillator XTAL, 5 capacitors C5-C9 and a resistor R25, wherein pins 1 and 2 of the nand gate logic chip U are connected to a voltage signal fu output end of a voltage signal analog-to-digital conversion circuit, pin 5 of the nand gate logic chip U is connected to a current signal fi output end of the current signal analog-to-digital conversion circuit, pin 11 of the nand gate logic chip U is connected to pin 10 of the counter HM, pin 13 of the nand gate logic chip U is connected to pin 15 of the microprocessor MCU, pin 11 of the counter HM is connected to pin 14 of the microprocessor MCU, pins 9, 7, 6, 5, 3, 2, 4 and 13 of the counter HM are respectively connected to pins 1 to 8 of the microprocessor MCU, pin 16 of the counter HM is connected to a 5V power supply of a switching power supply UR in an input signal circuit, the 8 pin of the counter HM is grounded, one end of the crystal oscillator XTAL is connected with one end of a 19 pin and a ninth capacitor C9 of the microprocessor MCU, the other end of the crystal oscillator XTAL is connected with one end of a 18 pin and an eighth capacitor C8 of the microprocessor MCU, the other end of the eighth capacitor C8 and the other end of the ninth capacitor C9 are grounded, WR and RD pins of the microprocessor MCU are connected with the input end of the LCD, a 13 pin of the microprocessor MCU is connected with the current signal fi output end of the current signal analog-to-digital conversion circuit, a 12 pin of the microprocessor MCU is connected with the voltage signal fu output end of the voltage signal analog-to-digital conversion circuit, a 9 pin of the microprocessor MCU is connected with one end of a twenty-fifth resistor R25 and one end of a seventh capacitor C7, a 40 pin of the microprocessor MCU is connected with one end of a fifth capacitor C5, one end of a sixth C6 is connected with a VCC power supply, a 20 pin of the microprocessor MCU is connected with the other end of a fifth capacitor C5 and the other end of, the other end of the seventh capacitor C7 is connected with a VCC power supply, and the other end of the twenty-fifth resistor R25 is grounded.

The model of the microprocessor MCU is W78E516, the models of the first to ninth operational amplifiers OP1 to OP9 are OP27, the model of the counter HM is MC4040, and the model of the NAND gate logic chip U is 74LS 00. The LCD is a touch display with a system capable of programming and sending instructions, and various wrong wiring phasor database is preset inside for comparison and judgment of actual measured phasor diagrams. The model of the analog-to-digital converter A/D is MX 197.

The working process of the invention is as follows:

as shown in fig. 1, the switching power supply UR directly takes electricity from a secondary voltage loop of a test power grid through a power input transformer B1 and converts the electricity into direct current to supply a current signal analog-to-digital conversion circuit, a voltage and current signal phase measurement circuit and a display screen; the power input transformer B1 is 100T/200T, 10 VA; the voltage loop transformation converters B2, B3 and B4 convert a three-phase power supply switched on by an A-phase navigation plug L1, a B-phase navigation plug L2 and a C-phase navigation plug L3 into a voltage signal u of a three-phase secondary loop, the current loop isolation transformers B5, B6 and B7 convert the three-phase power supply switched on by the A-phase navigation plug L1, the B-phase navigation plug L2 and the C-phase navigation plug L3 into a current signal i of the three-phase secondary loop, and the voltage signal u and the current signal i are controlled by a three-phase voltage conversion relay J1 and voltage current loop relays J2, J3 and J4 to be transmitted to a current signal analog-to-digital conversion circuit and a voltage signal analog-to-digital conversion circuit; the current signal i is limited to be below 0.7V through a voltage limiting loop of a current loop formed by diodes D1 and D2; the current signal i is 0.1 mA-6A; the voltage signal u is 0.1 mV-2V.

As shown in fig. 2 to fig. 3, when the current signal i is at the no-load mA level, the current signal i is amplified with a controllable high fidelity by two levels of 1 to 100 ten thousand times by the 1 st level amplification circuit 1 and the 2 nd level amplification circuit 2 of the current signal i, and then passes through the Q-3 band-pass filter 3 to obtain a pure sine wave signal, and then is converted into a current square wave signal fi by the alternating current TTL square wave circuit 4 to be sent to the voltage current signal phase measurement circuit. The voltage signal u is subjected to impedance conversion through a 1 st stage amplification circuit 5 of the voltage signal u, then a pure sine wave signal is obtained through a Q & ltQ & gt 3 & lt/Q & gt band-pass filter 6, and then the pure sine wave signal is converted into a voltage square wave signal fu through an alternating current TTL square wave circuit 7, one path of the voltage square wave signal fu is sent to a phase measurement circuit, and the other path of the voltage square wave signal fu is sent to an analog-to-digital converter A/.

As shown in fig. 4, the current square wave signal fi and the voltage square wave signal fu are sent to the nand gate logic chip U of the voltage-current signal phase measurement circuit for logic combination, and 12 pins of the nand gate logic chip U generate phases representing the voltage signal U and the current signal iThe width value of the NAND gate logic chip U is that 13 pins of the NAND gate logic chip U are sent to a pulse signal (1 pulse is equal to 1 DEG phase angle standard metering pulse) with f being 18kHz and T being 55.56mS from 15 pins of the microprocessor MCU, and the pulse signal is sent to a counter HM after being phase-matched, and the microprocessor MCU controls the pulse signalRealizing the phase angles of the voltage signal u and the current signal iDirectly measuring in the range of 0 to +/-180 degrees.

The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, or direct or indirect applications in other related fields, which are made by the contents of the present specification, are included in the scope of the present invention.