Linear regulator and power supply device

文档序号:141283 发布日期:2021-10-22 浏览:39次 中文

阅读说明:本技术 线性调整器及电源装置 (Linear regulator and power supply device ) 是由 张长洪 于 2020-04-21 设计创作,主要内容包括:本发明公开了一种线性调整器及电源装置,该线性调整器包括:功率管,接收输入电压和控制电压,用于根据所述输入电压和所述控制电压提供输出电压;反馈模块,与所述功率管连接,对所述输出电压进行采样,并根据所述输出电压提供反馈电流;调节模块,分别与所述功率管和所述反馈模块连接,接收所述反馈电流,并根据所述反馈电流调节所述控制电压。该线性调整器可以实现稳定的电压输出,结构简单,性能良好,所需版图面积小,能够满足芯片内大部分场合的需求。(The invention discloses a linear regulator and a power supply device, the linear regulator comprises: the power tube receives an input voltage and a control voltage and is used for providing an output voltage according to the input voltage and the control voltage; the feedback module is connected with the power tube, samples the output voltage and provides feedback current according to the output voltage; and the adjusting module is respectively connected with the power tube and the feedback module, receives the feedback current and adjusts the control voltage according to the feedback current. The linear regulator can realize stable voltage output, has simple structure, good performance and small required domain area, and can meet the requirements of most occasions in a chip.)

1. A linear regulator, comprising:

the power tube receives an input voltage and a control voltage and is used for providing an output voltage according to the input voltage and the control voltage;

the feedback module is connected with the power tube, samples the output voltage and provides feedback current according to the output voltage;

and the adjusting module is respectively connected with the power tube and the feedback module, receives the feedback current and adjusts the control voltage according to the feedback current.

2. The linear regulator of claim 1, further comprising: and the output capacitor is connected with the feedback module in parallel and used for stabilizing the output voltage.

3. The linear regulator of claim 2, wherein the feedback module comprises: a first transistor, a third transistor, a fourth transistor, and a first resistor,

a first path end of the fourth transistor receives the output voltage, and a second path end of the fourth transistor is connected with a control end of the fourth transistor and is connected with a first path end of the first transistor through the first resistor;

the control end of the first transistor is connected with the first path end of the first transistor, and the second path end of the first transistor is grounded;

the first path end of the third transistor receives the output voltage, the second path end outputs the feedback current, and the control end of the third transistor is connected with the control end of the fourth transistor.

4. The linear regulator of claim 3, wherein the regulation module comprises: a first current source, a second current source, and a second transistor,

the first current source, the second transistor and the second current source are sequentially connected in series between an input voltage receiving end and a grounding end;

a connecting node of the first current source and the second transistor is connected with the control end of the power tube;

a connection node of the second transistor and the second current source is connected with a second path end of the third transistor and used for receiving the feedback current; and

the control terminal of the second transistor receives an external bias voltage.

5. The linear regulator of claim 4, wherein the power transistor is a PMOS transistor.

6. The linear regulator of claim 3, wherein the first transistor is an NMOS transistor, and the third and fourth transistors are PMOS transistors.

7. The linear regulator according to claim 6, wherein the turn-on voltage of the fourth transistor has a temperature characteristic identical to that of the turn-on voltage of the first transistor and opposite to that of the first resistor.

8. The linear regulator of claim 4, wherein the second transistor is an NMOS transistor.

9. The linear regulator of claim 2, wherein the output capacitor is a voltage regulation capacitor.

10. A power supply apparatus for supplying a supply voltage, comprising:

a linear regulator as claimed in any one of claims 1 to 9, for achieving a stable output of the supply voltage.

Technical Field

The present invention relates to the field of electronic circuit technology, and more particularly, to a linear regulator and a power supply apparatus.

Background

A Low Dropout Regulator (LDO) is called a linear Regulator or a series Regulator for short, and can convert an unstable input voltage into an adjustable dc output voltage for use as a power supply of other systems.

The linear regulator has the advantages of simple circuit structure, small occupied chip area, low noise and the like, and becomes an important component in a power management chip. The linear voltage stabilizer can provide a high-precision and low-noise power supply for noise sensitive circuits such as an analog-to-digital conversion circuit, a radio frequency circuit and the like, and is widely applied to a system-on-chip.

However, the existing linear regulator circuit has the problems that the output range of the voltage of the output end is greatly limited, the structure is complex, the occupied layout area is large and the like, and is not beneficial to the miniaturization development of the system-on-chip.

Therefore, there is a need to provide an improved technical solution to overcome the above technical problems in the prior art.

Disclosure of Invention

In order to solve the above technical problems, the present invention provides a linear regulator and a power supply apparatus, which can realize stable voltage output, and have a simple structure and good performance.

According to the invention, a linear regulator is provided. The method comprises the following steps: the power tube receives an input voltage and a control voltage and is used for providing an output voltage according to the input voltage and the control voltage; the feedback module is connected with the power tube, samples the output voltage and provides feedback current according to the output voltage; and the adjusting module is respectively connected with the power tube and the feedback module, receives the feedback current and adjusts the control voltage according to the feedback current.

Preferably, the linear regulator further comprises: and the output capacitor is connected with the feedback module in parallel and used for stabilizing the output voltage.

Preferably, the feedback module comprises: the output voltage control circuit comprises a first transistor, a third transistor, a fourth transistor and a first resistor, wherein a first path end of the fourth transistor receives the output voltage, and a second path end of the fourth transistor is connected with a control end of the fourth transistor and is connected with a first path end of the first transistor through the first resistor; the control end of the first transistor is connected with the first path end of the first transistor, and the second path end of the first transistor is grounded; the first path end of the third transistor receives the output voltage, the second path end outputs the feedback current, and the control end of the third transistor is connected with the control end of the fourth transistor.

Preferably, the adjusting module comprises: the circuit comprises a first current source, a second current source and a second transistor, wherein the first current source, the second transistor and the second current source are sequentially connected in series between an input voltage receiving end and a grounding end; a connecting node of the first current source and the second transistor is connected with the control end of the power tube; a connection node of the second transistor and the second current source is connected with a second path end of the third transistor and used for receiving the feedback current; and the control terminal of the second transistor receives an external bias voltage.

Preferably, the power tube is a PMOS transistor.

Preferably, the first transistor is an NMOS transistor, and the third transistor and the fourth transistor are PMOS transistors.

Preferably, the on-voltage of the fourth transistor has a temperature characteristic that is the same as a temperature characteristic of the on-voltage of the first transistor and is opposite to a temperature characteristic of the first resistor.

Preferably, the second transistor is an NMOS transistor.

Preferably, the output capacitor is a voltage stabilizing capacitor.

According to the invention, the power supply device is used for providing a power supply voltage, and comprises the linear regulator which is used for realizing stable output of the power supply voltage.

The invention has the beneficial effects that: the linear regulator disclosed by the invention forms a negative feedback loop by the power tube, the feedback module and the regulating unit, samples the output voltage in the circuit to generate a feedback current, and uses the feedback current as a feedback signal to realize the feedback regulation of the voltage at the control end of the power tube, thereby realizing the feedback regulation of the output voltage, optimizing the circuit structure and being beneficial to improving the feedback regulation speed and the regulation precision of the linear regulator.

And a stable capacitor is arranged at the output end of the linear regulator, so that stable output of the output voltage is further realized.

The linear regulator adopts fewer components such as transistors and resistors, and simplifies the structure of the linear regulator while ensuring good performance.

The size of the linear regulator is completely determined by the requirement on the current capacity, so that the area waste caused by design of other factors is avoided, and the optimal design of the layout of the linear regulator is realized.

The on-voltage of the first transistor has the same temperature characteristic as the on-voltage of the fourth transistor and has the opposite temperature characteristic to the first resistor, so that the output voltage has good temperature characteristic, and the voltage output performance of the linear regulator is improved.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings.

Fig. 1 is a block diagram illustrating a linear regulator according to an embodiment of the present invention;

fig. 2 is a schematic diagram of a circuit structure of a linear regulator according to an embodiment of the present invention.

Detailed Description

To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

The present invention will be described in detail below with reference to the accompanying drawings.

Fig. 1 shows a block diagram of a linear regulator according to an embodiment of the present invention.

As shown in fig. 1, in the present embodiment, the linear regulator includes a power tube Mpwr, a feedback module 100, a regulating unit 200, and an output capacitor Co.

The power tube Mpwr receives an input voltage VCC and a control voltage, and is used for providing an output voltage Vreg according to the input voltage and the control voltage.

The control end of the power tube Mpwr receives a control voltage, the first path end receives an input voltage VCC, and the second path end outputs an output voltage Vreg.

In this embodiment, the power transistor Mpwr is a PMOS transistor, the source thereof is a first path terminal, receives an input voltage VCC, the drain thereof is a second path terminal, outputs an output voltage Vreg, and the gate thereof is a control terminal, and is connected to the regulating module 200.

The feedback module 100 is connected to an output terminal of the power tube Mpwr, samples an output voltage Vreg, and provides a feedback current according to the output voltage Vreg.

The feedback module 100 can sample the voltage change of the output voltage Vreg, and then output a corresponding feedback current according to the sampling result.

The regulating module 200 is connected to the power tube Mpwr and the feedback module 100, respectively, receives the feedback current, and regulates the control voltage received by the control terminal of the power tube Mpwr according to the feedback current.

It can be understood that the control voltage received by the control terminal of the power tube Mpwr controls the conduction degree of the power tube Mpwr, for example, when the control voltage decreases, the gate-source voltage of the power tube Mpwr increases, and the voltage of the output terminal, i.e., the drain, of the power tube Mpwr increases. In this embodiment, the drain voltage of the power tube Mpwr corresponds to the output voltage Vreg of the linear regulator.

In this embodiment, the power tube Mpwr, the feedback module 100, and the adjusting unit 200 together form a negative feedback loop, the feedback module 100 detects a potential change of the output voltage Vreg, and outputs a corresponding feedback current to the adjusting unit 200 according to the potential change, and the adjusting unit 200 correspondingly adjusts a voltage at the control end of the power tube Mpwr according to the feedback current, so as to change a potential at the output end of the power tube Mpwr, thereby implementing negative feedback adjustment of the output voltage Vreg. And voltage sampling and current feedback are adopted in the whole process, so that the feedback regulation speed and the regulation precision of the linear regulator are improved.

The output capacitor Co is connected in parallel with the feedback module 100, and is used for performing voltage stabilization output on the output voltage Vreg.

Further, the output capacitor Co is a voltage stabilizing capacitor, and stable output of the output voltage Vreg is further achieved.

In this embodiment, the feedback module outputs a feedback current to the adjustment module according to a voltage change at the output end of the power tube, and the adjustment module adjusts the control end voltage of the power tube according to the feedback current, so as to achieve feedback adjustment and stable output of the voltage at the output end of the power tube, that is, the output voltage of the linear regulator.

Fig. 2 is a schematic diagram of a circuit structure of a linear regulator according to an embodiment of the present invention.

As shown in fig. 2, in the present embodiment, the feedback module 100 includes: a first transistor M1, a third transistor M3, a fourth transistor M4, and a first resistor R1. A first pass terminal of the third transistor M3 is connected to the output terminal of the power transistor Mpwr, i.e., the node B, for receiving the output voltage Vreg, and a second pass terminal of the third transistor M3 is connected to the regulating module 200 for outputting the feedback current. The fourth transistor M4, the first resistor R1 and the first transistor M1 are sequentially connected in series between the output end and the ground end of the power tube Mpwr, and are used for providing a bias current I according to an output voltage Vregb. Specifically, a first path terminal of the fourth transistor M4 is connected to the output terminal of the power transistor Mpwr to receive the output voltage Vreg, a second path terminal of the fourth transistor M4 is connected to the first path terminal of the first transistor M1 through the first resistor R1, the first path terminal of the first transistor M1 is connected to the control terminal of the first transistor M1, and the second path terminal of the first transistor M1 is grounded. Meanwhile, the second path terminal of the fourth transistor M4 is connected to the control terminal of the fourth transistor M4, and is also connected to the control terminal of the third transistor M3.

As can be seen from the above, in the present embodiment, the third transistor M3 and the fourth transistor M4 form a current mirror structure, and the current mirror structure is used as a feedback branch of the circuit, and can sample the output voltage Vreg and generate a feedback current as a feedback signal according to the change of the output voltage Vreg, so that the feedback adjustment of the output voltage is realized, and the adjustment speed and the adjustment accuracy are improved. Further, the third transistor M3 and the fourth transistor M4 are PMOS transistors, and the ratio of the output voltages of the third transistor M3 and the fourth transistor M4 is 1: k, where k is a positive number.

Further, the fourth transistor M4, the first resistor R1 and the first transistor M1 together form a bias current generating branch for providing the bias current Ib. And there is a bias current at this time

Ib=IM4=k*IM3.................................(1)

Wherein, IM3、IM4Which are currents flowing through the third transistor M3 and the fourth transistor M4, respectively.

Preferably, the turn-on voltages of the first transistor M1 and the fourth transistor M4 have temperature characteristics opposite to those of the first resistor R1. For example, in the present embodiment, the first transistor M1 is an NMOS transistor, and the turn-on voltage V of the first transistor M1th_M1Has a negative temperature characteristic, and the physical characteristic of the negative temperature characteristic decreases (increases) with the increase (decrease) of the temperature. The first resistor R1 has a positive temperature characteristic, and its physical characteristic increases (decreases) with an increase (decrease) in temperature.

It is understood that in other embodiments of the present invention, the turn-on voltage V of the first transistor M1th_M1And the turn-on voltage V of the fourth transistor M4th_M4The first resistor R1 has a positive temperature characteristic and a negative temperature characteristic.

Further, the first path terminal of the fourth transistor M4 is connected to the positive terminal of the output capacitor Co, and the second path terminal of the first transistor M1 is connected to the negative terminal of the output capacitor Co.

The conditioning module 200 includes: a first current source I1, a second current source I2, and a second transistor M2. The first current source I1, the second transistor M2 and the second current source I2 are sequentially connected in series between the receiving terminal of the input voltage VCC and the ground terminal.

Further, a connection node of the first current source I1 and the second transistor M2, i.e., the node a, is connected to the control terminal of the power transistor Mpwr, and a connection node of the second transistor M2 and the second current source I2 is connected to the second path terminal of the third transistor M3 to receive the feedback current.

The control terminal of the second transistor M2 is connected to an external bias voltage generating circuit, and receives an external bias voltage Vb for operating the second transistor M2 in an amplified state.

The first current source I1 and the second current source I2 are fixed bias current sources, and the first bias current I1 and the second bias current I2 provided by the current sources are fixed values.

From the above, when the circuit is in a steady state, the current in the circuit has the following relationship: i1 ═ I (I2-I)M3)............................(2)。

Preferably, in this embodiment, the second transistor M2 is an NMOS transistor.

The working principle of the linear regulator is described in detail below in conjunction with the above description:

in this embodiment, the power tube Mpwr, the feedback module 100, and the adjusting unit 200 together form a negative feedback loop. When the voltage level of the output voltage Vreg, i.e. the potential of the node B in the circuit, decreases, the current I flowing through the fourth transistor M4 in the circuitM4And is also reduced. According to the characteristics of the current mirror, the current I flowing through the third transistor M3M3And is also reduced. At this time, the relationship of the currents in the circuit is as follows: (I2-IM3) > I1. The potential of the node A is correspondingly pulled down, so that the gate-source voltage Vgs of the power tube Mpwr is increased, and the potential of the node B is pulled up. Similar to the principle, when the potential of the node B rises, the power tube Mpwr, the feedback module 100 and the adjusting unit 200 together form a negative feedback loop to pull down the potential of the node B, so as to finally realize the voltage stabilization output of the output voltage Vreg. The relationship between the regulated output voltage Vreg and various parameters in the circuit is as follows:

Vreg=Vgs_M1(Ib,Vth_M1)+Vgs_M4(Ib,Vth_M4)+R1*Ib=f(Ib,Vth,R1).............(3)

that is, the output voltage Vreg of the final output of the linear regulator is with respect to the bias current IbOn-voltage V of the transistorthAnd the resistance of the first resistor R1. Wherein, the following formula (1) and formula (2) can be obtained: i isb=IM4=k*IM3K (I2-I1), therefore, IbIs a fixed current value. At the same time due to the turn-on voltage V of the first transistor M1th_M1And the turn-on voltage V of the fourth transistor M4th_M4The output voltage Vreg after negative feedback adjustment does not change with the change of the input voltage VCC, namely the linear regulator can output a stable output voltage Vreg.

Further, the on-voltage V of the first transistor M1th_M1And the turn-on voltage V of the fourth transistor M4th_M4Has a negative temperature characteristic, the first resistor R1 has a positive temperature characteristic, therefore, by selecting a proper proportion of the bias current IbThe on-voltage V of the transistorthAnd the resistance value of the first resistor R1, the output voltage Vreg with good temperature characteristic can be obtained, and the voltage output performance of the linear regulator is improved.

Further, in the linear regulator disclosed in the present embodiment, the size of the power tube Mpwr depends on the current capacity requirement of the circuit; the first current source I1 and the second current source I2 are bias current generating tubes and low-voltage tubes, and the layout area or size of the low-voltage tubes is small; the first transistor M1, the third transistor M3 and the fourth transistor M4 are low-voltage tubes, so that the area or size of the tube layout is small; the second transistor M2 is a high-voltage tube, but the high-voltage tube with the smallest size may be selected; the output capacitor Co is a voltage stabilizing capacitor. Therefore, it can be known that the size or layout area of the linear regulator in this embodiment is almost determined by the sizes of the power tube Mpwr and the output capacitor Co, that is, completely determined by the current demand of the circuit, and there is no layout area waste caused by hesitation of any other factors or design.

The invention also discloses a power supply device for providing power supply voltage. The power supply device comprises the linear regulator, so that stable output of the power supply voltage is realized.

In conclusion, the linear regulator disclosed by the embodiment can realize stable voltage output, has a simple structure and good performance, requires a small number of transistors, can realize the optimization of layout design, and meets the requirements of most occasions in a chip. And the finally output voltage does not change along with the changes of temperature and the process angle of the transistor, and the stability of the voltage is stronger.

It should be noted that, in this document, the contained terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Finally, it should be noted that: it should be understood that the above examples are only for clearly illustrating the present invention and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the scope of the invention.

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