阅读说明：本技术 极紫外光光罩用的保护膜 (Protective film for extreme ultraviolet photomask ) 是由 林雲跃 于 2019-08-20 设计创作，主要内容包括：一种极紫外光光罩用的保护膜,包括第一覆盖层、设置在第一覆盖层上方的基质层、设置在基质层上方的第二覆盖层；以及设置在第二覆盖层上方的金属层。(A protective film for an extreme ultraviolet photomask comprises a first covering layer, a substrate layer arranged above the first covering layer, and a second covering layer arranged above the substrate layer; and a metal layer disposed over the second capping layer.)

1. A protective film for an extreme ultraviolet photomask, comprising:

a first cover layer;

a substrate layer disposed above the first cover layer;

a second cover layer disposed over the substrate layer; and

a metal layer disposed over the second capping layer.

Technical Field

The present disclosure relates to protective films for lithographic masks.

Background

Protective films (pellicles) are thin transparent films stretched over a frame that are adhered over one side of the reticle to protect the reticle from damage, dust and/or moisture. In extreme ultraviolet lithography, a protective film having high transparency, high mechanical strength, and low thermal expansion in the extreme ultraviolet wavelength region is generally required.

Disclosure of Invention

An aspect of the disclosure provides a protective film for an extreme ultraviolet photomask, comprising: the device comprises a first covering layer, a base layer, a second covering layer and a metal layer. The substrate layer is disposed over the first cover layer. The second cover layer is disposed over the base layer. A metal layer is disposed over the second capping layer.

Drawings

Aspects of the present disclosure are best understood from the following detailed description when read with the accompanying drawing figures. It is noted that, in accordance with standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion.

FIG. 1 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask according to one embodiment of the present disclosure;

FIG. 2 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask according to one embodiment of the present disclosure;

FIG. 3 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask according to one embodiment of the present disclosure;

FIG. 4 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask according to one embodiment of the present disclosure;

FIG. 5 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask according to one embodiment of the present disclosure;

FIG. 6 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask according to one embodiment of the present disclosure;

FIG. 7 illustrates a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask in accordance with one embodiment of the present disclosure;

FIG. 8 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask according to one embodiment of the present disclosure;

FIG. 9 illustrates a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask in accordance with one embodiment of the present disclosure;

FIG. 10 illustrates a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask in accordance with one embodiment of the present disclosure;

FIG. 11 illustrates a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet photomask in accordance with one embodiment of the present disclosure;

FIG. 12 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 13 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 14 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 15 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 16 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 17 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 18 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle in accordance with another embodiment of the present disclosure;

FIG. 19 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 20 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 21 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 22 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 23 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 24 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 25 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 26 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 27 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 28 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 29 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 30 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 31 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 32 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 33 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 34 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 35 shows a cross-sectional view of one of various stages for fabricating a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 36 shows a cross-sectional view of a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

FIG. 37 shows a cross-sectional view of a protective film for an extreme ultraviolet light reticle, according to another embodiment of the present disclosure;

fig. 38 shows a cross-sectional view illustrating a protective film attached to an euv light mask according to an embodiment of the present disclosure.

[ notation ] to show

10: substrate

15: third opening

20: first cover layer

30: substrate layer

40: second cover layer

50: back side coating

55: second opening

60: the photoresist layer

65: first opening

100: metal layer

130: base matrix layer

140: stabilizing layer

150: base stabilizer layer

160: alloy layer

200: protective film

210: extreme ultraviolet light mask

212: black frame

214: circuit pattern

Detailed Description

It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the disclosure. Specific implementations or embodiments of components and configurations are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the dimensions of the elements are not limited to the disclosed ranges or values, but may depend on the processing conditions and/or desired characteristics of the device. Furthermore, in the description that follows, forming a first feature over or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed intermediate the first and second features, such that the first and second features may not be in direct contact. Various features may be arbitrarily drawn in different scales for simplicity and clarity. In the accompanying drawings, some layers/features may be omitted for simplicity.

Furthermore, to facilitate description of the relationship between one element or feature and another element or feature, as illustrated in the figures, spatially relative terms, such as "below," "lower," "upper," and "higher," may be used herein. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. Other orientations of the device are possible (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. Furthermore, the term "made from …" may mean either "comprising" or "consisting of …". Further, in the following manufacturing process, one or more additional operations may exist between the described operations, and the order of the operations may be changed. In the present disclosure, the word "A, B, and at least one of C" refers to any of A, B, C, A + B, A + C, B + C, or a + B + C, and does not mean one from a, one from B, and one from C, unless otherwise specified.

The protective film is a thin transparent film stretched over a frame attached over one side of the reticle, and the protective film protects the reticle from particles, dust, damage, and/or contamination. The protective film generally requires high transparency and low reflectance. In Ultraviolet (UV) or Deep Ultraviolet (DUV) lithography, the protective film layer is made of a transparent resin film. However, in extreme ultraviolet lithography, resin-based films may be unacceptable and non-organic materials such as polysilicon, silicide, or graphite are used.

In the present disclosure, a protective film for an extreme ultraviolet light photomask has a stacked structure of various dielectric, semiconductor, and/or metal materials to enhance extreme ultraviolet light transmittance, reduce extreme ultraviolet light reflectance, improve mechanical strength, and/or improve thermal performance. In particular, protective films according to the present disclosure, in some embodiments, have an euv light transmittance of greater than about 85%, and in other embodiments, have an euv light transmittance of greater than about 87%, and in some embodiments, have an euv light reflectance of less than about 0.25%, and in other embodiments, have an euv light reflectance of less than about 0.10%.

Fig. 1 to 11 show sequential manufacturing operations of a protective film for an extreme ultraviolet light reticle according to an embodiment of the present disclosure. It is understood that additional operations may be provided before, during, and after the processes shown in fig. 1-11, and that some of the operations described below may be replaced or eliminated with respect to other embodiments of the method. The order of operations/processes may be interchangeable.

As shown in fig. 1, a substrate 10, such as a silicon (Si) wafer, is prepared. In some embodiments, the thickness of the substrate 10 ranges from about 500 micrometers (μm) to about 1000 micrometers.

As shown in fig. 2, a first capping layer 20 is formed over the substrate 10. The first capping layer 20 acts as an etch stop layer in a subsequent substrate etching operation. The first capping layer 20 comprises one or more layers of semiconductor material such as SiC, SiGe, Ge; or dielectric materials such as silicon oxide (silicon oxide), silicon nitride (silicon nitride), silicon oxynitride (silicon oxynitride), and SiCN; or any other suitable material. In some embodiments, SiC is epitaxially formed on the substrate 10. In other embodiments, the first capping layer 20 may be an amorphous or polycrystalline SiC, SiGe, or Ge layer. In certain embodiments, the first capping layer 20 is silicon nitride. In some embodiments, the thickness of the first capping layer 20 is in a range from about 0.5 nanometers (nm) to about 40 nm, and in other embodiments, the thickness of the first capping layer 20 is in a range from about 1 nm to about 20 nm. The first capping layer 20 may be formed via Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), Molecular Beam Epitaxy (MBE), and any other suitable film formation method.

After the first capping layer 20 is formed, a base layer 30 is formed over the first capping layer 20, as shown in fig. 3. In some embodiments, the host layer 30 comprises a semiconductor material, such as Si, SiC, SiGe; metal alloys such as silicides (WSi, NiSi, TiSi, CoSi, MoSi, ZrSi, etc.); or a dielectric material such as silicon nitride. In some embodiments, the silicide layer is subjected to a nitridation operation or an oxidation operation to form, for example, MoSiN, ZrSiN, MoSiO, or ZrSiO. The semiconductor material may be monocrystalline, polycrystalline, or amorphous. In certain embodiments, the matrix layer 30 comprises a MoSi layer or a ZrSi layer. In some embodiments, the thickness of the matrix layer 30 is in a range from about 5 nanometers to about 50 nanometers, and in other embodiments, the thickness of the matrix layer 30 is in a range from about 20 nanometers to about 40 nanometers. The matrix layer 30 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, molecular beam epitaxy, and any other suitable film formation method. After the formation of the substrate layer 30, in some embodiments, the operation is performed at about 250 ℃ to about 1100 ℃.

Thereafter, a second capping layer 40 is formed over the base layer 30, as shown in fig. 4. The second cap layer 40 includes one or more layers of semiconductor materials such as SiC, SiGe, Ge; or dielectric materials such as silicon oxide, silicon nitride, silicon oxynitride, and SiCN; or any other suitable material. In some embodiments, the thickness of the second cover layer 40 is in a range from about 0.5 nanometers to about 40 nanometers, and in other embodiments, the thickness of the second cover layer 40 is in a range from about 1 nanometer to about 20 nanometers. The second capping layer 40 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, molecular beam epitaxy, and any other suitable film formation method. The material of the second cover layer 40 may be the same as or different from the material of the first cover layer 20.

Next, as shown in fig. 5, a backside coating 50 is formed over the backside of the substrate 10. The backside coating 50 includes one or more layers of dielectric materials such as silicon oxide, silicon nitride, silicon oxynitride, and SiCN. In other embodiments, a metal layer is used. In some embodiments, the thickness of the backside coating 50 ranges from about 100 nanometers to about 1000 nanometers, and in other embodiments, the thickness of the backside coating 50 ranges from about 200 nanometers to about 500 nanometers. The backside coating 50 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, molecular beam epitaxy, and any other suitable film formation method.

Thereafter, as shown in fig. 6, a photoresist layer 60 is formed on the backside coating layer 50. In some embodiments, the thickness of the photoresist layer 60 is in a range from about 1 micron to about 3 microns. One or more lithography operations are performed to pattern the photoresist layer 60, and then the backside coating 50 is patterned via one or more etching operations to form a first opening 65, as shown in fig. 7.

Thereafter, the backside coating 50 is etched by using the patterned photoresist layer 60 as an etching mask to form a second opening 55, as shown in fig. 8. The etching is one or more of a dry etching and a wet etching operation. The photoresist layer 60 is removed by a suitable photoresist removal operation, as shown in fig. 9.

Thereafter, the substrate 10 is etched to form the third opening 15, as shown in fig. 10. In some embodiments, wet etching is performed using KOH, tetramethylammonium hydroxide (TMAH), or ethylenediamine pyrocatechol (EDP) to etch the Si substrate 10. SF may also be used₆、CF₄And Cl₂One or more of the gases, with N₂And/or O₂The gases are mixed and the substrate 10 is etched by a dry etching process. In some embodiments, the substrate under the third opening 15 is etched to expose the first capping layer 20. Through such an etching operation, a frame structure of the protective film is formed by a portion of the substrate 10 and a portion of the backside coating 50.

Next, as shown in fig. 11, one or more metal layers 100 are formed over the second capping layer 40. In some embodiments, metal layer 100 comprises a layer of Mo, Zr, Nb, B, Ti, Ru, MoSi, ZrSi, NbSi, or NiZrSi, or other suitable material. In some embodiments, the metal layer 100 comprises a Ru layer. In some embodiments, the metal layer 100 includes a Ru layer formed over a Mo layer or a MoSi layer. In other embodiments, a Ru layer formed over the Zr layer is used. In certain embodiments, only the Zr layer is formed over the second capping layer 40. In some embodiments, only a Ru layer is formed over the second capping layer 40. In some embodiments, the thickness of the metal layer 100 is in a range from about 0.5 nanometers to about 20 nanometers, and in other embodiments, the thickness of the metal layer 100 is in a range from about 1 nanometer to about 10 nanometers. The metal layer 100 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, electroplating, and any other suitable film forming method, respectively. In some embodiments, any or all of the metal layers are also formed over the inner walls of the third opening 15. In some embodiments, all layers of the protective film are solid and non-porous layers. In certain embodiments, all layers of the protective film are inorganic.

Fig. 12 to 23 illustrate sequential manufacturing operations of a protective film for an extreme ultraviolet light reticle according to an embodiment of the present disclosure. It is understood that additional operations may be provided before, during, and after the processes shown in fig. 12-23, and that some of the operations described below may be replaced or eliminated with respect to other embodiments of the method. The order of operations/processes may be interchangeable. Materials, configurations, dimensions, structures, conditions, and operations that are the same or similar to those explained in fig. 1 to 11 may be adopted in the following embodiments, and some explanations may be omitted. Similarly, materials, configurations, dimensions, structures, conditions, and operations that are the same or similar to those explained in fig. 12 to 23 may be adopted in the above-described embodiments.

As shown in fig. 12, a substrate 10, such as a Si wafer, is prepared. In some embodiments, the thickness of the substrate 10 is in a range from about 500 microns to about 1000 microns.

A first capping layer 20 is formed over the substrate 10 as an etch stop layer, as shown in fig. 13. The first capping layer 20 functions as an etch stop layer in a subsequent substrate etching operation. The first cap layer 20 comprises one or more layers of a semiconductor material such as SiC, SiGe, Ge, or a dielectric material such as silicon oxide, silicon nitride, SiCN, and silicon oxynitride, or any other suitable material. In some embodiments, SiC is epitaxially formed on the substrate 10. In other embodiments, the first capping layer 20 may be an amorphous or polycrystalline SiC, SiGe, or Ge layer. In certain embodiments, the first capping layer 20 is silicon nitride. In some embodiments, the thickness of the capping layer is in a range from about 0.5 nanometers to about 40 nanometers, and in other embodiments, the thickness of the capping layer is in a range from about 1 nanometer to about 20 nanometers. The first capping layer 20 may be formed via Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), Molecular Beam Epitaxy (MBE), and any other suitable film formation method.

After the first capping layer 20 is formed, a base layer 30 is formed over the first capping layer 20, as shown in fig. 3. In some embodiments, the host layer 30 comprises a semiconductor material, such as Si, SiC, SiGe; metal alloys such as silicides (WSi, NiSi, TiSi, CoSi, MoSi, etc.); or a dielectric material such as silicon nitride. The semiconductor material may be monocrystalline, polycrystalline, or amorphous. In certain embodiments, the matrix layer 30 comprises a MoSi or Si layer. In some embodiments, the thickness of the matrix layer 30 ranges from about 1 nanometer to about 50 nanometers, and in other embodiments, the thickness of the matrix layer 30 ranges from about 1 nanometer to about 40 nanometers. The matrix layer 30 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, and any other suitable film forming method.

Next, as shown in fig. 15, a stabilization layer 140 is formed over the base layer 30. In some embodiments, stabilization layer 140 includes one or more layers of Nb, Mo, Zr, MoSi, boron, and carbon, and alloys thereof. The carbon layer may be amorphous carbon. The stabilization layer 140 prevents diffusion of metal between the base layer 30 and the second cover layer 40. In some embodiments, the thickness of the stabilization layer 140 ranges from about 0.5 nanometers to about 50 nanometers, and in other embodiments, the thickness of the stabilization layer 140 ranges from about 2 nanometers to about 5 nanometers. In some embodiments, the stabilization layer is two layers, such as Nb/Mo (a Nb layer on top of a Mo layer), Nb/Zr, Mo/MoSi, or Mo/C. In some embodiments, the thickness of each of the two layers ranges from about 0.5 nanometers to about 30 nanometers. The stabilization layer 140 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, and any other suitable film formation method.

Thereafter, a second capping layer 40 is formed over the stabilization layer 140, as shown in fig. 16. In some embodiments, the second cap layer 40 includes one or more layers of silicon nitride and SiC. In other embodiments, the second cladding layer 40 is formed by implanting impurities into the Si core layer. The impurities may be boron, phosphorus, and/or arsenic. In some embodiments, the thickness of the second cover layer 40 is in a range from about 0.5 nanometers to about 10 nanometers, and in other embodiments, the thickness of the second cover layer 40 is in a range from about 1 nanometer to about 5 nanometers. The second cover layer 40 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, and any other suitable film forming method.

Next, as shown in fig. 17, a backside coating 50 is formed over the backside of the substrate 10. The backside coating 50 includes one or more layers of dielectric materials such as silicon oxide, silicon nitride, silicon oxynitride, and SiCN. In other embodiments, a metal layer is used. In some embodiments, the thickness of the backside coating 50 ranges from about 100 nanometers to about 1000 nanometers, and in other embodiments, the thickness of the backside coating 50 ranges from about 200 nanometers to about 500 nanometers. The backside coating 50 can be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, and any other suitable film forming method.

Thereafter, as shown in fig. 18, a photoresist layer 60 is formed on the backside coating 50. In some embodiments, the thickness of the photoresist layer 60 is in a range from about 1 micron to about 3 microns, and one or more lithography operations are performed to pattern the photoresist layer 60 to form the first opening 65, as shown in fig. 19.

Thereafter, the backside coating 50 is etched by using the patterned photoresist layer 60 as an etch mask to form second openings 55, as shown in fig. 20. The etching is one or more of a dry etching and a wet etching operation. The photoresist layer 60 is removed by a suitable photoresist removal operation, as shown in fig. 21.

Thereafter, the substrate 10 is etched to form the third opening 15, as shown in fig. 22. In some embodiments, wet etching is performed using KOH, tetramethylammonium hydroxide (TMAN), or ethylenediamine pyrocatechol (EDP) to etch the Si substrate 10. SF may also be used₆、CF₄And Cl₂One or more of the gases with N₂And/or O₂The gases are mixed and the substrate 10 is etched by a dry etching process. In some embodiments, the substrate under the third opening 15 is etched to expose the first capping layer 20. Through such an operation, a frame structure of the protective film is formed by a portion of the substrate 10 and a portion of the backside coating 50.

Next, as shown in fig. 23, one or more metal layers 100 are formed over the second capping layer 40. In some embodiments, metal layer 100 comprises a layer of Mo, Zr, Nb, B, Ti, Ru, MoSi, ZrSi, NbSi, or NiZrSi, or other suitable material. In some embodiments, the metal layer 100 comprises a Ru layer. In some embodiments, the metal layer 100 includes a Ru layer formed over a Mo layer or a MoSi layer. In other embodiments, a Ru layer formed over the Zr layer is used. In some embodiments, only Zr layers are used as the metal layer 100. In some embodiments, only a Ru layer is used as the metal layer 100. In some embodiments, the thickness of the metal layer 100 is in a range from about 0.5 nanometers to about 20 nanometers, and in other embodiments, the thickness of the metal layer 100 is in a range from about 1 nanometer to about 10 nanometers. The metal layer 100 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, electroplating, and any other suitable film forming method, respectively. In some embodiments, any or all of the metal layers are further formed on the inner wall of the third opening 15. In some embodiments, all layers of the protective film are solid and non-porous layers. In certain embodiments, all layers of the protective film are inorganic.

Fig. 24 to 35 illustrate sequential manufacturing operations of a protective film for an extreme ultraviolet light reticle according to an embodiment of the present disclosure. It is understood that additional operations may be provided before, during, and after the processes shown in fig. 24-35, and that some of the operations described below may be replaced or eliminated with respect to other embodiments of the method. The order of operations/processes may be interchangeable. Materials, configurations, dimensions, structures, conditions, and operations that are the same as or similar to those explained in fig. 1 to 23 may be adopted in the following embodiments, and some explanations may be omitted.

A substrate 10, such as a Si wafer, is prepared. In some embodiments, the thickness of the substrate 10 is in a range from about 500 microns to about 1000 microns. A first capping layer 20 is formed as an etch stop layer over the substrate 10 as shown in fig. 24. The first capping layer 20 functions as an etch stop layer in a subsequent substrate etching operation. The first capping layer 20 comprises one or more layers of semiconductor material such as SiC, SiGe, Ge; or dielectric materials such as silicon oxide, SiCN, silicon nitride, and silicon oxynitride; or any other suitable material. In some embodiments, SiC is epitaxially formed on the substrate 10. In other embodiments, the first capping layer 20 may be an amorphous or polycrystalline SiC, SiGe, or Ge layer. In certain embodiments, the first capping layer 20 is silicon nitride. In some embodiments, the thickness of the capping layer is in a range from about 0.5 nanometers to about 40 nanometers, and in other embodiments, the thickness of the capping layer is in a range from about 1 nanometer to about 20 nanometers. The first capping layer 20 may be formed via Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD), Molecular Beam Epitaxy (MBE), and any other suitable film formation method.

Next, as shown in fig. 25, a base matrix layer 130 is formed on the first cover layer 20. In some embodiments, base matrix layer 130 comprises a semiconductor material, such as Si, SiC, SiGe; metal alloys such as silicides (WSi, NiSi, TiSi, CoSi, MoSi, etc.); or a dielectric material such as silicon nitride. The semiconductor material may be monocrystalline, polycrystalline, or amorphous. In some embodiments, base matrix layer 130 comprises a polysilicon layer or an amorphous silicon layer. In some embodiments, the thickness of the base matrix layer 130 is in a range from about 10 nanometers to about 50 nanometers, and in other embodiments, the thickness of the base matrix layer 130 is in a range from about 20 nanometers to about 40 nanometers. The base matrix layer 130 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, molecular beam epitaxy, and any other suitable film formation method.

Next, as shown in fig. 26, a base stabilization layer 150 is formed over the base matrix layer 130. In some embodiments, the base stabilization layer 150 includes one or more layers of metal-based materials, such as Mo, Zr, Ru, and Nb, and alloys thereof. In some embodiments, the thickness of the base stabilization layer 150 ranges from about 1 nanometer to about 20 nanometers. The base stabilization layer 150 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, and any other suitable film formation method.

Thereafter, as shown in fig. 27, the base matrix layer 130 and the base stabilization layer 150 are mixed through an annealing operation to form an alloy layer 160. In some embodiments, alloy layer 160 is a silicide layer, such as MoSi, NbSi, ZrSi, RuSi, and the like. Forming the silicide layer over the substrate may improve surface roughness (smoother surface) and inhibit phase separation that would otherwise be caused by subsequent high temperature processes, as compared to forming the silicide layer directly as the matrix layer 30.

Thereafter, a second capping layer 40 is formed over the alloy layer 160, as shown in fig. 28. In some embodiments, the second cap layer 40 includes one or more layers of silicon nitride and SiC. In other embodiments, the second cladding layer 40 is formed by implanting impurities into the Si core layer. The impurities may be boron, phosphorus, and/or arsenic. In some embodiments, the thickness of the second cover layer 40 is in a range from about 0.5 nanometers to about 10 nanometers, and in other embodiments, the thickness of the second cover layer 40 is in a range from about 1 nanometer to about 5 nanometers. The second cover layer 40 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, and any other suitable film forming method.

Next, as shown in fig. 29, a backside coating 50 is formed over the backside of the substrate 10. The backside coating 50 includes one or more layers of dielectric materials such as silicon oxide, silicon nitride, silicon oxynitride, and SiCN. In other embodiments, a metal layer is used. In some embodiments, the thickness of the backside coating 50 ranges from about 100 nanometers to about 1000 nanometers, and in other embodiments, the thickness of the backside coating 50 ranges from about 200 nanometers to about 500 nanometers. The backside coating 50 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, molecular beam epitaxy, and any other suitable film formation method.

Thereafter, as shown in fig. 30, a photoresist layer 60 is formed on the backside coating layer 50. In some embodiments, the thickness of the photoresist layer 60 is in a range from about 1 micron to about 3 microns, and one or more lithography operations are performed to pattern the photoresist layer 60 to form the first opening 65, as shown in fig. 31.

Thereafter, the backside coating 50 is etched by using the patterned photoresist layer 60 as an etch mask to form a second opening 55, as shown in fig. 32. The etching is one or more of a dry etching and a wet etching operation. The photoresist layer 60 is removed by a suitable photoresist removal operation, as shown in FIG. 33.

After that, the substrate 10 is etched to form the third opening 15, as shown in fig. 34. In some embodiments, wet etching is performed using KOH, tetramethylammonium hydroxide (TMAH), or ethylenediamine pyrocatechol (EDP) to etch the Si substrate 10. SF may also be used₆、CF₄And Cl₂One or more of the gases, with N₂And/or O₂The gases are mixed and the substrate 10 is etched by a dry etching process. In some embodiments, the substrate under the third opening 15 is etched to expose the first capping layer 20. Through such an etching operation, a frame structure of the protective film is formed by a portion of the substrate 10 and a portion of the backside coating 50.

Next, as shown in fig. 35, one or more metal layers 100 are formed over the second capping layer 40. In some embodiments, metal layer 100 comprises a layer of Mo, Zr, Nb, B, Ti, Ru, MoSi, ZrSi, NbSi, or NiZrSi, or other suitable material. In some embodiments, the metal layer 100 comprises a Ru layer. In some embodiments, the metal layer 100 includes a Ru layer formed over a Mo layer or over a MoSi layer. In other embodiments, a Ru layer formed over the Zr layer is used. In some embodiments, only Zr layers are used as the metal layer 100. In some embodiments, only a Ru layer is used as the metal layer 100. In some embodiments, the thickness of the metal layer 100 is in a range from about 0.5 nanometers to about 20 nanometers, and in other embodiments, the thickness of the metal layer 100 is in a range from about 1 nanometer to about 10 nanometers. The metal layer 100 may be formed via chemical vapor deposition, physical vapor deposition, atomic layer deposition, electroplating, and any other suitable film forming method, respectively. In some embodiments, any or all of the metal layers are further formed on the inner wall of the third opening 15. In some embodiments, all layers of the protective film are solid and non-porous layers. In certain embodiments, all layers of the protective film are inorganic.

Fig. 36 shows a cross-sectional view of a protective film for an extreme ultraviolet light reticle according to another embodiment of the present disclosure. In this embodiment, the frame structure has a tapered shape (tapered shape) having a larger opening at the back-side coating layer 50 side than at the side close to the first cover layer 20. In some embodiments, the tapered shaped frame is formed via the use of an isotropic etching operation. The conical shaped frame may be applied to any of the embodiments described above.

Fig. 37 shows a cross-sectional view of a protective film for an extreme ultraviolet light reticle according to another embodiment of the present disclosure. Materials, configurations, dimensions, structures, conditions, and operations that are the same or similar to those explained in fig. 1 to 36 may be adopted in the following embodiments, and some explanations may be omitted.

In this embodiment, the protective film includes a first substrate layer 170 on top of the first cover layer 20, a second substrate layer 180 on top of the first substrate layer 170, and a second cover layer 40 and metal layer 100 on top of the second substrate layer 180. In some embodiments, the first host layer 170 includes a semiconductor material, such as Si, SiC, and SiGe. The semiconductor material may be monocrystalline, polycrystalline, or amorphous. In some embodiments, the first matrix layer 170 includes a polysilicon layer or an amorphous silicon layer. In some embodiments, the thickness of the first matrix layer 170 is in a range from about 10 nanometers to about 50 nanometers, and in other embodiments, the thickness of the first matrix layer 170 is in a range from about 20 nanometers to about 40 nanometers. The second matrix layer 180 includes a silicide, such as WSi, NiSi, TiSi, CoSi, MoSi, NbSi, ZrSi, NbZrSi, or the like. In certain embodiments, the second matrix layer 180 includes a MoSi layer or a ZrSi layer. In some embodiments, the silicide layer is subjected to a nitridation operation or an oxidation operation to form, for example, MoSiN, ZrSiN, MoSiO, or ZrSiO. In some embodiments, the thickness of the second matrix layer 180 is in a range from about 10 nanometers to about 50 nanometers, and in other embodiments, the thickness of the second matrix layer 180 is in a range from about 20 nanometers to about 40 nanometers.

Fig. 38 shows a cross-sectional view illustrating the protective film 200 attached to the euv mask according to an embodiment of the present disclosure. The frame structure of the protection film 200 is attached to the surface of the euv light mask 210 by a suitable bonding material. In some embodiments, the bonding material is an adhesive, such as an acrylic or silicon-based glue, or an A-B cross-linked type glue (A-Bcross link type glue). The size of the frame structure is larger than the area of the black border 212 of the euv light mask 210, so the protection film 200 covers not only the circuit pattern 214 area of the mask but also the black border 212.

In some embodiments of the present disclosure, a photoresist pattern is formed via using an extreme ultraviolet light mask having a protective film as described above. An extreme ultraviolet light mask having a protective film is set in an extreme ultraviolet light exposure tool. The substrate (wafer) coated with photoresist is also placed in an extreme ultraviolet exposure tool. Extreme ultraviolet light is generated at a light source of the extreme ultraviolet light and is guided onto the extreme ultraviolet light mask through the protective film. The extreme ultraviolet light is then reflected by the extreme ultraviolet light mask and the reflected light with the circuit pattern information is directed onto a photoresist layer over the substrate. And then performing a developing operation to form a photoresist pattern. Thereafter, the underlying layer is patterned through one or more etching operations by using the photoresist pattern as an etching mask to manufacture a pattern for a semiconductor device.

The protective film according to the embodiments of the present disclosure may provide higher intensity and thermal conduction (dissipation), as well as higher extreme ultraviolet light transmittance and lower extreme ultraviolet light reflectance, compared to conventional protective films.

It will be understood that not all advantages need be discussed herein, that not all implementations or embodiments require a particular advantage, and that other implementations or embodiments may provide different advantages.

According to one aspect of the present disclosure, a protective film for an extreme ultraviolet light reticle includes a first cover layer, a substrate layer disposed over the first cover layer, a second cover layer disposed over the substrate layer, and a metal layer disposed over the second cover layer. In one or more of the foregoing and following embodiments, the substrate layer is made of a silicide. In one or more of the foregoing and following embodiments, the silicide is MoSi or ZrSi. In one or more of the foregoing and following embodiments, the first capping layer and the second capping layer are made of one or more of silicon oxide, silicon nitride, silicon oxynitride, SiC, and SiCN. In one or more of the foregoing and following embodiments, the first cover layer and the second cover layer are made of the same material. In one or more of the foregoing and following embodiments, the first cover layer and the second cover layer are made of different materials from each other. In one or more of the foregoing and following embodiments, the metal layer is one or more of a Ru layer, a Mo layer, and a Zr layer.

In accordance with another aspect of the present disclosure, a protective film for an extreme ultraviolet light reticle includes a first cover layer, a matrix layer disposed over the first cover layer, a stabilization layer disposed over the matrix layer, a second cover layer disposed over the stabilization layer, and a metal layer disposed over the stabilization layer. In one or more of the foregoing and following embodiments, the stabilization layer is one or more of a Nb layer, a boron layer, and a carbon layer. In one or more of the foregoing and following embodiments, the substrate layer is made of a silicide. In one or more of the foregoing and following embodiments, the silicide is one or more of MoSi, ZrSi, and NbSi. In one or more of the foregoing and following embodiments, the first capping layer and the second capping layer are made of one or more of silicon oxide, silicon nitride, silicon oxynitride, SiC, and SiCN. In one or more of the foregoing and following embodiments, the first cover layer and the second cover layer are made of the same material. In one or more of the foregoing and following embodiments, the first cover layer and the second cover layer are made of different materials from each other. In one or more of the foregoing and following embodiments, the metal layer is one or more of a Ru layer, a Mo layer, and a Zr layer. In one or more of the foregoing and following embodiments, the stabilizing layer has a thickness in a range from 0.5 nanometers to 10 nanometers. In one or more of the foregoing and following embodiments, the matrix layer is one of a polysilicon layer and an amorphous silicon layer, and the stabilization layer is one or more of a MoSi layer, a ZrSi layer, and a NbSi layer.

According to another aspect of the present disclosure, in a method of manufacturing a protective film for an extreme ultraviolet light reticle, a first cover layer is formed over a front surface of a substrate. A first base matrix layer is formed over the first capping layer. A second base matrix layer is formed over the first base matrix layer. An alloy is formed as an alloy matrix layer from the first base matrix layer and the second base matrix layer by a thermal operation. A second capping layer is formed over the alloy matrix layer. A backside coating is formed over the back surface of the substrate. A first opening is formed in the backside coating via patterning the backside coating. The substrate is etched through the first opening, forming a second opening in the substrate. One or more metal layers are formed over the second capping layer. In one or more of the foregoing and following embodiments, the first base matrix layer is polycrystalline silicon or amorphous silicon, and the second base matrix layer is one or more of Mo, Zr, and Nb.

Some embodiments of the present disclosure provide a protective film for an extreme ultraviolet photomask, comprising: the device comprises a first covering layer, a base layer, a second covering layer and a metal layer. The substrate layer is arranged above the first covering layer; the second covering layer is arranged above the substrate layer; a metal layer is disposed over the second capping layer.

In some embodiments, wherein the substrate layer is made of a silicide.

In some embodiments, wherein the silicide is MoSi or ZrSi.

In some embodiments, wherein the first capping layer and the second capping layer are made of one or more of silicon oxide, silicon nitride, silicon oxynitride, SiC, and SiCN.

In some embodiments, wherein the first cover layer and the second cover layer are made of the same material.

In some embodiments, wherein the first cover layer and the second cover layer are made of different materials from each other.

In some embodiments, wherein the metal layer is one or more of a Ru layer, a Mo layer, and a Zr layer.

Other embodiments of the present disclosure provide a protective film for an extreme ultraviolet photomask, comprising: the device comprises a first covering layer, a base layer, a stabilizing layer, a second covering layer and a metal layer. The substrate layer is arranged above the first covering layer; the stabilizing layer is arranged above the substrate layer; the second covering layer is arranged above the stable layer; the metal layer is disposed over the stabilization layer.

In some embodiments, wherein the stabilization layer is one or more of a Nb layer, a boron layer, and a carbon layer.

In some embodiments, wherein the substrate layer is made of a silicide.

In some embodiments, wherein the silicide is one or more of MoSi, ZrSi, and NbSi.

In some embodiments, wherein the first capping layer and the second capping layer are made of one or more of silicon oxide, silicon nitride, silicon oxynitride, SiC, and SiCN.

In some embodiments, wherein the first cover layer and the second cover layer are made of the same material.

In some embodiments, wherein the first cover layer and the second cover layer are made of different materials from each other.

In some embodiments, wherein the metal layer is one or more of a Ru layer, a Mo layer, and a Zr layer.

In some embodiments, wherein the thickness of the stabilization layer is in a range of 0.5 nm to 10 nm.

In some embodiments, wherein: the host layer is one of a polysilicon layer and an amorphous silicon layer, and the stabilization layer is one or more of a MoSi layer, a ZrSi layer, and a NbSi layer.

Some embodiments of the present disclosure provide a method of manufacturing a protective film for an extreme ultraviolet photomask, the method comprising: forming a first capping layer over a front surface of a substrate; forming a first base matrix layer over the first capping layer; forming a second base matrix layer over the first base matrix layer; forming an alloy from the first base matrix layer and the second base matrix layer as an alloy matrix layer via a thermal operation; forming a second capping layer over the alloy base layer; forming a backside coating over the back surface of the substrate; forming a first opening in the backside coating layer via patterning the backside coating layer; forming a second opening in the substrate by etching the substrate through the first opening; and forming one or more metal layers over the second capping layer.

In some embodiments, wherein the first base matrix layer is polycrystalline silicon or amorphous silicon and the second base matrix layer is one or more of Mo, Zr, and Nb.

In some embodiments, wherein the metal layer is one or more Zr layers.

The foregoing outlines several embodiments or examples so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments or examples introduced herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions, and alterations herein without departing from the spirit and scope of the present disclosure.