阅读说明：本技术 用于调节通过du/dt滤波器连接到电机的逆变器的方法 (Method for regulating an inverter connected to an electric machine via a du/dt filter ) 是由 尼可拉斯·索多 奥利·厄吉拉 于 2019-08-01 设计创作，主要内容包括：描述了一种用于调节通过du/dt滤波器(3)和电机电缆(4)连接到电机(2)的逆变器(1)的方法。该方法包括下列步骤：通过逆变器(1)在电机电缆上产生脉冲；利用连续电流峰值测量脉冲应答的循环时间；利用循环时间确定时间延迟t<Sub>d</Sub>；利用时间延迟t<Sub>d</Sub>确定待避免的停延时间T<Sub>dwell</Sub>：T<Sub>dwell</Sub>＝k*t<Sub>d</Sub>,k∈{2,6,10,...}；将逆变器(1)的连续切换之间的时间调节到从T<Sub>dwell</Sub>-t<Sub>A</Sub>到T<Sub>dwell</Sub>+t<Sub>A</Sub>的范围之外,其中,t<Sub>A</Sub>是T<Sub>dwell</Sub>的允许偏差。(A method for regulating an inverter (1) connected to a motor (2) via a du/dt-filter (3) and a motor cable (4) is described. The method comprises the following steps: generating pulses on the motor cable by means of an inverter (1); measuring the cycle time of the pulse response using the continuous current peak; determining the time delay t by means of the cycle time d (ii) a Using time delay t d Determining a dwell time T to be avoided dwell ：T dwell ＝k*t d K ∈ {2, 6, 10. }; adjusting the time between successive switching of the inverter (1) to from T dwell ‑t A To T dwell +t A Outside the range of (1), wherein t A Is T dwell Is determined.)

1. A method for regulating an inverter (1) connected to an electric machine (2) via a du/dt-filter (3) and a machine cable (4), comprising the steps of:

-generating pulses (14) on the motor cable by the inverter (1);

measuring the cycle time (T) of the pulse response using successive current peaks_OSC)；

Determining a time delay t using the cycle time_d；

Using said time delay t by the following formula_dDetermining a dwell time T to be avoided_dwell：

T_dwell＝k*t_d，k∈{2，6，10，...}；

Will be describedThe time between successive switching of the inverter (1) is adjusted from T_dwell-t_ATo T_dwell+t_AOut of the range of (1), wherein t_AIs T_dwellIs determined.

2. The method of claim 1, wherein the pulse produces at least only two consecutive reflected current peaks.

3. Method according to claim 1 or 2, characterized in that the generated current is measured by the inverter (1).

4. The method according to any one of claims 1 to 3, characterized in that:

t_A＜2*t_d*p，

wherein p is the width of the first pulse of the pulse response and/or a factor dependent on k.

5. Method according to any of claims 1 to 4, characterized in that the allowed dwell time T_dwellStored in a look-up table.

6. A method according to any one of claims 1-5, characterized in that pulses are generated by closing a first switch (5) in a first phase (U) and a second switch (9) in a second phase (V) of the inverter.

7. Method according to claim 6, characterized in that the first switch (5) and the second switch (9) are closed simultaneously.

8. The method according to claim 6 or 7, characterized in that at the end of the pulse generation, the first switch (5) is opened at a first time and the second switch (9) is opened at a second time different from the first time.

9. The method of claim 8, wherein the difference between the first time and the second time is in the range of 40 μ s to 80 μ s.

10. A non-transitory computer readable medium encoded with a computer program for regulating an inverter (1) connected to an electric machine (2) through a du/dt-filter (3) and a machine cable (4), the computer program comprising computer executable instructions for controlling a programmable processor to:

-generating pulses (14) on the motor cable by the inverter (1);

-measuring the cycle time (T) of the pulse response using successive current peaks_OSC)；

-determining a time delay t using said cycle time_d；

-using said time delay t by the following formula_dDetermining a dwell time T to be avoided_dwell：

T_dwell＝k*t_d，k∈{2，6，10，...}；

-adjusting the time between successive switching of the inverter (1) to T_dwell-t_ATo T_dwell+t_AOutside the range of (1), wherein t_AIs T_dwellIs determined.

Technical Field

The invention relates to a method for regulating an inverter connected to an electric machine via a du/dt-filter and a machine cable.

Background

WO 2017/144114 a1 shows a power electronic converter and a method of controlling the same, in which voltage pulses are generated on the motor cable and the voltage response is detected in order to adjust the time between successive switching of the inverter.

However, when using a du/dt-filter, the method described in WO 2017/144114 a1 cannot be used, because the reflected pulses are filtered by the filter and therefore cannot be seen at the output of the inverter.

Disclosure of Invention

The object of the invention is to regulate an inverter connected to a motor via a du/dt-filter and motor cables.

This object is solved by a method comprising the steps of: generating pulses on the motor cable through the inverter; measuring the cycle time of the pulse response using the continuous current peak; determining the time delay t by means of the cycle time_d(ii) a Using the time delay t by the following formula_dDetermining a dwell time T to be avoided_dwell：T_dwell＝k*t_dK ∈ {2, 6, 10. }; adjusting the time between successive switching of an inverter to T_dwell-t_ATo T_dwell+t_AOutside the range of (1), wherein t_AIs T_dwellIs determined.

The du/dt-filter is used to limit the voltage rise time and the maximum voltage experienced by the motor (seen). This may be necessary to protect the motor from isolation and ensure long life. A typical du/dt-filter consists of a choke and a star-connected capacitor, which together form a second order low-pass filter. Further, there may be a resistor in parallel with the inductor or a resistor in series with the capacitor to increase damping. The motor cable behaves as a transmission line. The reflected waves may increase the maximum voltage at the motor terminals and the voltage may exceed the motor specifications, especially with long motor cables. Time delay t_dIs defined as the time that the voltage (or any signal) travels from the inverter to the motor. t is t_dCan be calculated as:

where L is the length of the cable, v is the propagation velocity, L is the inductance of the cable, and C is the capacitance of the cable. The voltage at the motor terminals oscillates due to reflection and the cycle time T_OSCIs the propagation time delay t_dFour times that of the prior art.

Dwell time T_dwellIs defined as the time between successive switching of the same switch in the inverter or successive switching of the same voltage between two phases in the inverter. The voltage reflection can be optimized by using a suitable dwell time in the inverter control and in this way the maximum voltage at the motor can be limited.

In one embodiment of the invention, the pulse produces at least only two consecutive reflected current peaks.

In one embodiment of the invention, the generated current is measured by the inverter. Inverters already have means for measuring the current and the current peak value. Therefore, no other means for measuring the current peak is required.

In one embodiment of the invention, t_A＝2*t_dP, wherein p is a factor dependent on the width of the first pulse of the pulse reply. This is a simple way of determining the allowable deviation. The parameter p may for example be 50% of the width of the first pulse.

In one embodiment of the invention, the allowed dwell times are stored in a look-up table. The allowed dwell time may be determined in the setting step.

In one embodiment of the invention, the pulse is generated by closing a first switch in a first phase and a second switch in a second phase of the inverter. Thus, a pulse is generated between the two phases of the inverter. When three phases U, V, W are used, any differential mode pulse combination can be used to generate the test pulses, i.e., U through V, U through W, V through W, U through V and W, V through U and W, W through U and V, and all of these are also reversed polarity.

In one embodiment of the invention, the first switch and the second switch are closed simultaneously.

In one embodiment of the invention, the first switch is opened at a first time and the second switch is opened at a second time different from the first time at the termination of the pulse generation. The test pulse is terminated so that the switches do not open simultaneously. This has the following advantages: the test pulse will not be reversed due to the current commutation.

In one embodiment of the invention, the difference between the first time and the second time is in the range of 40 μ s to 80 μ s.

According to the present invention there is also provided a non-transitory computer readable medium encoded with a computer program for regulating an inverter connected to a motor via a du/dt filter and a motor cable, the computer program comprising computer executable instructions for controlling a programmable processor to:

-generating pulses on the motor cable by means of an inverter,

measuring the cycle time T of the pulse response using successive current peaks_OSC，

-determining the time delay t using the cycle time_d，

-using the time delay t by the following formula_dDetermining a dwell time T to be avoided_dwell：

T_dwell＝k*t_d，k∈{2，6，10，...}，

-adjusting the time between successive switching of the inverter to T_dwell-t_ATo T_dwell+t_AOut of the range of (1), wherein t_AIs T_dwellIs determined.

According to the present invention, a new computer program product is also provided. The computer program product comprises a non-volatile computer-readable medium, for example a compact disc "CD", encoded with a computer program according to the invention.

Various exemplary and non-limiting embodiments of the invention are described in the appended dependent claims.

The exemplary and non-limiting embodiments of the invention, both as to organization and method of operation, together with further objects and advantages thereof, may best be understood from the following description of specific exemplary embodiments when read in connection with the accompanying drawings.

The verbs "comprise" and "comprise" are used herein as open-ended limitations that neither exclude nor require the presence of unrecited features. The features recited in the dependent claims may be freely combined with each other, unless explicitly stated otherwise. Furthermore, it should be understood that the use of "a" or "an" throughout this document, i.e., in the singular, does not exclude a plurality.

Drawings

Embodiments of the invention will now be described in more detail with reference to the accompanying drawings, in which:

FIG. 1 shows a schematic representation of an inverter connected to a motor through a du/dt filter;

FIG. 2 shows a schematic illustration of a du/dt-filter;

FIG. 3 is a schematic illustration for defining an oscillation cycle time and a propagation time delay;

FIG. 4 is a schematic illustration of cycle time measurement; and

FIG. 5 is a schematic illustration of determining a preferred dwell time.

Detailed Description

The specific examples provided in the following description should not be construed as limiting the scope and/or applicability of the appended claims. The exemplification and set of examples provided in the following description are not exhaustive unless explicitly stated otherwise.

Fig. 1 schematically shows an inverter 1, which inverter 1 is connected to a motor 2 via a du/dt-filter 3 and a motor cable 4.

The inverter 1 comprises controllable switches 5, 6, 7, 8, 9, 10, which may for example be in the form of insulated gate bipolar transistors "IGBTs", gate turn-off thyristors "GTOs" or some other suitable controllable switching means for power electronics.

The inverter 1 includes a capacitive intermediate circuit 11 connected between a positive rail (positive rail)12 and a negative rail (negative rail) 13.

The motor cable 4 is a three-phase cable. The phase U, V, W of the motor cable 4 is connected between the switches 5, 8, respectively; 6. between 9 and between 7 and 10. The du/dt-filter 3 comprises a choke L and a star-connected capacitor C which together form a second order low-pass filter, as schematically shown in fig. 2. Furthermore, there may be a resistor in parallel with the inductor L or a resistor in series with the capacitor C to increase damping.

The motor cable 4 represents a transmission line. The reflected waves may increase the maximum voltage at the motor terminals and the voltage may exceed the motor specifications, especially with long motor cables 4.

When the length of the motor cable 4 is increased or a number of cables are connected in parallel, the propagation time delay t_dAnd (4) increasing. Propagation time delay t_dIs defined as the time for the voltage (or any signal) to travel from the inverter 1 to the motor 2 and can be calculated as:

where L is the length of the motor cable 4, v is the propagation velocity, L is the inductance of the motor cable 4, and C is the capacitance of the motor cable 4.

Due to the reflection, the voltage at the terminals of the motor 2 oscillates. Cycle time T_OSCIs the propagation time delay t_dFour times as shown in fig. 3. In case of short motor cables, the oscillation period may be mainly determined by the du/dt-filter parameters. Longer motor cables generally lower the oscillation frequency. However, to explain the method, the cycle time T is as described above_OSCIs t_dThe four times assumption is sufficiently correct.

Propagation time delay t_dCan be used to determine or calculate the dwell time T_dwellThe basis of (1). Dwell time T_dwellIs defined as the time between successive switching of the switches 5 to 10 in the inverter 1. "switching" is an operation of switching a phase switch to "on" or "off".

The voltage reflection can be optimized by using a suitable dwell time in the inverter control and in this way the maximum voltage at the motor 2 can be limited.

In a first step, a test pulse is generated by connecting one phase U to the positive rail 12 or DC + and the other phase V to the negative rail 13 or DC-. For example, the switches 5 and 9 may be turned on.

The length of the test pulse should be long enough so that the voltage reflection has enough time to generate at least two oscillation peaks on the inverter side. The generated current is an oscillating current. This current can be measured by the inverter 1, i.e. no additional current sensor is needed.

The test pulse may also be any other differential mode pulse combination.

Fig. 4 schematically shows the generation of a test pulse 14, for example, between phase U and phase V at t ═ 10 μ s. Curve 15 shows the voltage at the electric machine 2 between phase U and phase V, and curve 16 shows the current on the inverter side.

It can be seen that the motor voltage V_UVOscillating between markers m3 and m4 with a certain cycle time. In the present case, the cycle time is 14.3 μ s. The cycle time of the current in the conducting phase shown in curve 16 is the same, i.e. 14.3 μ s, as shown between the markers m1 and m 2. If the voltage pulse 14 is long enough, the cycle time can be measured by detecting two consecutive current peaks.

Measured cycle time T_OSCIs the propagation time delay t_dFour times that of the prior art. Thus the propagation time delay t_dCan be calculated as:

the maximum voltage at the terminals of the motor 2 depends on the dwell time T_dwellAnd motor cable length. May be based on the measured propagation time delay t_dThe dwell time is selected to limit the voltage to avoid potentially harmful over-voltages.

The voltage maximum is generated if the following conditions are met:

T_dwell，max＝k*t_d，k∈{2，6，10，...}。

values close to these times should therefore be avoided.

The voltage minimum is generated if the following conditions are met:

T_dwell，min＝k*t_d，k∈{4，8，12，...}。

in other words, if k is 4 × n, a voltage minimum is generated, where n is an integer. A voltage maximum is generated if k is 4 × n-2, where k is also an integer.

Therefore, a value close to the minimum time should be used.

The allowed dwell time may be stored in a look-up table or any other software or hardware based storage device.

The boundary (margin) t may be selected using the parameter p_marginThis parameter p is, for example, 50% of the width of the first maximum (k 2).

Boundary t_marginMay also be related to k and decrease with k.

The computer program according to the exemplary and non-limiting embodiments includes computer-executable instructions for controlling a programmable processor to perform actions related to a method according to any of the above-described exemplary and non-limiting embodiments.

A computer program for regulating an inverter connected to a motor via a du/dt filter and a motor cable, the computer program comprising computer executable instructions for controlling a programmable processor to:

-generating pulses on the motor cable by means of an inverter;

measuring the cycle time T of the pulse response using successive current peaks_OSC；

-determining the time delay t using the cycle time_d；

-using the time delay t by the following formula_dDetermining a dwell time T to be avoided_dwell：

T_dwell＝k*t_d，k∈{2，6，10，...}；

-adjusting the time between successive switching of the inverter to T_dwell-t_ATo T_dwell+t_AOut of the range of (1), wherein t_AIs T_dwellIs determined.

The computer programs described above may be, for example, subroutines and/or functions implemented using a programming language suitable for the programmable processor in question.

The computer program product according to an exemplary and non-limiting embodiment includes a computer readable medium, such as a compact disc "CD", encoded with a computer program according to an exemplary embodiment.

The non-limiting specific examples provided in the description given above should not be construed as limiting the scope and/or applicability of the appended claims. Moreover, any exemplification or set of illustrations provided in this document is not exhaustive unless explicitly stated otherwise.

The test pulse 14 should be terminated so as not to open the switches at the same time. Otherwise, there would be a risk that the test pulse is reversed due to current commutation.

It is therefore advantageous, for example, for the switch 5 to open 50 mus later than the switch 9, or generally in the range of 40 mus to 80 mus later.