阅读说明：本技术 开关变换器及其控制方法和控制电路 (Switching converter, control method and control circuit thereof ) 是由 余永强 王军 陈华捷 宁志华 于 2019-08-29 设计创作，主要内容包括：本申请公开了开关变换器及其控制方法和控制电路。所述开关变换器将直流输入电压转换成直流输出电压,所述控制电路包括：补偿模块,用于产生斜坡信号；比较器,用于将所述直流输出电压的误差信号与所述斜坡信号相比较,以获得中间信号用于产生置位信号；第一RS触发器,分别根据置位信号和复位信号产生脉宽调制信号,采用所述复位信号获得固定导通时间,采用所述置位信号获得与所述直流输出电压相关的关断时间；以及驱动模块,将所述脉宽调制信号转换成开关控制信号,其中,所述补偿模块根据所述直流输出电压自适应地调整所述斜坡信号的斜率。该控制电路采用自适应的斜坡信号进行补偿,以维持开关变换器的稳定性和抑制输出纹波。(The application discloses a switching converter, a control method and a control circuit thereof. The switching converter converts a direct current input voltage to a direct current output voltage, the control circuit comprising: the compensation module is used for generating a ramp signal; a comparator for comparing an error signal of the dc output voltage with the ramp signal to obtain an intermediate signal for generating a set signal; the first RS trigger generates pulse width modulation signals according to a set signal and a reset signal respectively, obtains fixed on-time by adopting the reset signal and obtains off-time related to the direct current output voltage by adopting the set signal; and the driving module is used for converting the pulse width modulation signal into a switch control signal, wherein the compensation module is used for adaptively adjusting the slope of the ramp signal according to the direct current output voltage. The control circuit adopts the self-adaptive ramp signal for compensation so as to maintain the stability of the switching converter and restrain output ripples.)

1. A control circuit for a switching converter that converts a dc input voltage to a dc output voltage, the control circuit comprising:

the compensation module is used for generating a ramp signal;

a comparator for comparing the first superimposed signal related to the dc output voltage with an error signal of the dc output voltage and the second superimposed signal related to the ramp signal to obtain an intermediate signal for generating a set signal;

the first RS trigger generates pulse width modulation signals according to the setting signal and the reset signal respectively, obtains fixed on-time by adopting the reset signal and obtains off-time related to the direct current output voltage by adopting the setting signal; and

a driving module converting the pulse width modulation signal into a switching control signal,

the compensation module adjusts the slope of the ramp signal in a self-adaptive manner according to the direct-current output voltage.

2. The control circuit of claim 1, further comprising:

and the first input end and the second input end of the AND gate respectively receive the intermediate signal and the minimum turn-off time, the output end of the AND gate provides the setting signal, and the minimum turn-off time is a fixed time period.

3. The control circuit of claim 2, further comprising:

a first timer for generating the reset signal; and

a second timer for generating the minimum off-time.

4. The control circuit of claim 1, further comprising:

an error amplifier for comparing the DC output voltage with a reference voltage to obtain the error signal.

5. The control circuit of claim 1, wherein the compensation module comprises:

a voltage detection module for generating a command signal according to the DC output voltage and a reference voltage, wherein the command signal is proportional to the DC output voltage;

the sampling and holding module is used for sampling and holding the instruction signal and the error signal of the ramp signal to obtain a sampling signal;

the ramp signal generating module is used for generating a ramp signal according to the sampling signal, wherein the slope of the ramp signal is related to the amplitude of the direct current output voltage; and the balance switch is connected between the output end of the voltage detection module and the output end of the ramp signal generation module.

6. The control circuit of claim 5, wherein the voltage detection module comprises:

a low pass filter for filtering the DC output voltage and slowing down the response time;

the first voltage gain circuit and the second voltage gain circuit respectively perform gain amplification on the direct current output voltage and the reference voltage; and

and an adder that adds the gain-amplified direct-current output voltage and a reference voltage to each other to obtain the command signal.

7. The control circuit of claim 5, wherein the sample-and-hold module comprises:

a transconductance amplifier for converting an error signal of the command signal and the ramp signal into an error current; and

a first switch and a first capacitor connected in series between an output terminal and a ground terminal of the transconductance amplifier, the first switch being sampled during an on period of the first switch and held during an off period of the first switch, wherein the error current charges the first capacitor during the sampling to obtain the sampled signal,

the on-state of the first switch is controlled by adopting a sampling and holding signal, when the switch converter works in a continuous current mode, sampling is carried out at a first time period beginning from the rising edge of the pulse width modulation signal, and when the switch converter works in a discontinuous current mode, sampling is carried out at a first time period beginning from the zero crossing of a current detection signal of the inductive current.

8. The control circuit of claim 5, wherein the ramp signal generation module comprises:

a voltage-to-current converter generating a charging current corresponding to the sampling signal;

a second capacitor connected between an output terminal of the voltage-to-current converter and a ground terminal; and

a second resistor and a second switch connected in series between both ends of the second capacitor to form a discharge path,

and the second capacitor is charged by adopting the charging current, the conducting state of the second switch is controlled by adopting a discharging signal, and the second capacitor is discharged in a second time period beginning from the falling edge of the pulse width modulation signal so as to obtain the ramp signal.

9. The control circuit of claim 5, further comprising:

and the mode detection module is used for obtaining a current mode signal according to the zero-crossing detection of the current detection signal of the inductive current.

10. The control circuit of claim 9, further comprising:

and the control module generates a sampling and holding signal, a discharging signal and an equalizing signal according to the pulse width modulation signal and the current mode signal, and respectively controls a first switch in the sampling and holding module, a second switch in the ramp signal generating module and the equalizing switch.

11. The control circuit of claim 10, wherein the control module comprises:

a second RS flip-flop;

the first input end and the second input end of the OR gate receive the pulse width modulation signal and the current mode signal respectively, and the output end of the second one-shot circuit is connected to the position end of the RS trigger;

the output end of the third one-shot circuit is connected to the reset end of the RS trigger;

a fourth one-shot circuit having an input connected to the second output of the RS flip-flop,

wherein an output terminal of the first one-shot provides the sample-and-hold signal, an output terminal of the fourth one-shot provides the discharge signal, and a first output terminal of the RS flip-flop provides the equalization signal.

12. The control circuit of claim 10, wherein the control module controls the conductive states of the first switch, the second switch, and the equalization switch,

the sampling and holding module samples the command signal and the error signal of the ramp signal in a first time period of a switching period of the pulse width modulation signal to obtain a sampling signal;

in a third time period of a switching cycle of the pulse width modulation signal, the ramp signal generation module charges a capacitor by using a charging current generated according to the sampling signal;

in a second time period of a switching cycle of the pulse width modulation signal, the ramp signal generation module discharges the capacitor through a discharge path; and

during a fourth period of a switching cycle of the pulse width modulated signal, the equalization switch is turned on to equalize the command signal and the ramp signal,

the first time period, the fourth time period, the second time period, and the third time period are sequentially consecutive time periods.

13. The control circuit of claim 1, wherein a slope of the ramp signal is proportional to the dc output voltage.

14. A switching converter, comprising:

the main circuit adopts at least one switching tube to control the transmission of electric energy from the input end to the output end, so as to generate direct-current output voltage according to direct-current input voltage; and

a control circuit according to any of claims 1 to 13 for generating a switch control signal to control the conductive state of the at least one switching tube.

15. The control circuit of claim 14, wherein the master circuit employs a topology selected from any of: step-down, step-up, non-inverting step-up and step-down, forward, and flyback.

16. The control circuit of claim 15, wherein the at least one switching tube comprises a high-side switching tube and a low-side switching tube connected in series between an input terminal and a ground terminal, the main circuit further comprising:

the inductor is connected between the middle node and the output end of the high-side switching tube and the low-side switching tube; and

an output capacitor connected between the output terminal and a ground terminal,

the switching control signal of the high-side switching tube is an in-phase signal of the pulse width modulation signal, and the switching control signal of the low-side switching tube is an inverted signal of the pulse width modulation signal.

17. The control circuit of claim 16, wherein the main circuit further comprises:

and the current sensor is connected between the low-side switching tube and a ground terminal, and obtains a current detection signal related to the inductive current flowing through the inductor during the conduction period of the low-side switching tube.

18. A method of controlling a switching converter, comprising:

generating a ramp signal according to the DC output voltage of the switching converter;

comparing the first superimposed signal related to the DC output voltage with an error signal of the DC output voltage and a second superimposed signal related to the ramp signal to obtain an intermediate signal;

generating a reset signal with a fixed period to obtain a fixed on-time;

generating a set signal according to the intermediate signal to obtain a turn-off time related to the DC output voltage;

generating a pulse width modulation signal according to the setting signal and the reset signal; and

converting the pulse width modulated signal to a switching control signal,

wherein the slope of the ramp signal is adaptively adjusted according to the DC output voltage.

19. The control method of claim 18, wherein the step of generating a ramp signal comprises:

generating a command signal according to the direct current output voltage;

sampling the command signal and the error signal of the ramp signal in a first time period of a switching cycle of the pulse width modulation signal to obtain a sampling signal;

in a third time period of a switching cycle of the pulse width modulation signal, charging a capacitor by using a charging current generated according to the sampling signal;

discharging a capacitor via a discharge path during a second time period of a switching cycle of the pulse width modulated signal; and

equalizing the command signal and the ramp signal during a fourth period of a switching cycle of the pulse width modulated signal,

the first time period, the fourth time period, the second time period, and the third time period are sequentially consecutive time periods.

20. The control method according to claim 19,

the first time period is a predetermined time period from a rising edge of the pulse width modulated signal, and,

the second period of time is a predetermined period of time from a falling edge of the pulse width modulated signal.

21. The control method according to claim 19,

the first time period is a predetermined time period from a zero crossing of the inductor current, and,

the second period of time is a predetermined period of time from a falling edge of the pulse width modulated signal.

22. The control method of claim 19, wherein the command signal is proportional to the dc output voltage.

23. The control method according to claim 19, further comprising:

and obtaining the minimum turn-off time by adopting a second timer, wherein the turn-off time is greater than the minimum turn-off time.

Technical Field

The present invention relates to power supply technology, and more particularly, to a switching converter, a control method and a control circuit thereof.

Background

Switching converters have been widely used in electronic systems for generating the operating voltages and currents required by internal circuit modules or loads. The switching converter adopts a switching tube to control the transmission of electric energy from an input end to an output end, so that constant output voltage and/or constant output current can be provided at the output end. In a switching converter, a constant on-time control method based on a ripple has advantages of good light-load efficiency, fast transient response, and easy implementation, and thus has been widely used in recent years.

Fig. 1 shows a schematic circuit diagram of a switching converter according to the prior art. The main circuit of the switching converter 100 includes switching transistors Q11 and Q12 connected in series between an input terminal and a ground terminal, an inductor L connected between an intermediate node of the switching transistors Q11 and Q12 and the output terminal, and a capacitor Co connected between the output terminal and the ground terminal. The input end of the main circuit receives a direct current input voltage Vin, and the output end of the main circuit provides a direct current output voltage Vout. The control circuit 110 of the switching converter 100 is used to provide switching control signals to the switching tubes Q11 and Q12.

In the control circuit 110, the first timer 114 sets a fixed on-time Ton of the switching period T, thereby generating a reset signal. The second timer 113 is used to set a minimum off-time Toff _ min (or a maximum switching frequency) corresponding to a predetermined output voltage and a predetermined load. The comparator 111 compares the dc output voltage Vout with a reference voltage Vref to obtain an intermediate signal. The two input terminals of the and gate 112 respectively receive the comparator output intermediate signal and the minimum off-time Toff _ min, and the output terminal provides a set signal. The RS flip-flop 115 generates a pulse width modulation signal PWM according to the reset signal and the set signal. The driving module 116 converts the PWM signal PWM into a switching control signal to control the on-state of the switching transistors Q11 and Q12.

When the output voltage Vout is smaller than the reference voltage Vref, the first timer 114 sets a fixed on-time, so that the on-time of the switch control signal is a fixed value. When the direct current output voltage Vout is greater than or equal to the reference voltage Vref, the turn-off signal of the switch control signal is valid, thereby generating the turn-off time dynamically adjusted according to the direct current output voltage Vout. The off time is greater than the minimum off time.

Fig. 2 shows a schematic circuit diagram of another switching converter according to the prior art. The control circuit 210 of the switching converter 200 includes an error amplifier 211 that compares the dc output voltage Vout with a reference voltage Vref to generate an error signal Verr. The comparator 111 further compares the dc output voltage Vout with the error signal Verr to obtain an intermediate signal. The control circuit 210 may eliminate voltage regulation problems. However, in some high-density applications, a multilayer ceramic capacitor is used as the output capacitor at the output of the switching converter 200. This type of output filter produces very little output ripple even in the presence of a large amount of noise. Since the control circuit 210 performs a control method of dynamic adjustment based on the ripple, the output ripple generated at the output terminal is small, which may cause a problem of instability of the control system.

Fig. 3 shows a schematic circuit diagram of a further switching converter according to the prior art. The control circuit 310 of the switch controller 300 includes an error amplifier 311 and a compensation module 313. The error amplifier 311 compares the dc output voltage Vout with a reference voltage Vref to generate an error signal Verr. The compensation module 313 generates a ramp signal Vramp according to the pulse width modulation signal PWM. The comparator 312 further compares the dc output voltage Vout, the error signal Verr, and the ramp signal Vramp to obtain an intermediate signal. The control circuit 310 can eliminate the voltage regulation problem and introduce an additional ramp signal using a compensation module to maintain the control system stable and suppress the output ripple.

In the above switch controller, the control circuit uses a slope signal with a fixed slope as a compensation signal of the comparator to maintain the stability of the control loop. The higher the slope of the ramp signal, the less and more stable the jitter of the control system, but the worse the transient performance. In the case of compensation with a fixed slope ramp signal, the stability and transient performance of the switching converter are not optimal.

Disclosure of Invention

The invention aims to provide a switching converter, a control method and a control circuit thereof, wherein the slope of a ramp signal is adaptively adjusted in a control system with constant on-time so as to take stability and transient performance of the switching converter into consideration.

According to an aspect of the present invention, there is provided a control circuit for a switching converter converting a dc input voltage to a dc output voltage, the control circuit comprising: the compensation module is used for generating a ramp signal; a comparator for comparing the first superimposed signal related to the dc output voltage with an error signal of the dc output voltage and the second superimposed signal related to the ramp signal to obtain an intermediate signal for generating a set signal; the first RS trigger generates pulse width modulation signals according to the setting signal and the reset signal respectively, obtains fixed on-time by adopting the reset signal and obtains off-time related to the direct current output voltage by adopting the setting signal; and the driving module is used for converting the pulse width modulation signal into a switch control signal, wherein the compensation module is used for adaptively adjusting the slope of the ramp signal according to the direct current output voltage.

Preferably, the method further comprises the following steps: and the first input end and the second input end of the AND gate respectively receive the intermediate signal and the minimum turn-off time, the output end of the AND gate provides the setting signal, and the minimum turn-off time is a fixed time period.

Preferably, the method further comprises the following steps: a first timer for generating the reset signal; and a second timer for generating the minimum off-time.

Preferably, the method further comprises the following steps: an error amplifier for comparing the DC output voltage with a reference voltage to obtain the error signal.

Preferably, the compensation module comprises: a voltage detection module for generating a command signal according to the DC output voltage and a reference voltage, wherein the command signal is proportional to the DC output voltage; the sampling and holding module is used for sampling and holding the instruction signal and the error signal of the ramp signal to obtain a sampling signal; the ramp signal generating module is used for generating a ramp signal according to the sampling signal, wherein the slope of the ramp signal is related to the amplitude of the direct current output voltage; and the balance switch is connected between the output end of the voltage detection module and the output end of the ramp signal generation module.

Preferably, the voltage detection module includes: a low pass filter for filtering the DC output voltage and slowing down the response time; the first voltage gain circuit and the second voltage gain circuit respectively perform gain amplification on the direct current output voltage and the reference voltage; and an adder that adds the gain-amplified direct-current output voltage and a reference voltage to each other to obtain the command signal.

Preferably, the sample-and-hold module comprises: a transconductance amplifier for converting an error signal of the command signal and the ramp signal into an error current; and a first switch and a first capacitor connected in series between the output terminal and the ground terminal of the transconductance amplifier, wherein the first switch is sampled during the on period of the first switch, and the first switch is held during the off period of the first switch, wherein the error current charges the first capacitor during the sampling period to obtain the sampling signal, wherein the on state of the first switch is controlled by a sampling and holding signal, the sampling is performed at a first time period beginning at a rising edge of the pulse width modulation signal when the switching converter operates in a continuous current mode, and the sampling is performed at a first time period beginning at a zero crossing of a current detection signal of the inductor current when the switching converter operates in a discontinuous current mode.

Preferably, the ramp signal generating module includes: a voltage-to-current converter generating a charging current corresponding to the sampling signal; a second capacitor connected between an output terminal of the voltage-to-current converter and a ground terminal; and the second resistor and the second switch are connected in series to form a discharge path between two ends of the second capacitor, wherein the second capacitor is charged by adopting the charging current, the conduction state of the second switch is controlled by adopting a discharge signal, and the second capacitor is discharged in a second time period beginning at the falling edge of the pulse width modulation signal so as to obtain the ramp signal.

Preferably, the method further comprises the following steps: and the mode detection module is used for obtaining a current mode signal according to the zero-crossing detection of the current detection signal of the inductive current.

Preferably, the method further comprises the following steps: and the control module generates a sampling and holding signal, a discharging signal and an equalizing signal according to the pulse width modulation signal and the current mode signal, and respectively controls a first switch in the sampling and holding module, a second switch in the ramp signal generating module and the equalizing switch.

Preferably, the control module comprises: a second RS flip-flop; the first input end and the second input end of the OR gate receive the pulse width modulation signal and the current mode signal respectively, and the output end of the second one-shot circuit is connected to the position end of the RS trigger; the output end of the third one-shot circuit is connected to the reset end of the RS trigger; and the input end of the fourth one-shot circuit is connected to the second output end of the RS trigger, wherein the output end of the first one-shot circuit provides the sampling and holding signal, the output end of the fourth one-shot circuit provides the discharging signal, and the first output end of the RS trigger provides the equalizing signal.

Preferably, the control module controls the conducting states of the first switch, the second switch and the equalization switch, and the sample-and-hold module samples the command signal and the error signal of the ramp signal during a first period of a switching cycle of the pwm signal to obtain a sampled signal; in a third time period of a switching cycle of the pulse width modulation signal, the ramp signal generation module charges a capacitor by using a charging current generated according to the sampling signal; in a second time period of a switching cycle of the pulse width modulation signal, the ramp signal generation module discharges the capacitor through a discharge path; and in a fourth period of a switching cycle of the pulse width modulation signal, the equalization switch is turned on to equalize the instruction signal and the ramp signal, and the first period, the fourth period, the second period, and the third period are sequentially consecutive periods.

Preferably, the slope of the ramp signal is proportional to the dc output voltage.

According to another aspect of the present invention, there is provided a switching converter comprising: the main circuit adopts at least one switching tube to control the transmission of electric energy from the input end to the output end, so as to generate direct-current output voltage according to direct-current input voltage; the control circuit provided by the invention is used for generating a switch control signal to control the conduction state of the at least one switching tube.

Preferably, the primary circuit employs a topology selected from any one of: step-down, step-up, non-inverting step-up and step-down, forward, and flyback.

Preferably, the at least one switching tube includes a high-side switching tube and a low-side switching tube connected in series between the input terminal and the ground terminal, and the main circuit further includes: the inductor is connected between the middle node and the output end of the high-side switching tube and the low-side switching tube; and the output capacitor is connected between the output end and a ground end, wherein the switching control signal of the high-side switching tube is an in-phase signal of the pulse width modulation signal, and the switching control signal of the low-side switching tube is an inverted signal of the pulse width modulation signal.

Preferably, the main circuit further comprises: and the current sensor is connected between the low-side switching tube and a ground terminal, and obtains a current detection signal related to the inductive current flowing through the inductor during the conduction period of the low-side switching tube.

According to still another aspect of the present invention, there is provided a control method of a switching converter, including: generating a ramp signal according to the DC output voltage of the switching converter; comparing the first superimposed signal related to the DC output voltage with an error signal of the DC output voltage and a second superimposed signal related to the ramp signal to obtain an intermediate signal; generating a reset signal with a fixed period to obtain a fixed on-time; generating a set signal according to the intermediate signal to obtain a turn-off time related to the DC output voltage; generating a pulse width modulation signal according to the setting signal and the reset signal; and converting the pulse width modulation signal into a switching control signal, wherein the slope of the ramp signal is adaptively adjusted according to the dc output voltage.

Preferably, the step of generating the ramp signal comprises: generating a command signal according to the direct current output voltage; sampling the command signal and the error signal of the ramp signal in a first time period of a switching cycle of the pulse width modulation signal to obtain a sampling signal; in a third time period of a switching cycle of the pulse width modulation signal, charging a capacitor by using a charging current generated according to the sampling signal; discharging a capacitor via a discharge path during a second time period of a switching cycle of the pulse width modulated signal; and equalizing the command signal and the ramp signal during a fourth time period of a switching cycle of the pulse width modulated signal, the first time period, the fourth time period, the second time period, and the third time period being sequentially consecutive time periods.

Preferably, the first time period is a predetermined time period from a rising edge of the pulse width modulation signal, and the second time period is a predetermined time period from a falling edge of the pulse width modulation signal.

Preferably, the first time period is a predetermined time period from a zero crossing of an inductor current, and the second time period is a predetermined time period from a falling edge of the pulse width modulated signal.

Preferably, the command signal is proportional to the dc output voltage.

Preferably, the method further comprises the following steps: and obtaining the minimum turn-off time by adopting a second timer, wherein the turn-off time is greater than the minimum turn-off time.

The control circuit according to the embodiment of the invention is used for generating a switch control signal with fixed conduction time so as to control the conduction state of a switching tube of the switching converter. The control circuit adopts a compensation module to generate a ramp signal, adopts a comparator to compare a first superposed signal related to the direct-current output voltage with an error signal of the direct-current output voltage and a second superposed signal related to the ramp signal to obtain an intermediate signal, and controls the turn-off time of a switching tube of the switching converter according to the intermediate signal. Therefore, the turn-off time of the switching tube can be dynamically adjusted according to the error signal of the direct current output voltage, so that the output ripple can be restrained. The compensation module adaptively adjusts the slope of the ramp signal according to the DC output voltage, so that the stability and the transient performance of the switching converter can be considered.

In a preferred embodiment, in a compensation module of the control circuit, a sample-hold signal, a discharge signal and an equalization signal are generated according to the pulse width modulation signal and the current mode signal, and a first switch in the sample-hold module, a second switch in the ramp signal generation module and the equalization switch are respectively controlled, so that sampling, equalization, discharge and charge are respectively carried out in sequentially continuous time periods, and therefore a segmented ramp signal related to a switch control signal of a switching converter is obtained. The slope of the ramp signal is proportional to the dc output voltage. The control circuit can be adapted to switching converters of different topologies, and the compensation module can automatically adapt to the current mode of the switching converter, thus reducing the design and manufacturing costs of redesigning the control circuit for different types of switching converters.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

fig. 1 shows a schematic circuit diagram of a switching converter according to the prior art;

fig. 2 shows a schematic circuit diagram of another switching converter according to the prior art;

fig. 3 shows a schematic circuit diagram of a further switching converter according to the prior art;

FIG. 4 shows a schematic circuit diagram of a switching converter according to an embodiment of the invention;

FIG. 5 illustrates a graph of ramp signal amplitude versus DC output voltage amplitude in a switching converter in accordance with an embodiment of the present invention;

FIG. 6 shows a schematic circuit diagram of a compensation module in a switching converter according to an embodiment of the invention;

FIG. 7 shows a schematic waveform diagram of the compensation module shown in FIG. 6 operating in continuous current mode CCM;

FIG. 8 shows a schematic waveform diagram of the compensation module of FIG. 6 operating in discontinuous current mode DCM; and

fig. 9 shows a flowchart of a control method of a switching converter according to an embodiment of the present invention.

Detailed Description

The invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by like reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. In addition, certain well known components may not be shown.

The present invention may be embodied in various forms, some examples of which are described below.

Fig. 4 shows a schematic circuit diagram of a switching converter according to an embodiment of the invention.

The main circuit of the switching converter 400 includes switching transistors Q11 and Q12 connected in series between an input terminal and a ground terminal, an inductor L connected between an intermediate node of the switching transistors Q11 and Q12 and the output terminal, and a capacitor Co connected between the output terminal and the ground terminal. The input end of the main circuit receives a direct current input voltage Vin, and the output end of the main circuit provides a direct current output voltage Vout. The switching tubes Q11 and Q12 are referred to as high-side switching tubes and low-side switching tubes, respectively, for example. The control circuit 410 of the switching converter 400 is used to provide switching control signals to the switching tubes Q11 and Q12. The switch control signal is a drive signal generated in accordance with a pulse width modulation signal. For example, the switching control signal of the switching tube Q11 is an in-phase signal of the pwm signal, and the switching control signal of the switching tube Q12 is an inverted signal of the pwm signal. During the conduction period of the switching tube Q12, the mode detection 414 can obtain the current detection signal Is related to the inductor current flowing through the inductor L. The current sensor may be, for example, a sampling resistor connected in series with the switching tube Q12.

The control circuit 410 includes an error amplifier 411, a comparator 412, a compensation module 413, a mode detection module 414, an and gate 112, a second timer 113, a first timer 114, an RS flip-flop 115, and a driving module 116.

The error amplifier 411 compares the dc output voltage Vout with a reference voltage Vref to generate an error signal Verr.

The mode detection module 414 Is connected to the current sensor 401 to obtain a current detection signal Is and generates a current mode signal CM based on the current detection signal. For example, in the switching period, if the current detection signal Is has a zero crossing, the current mode signal CM Is at a high level, indicating that the operation mode of the switching power supply 400 Is the Discontinuous Current Mode (DCM), and if the current detection signal Is has no zero crossing, the current mode signal CM Is at a low level, indicating that the operation mode of the switching power supply 400 Is the Continuous Current Mode (CCM).

The compensation module 413 generates a ramp signal Vramp according to the dc output voltage Vout, the current mode signal CM, and the PWM signal PWM, and generates a command signal Vcom according to the dc output voltage Vout and the reference voltage Vref. The magnitude of the command signal Vcom is proportional to the dc output voltage Vout for defining the slope of the ramp signal Vramp. Unlike the prior art switching power supply shown in fig. 1 to 3, the slope of the ramp signal Vramp generated by the compensation module 413 in the switching converter 400 according to the embodiment of the present invention is no longer fixed, and the slope is related to the command signal Vcom, that is, the dc output voltage Vout, so that the compensation module 413 has the function of adaptive ramp modulation.

The comparator 412 further compares a first superimposed signal of the dc output voltage Vout and the command signal Vcom with a second superimposed signal of the error signal Verr, the ramp signal Vramp, and the reference voltage Vref to obtain an intermediate signal for generating a set signal to control the off-time of the pulse width modulation signal PWM. The control circuit 410 can eliminate the voltage regulation problem and introduce an additional ramp signal using a compensation module to maintain the control system stable and suppress the output ripple.

The first timer 114 sets a fixed on-time Ton of the switching period T to generate a reset signal. The second timer 113 is used to set a minimum off-time Toff _ min (or a maximum switching frequency) corresponding to a predetermined output voltage and a predetermined load. The two inputs of the and gate 112 respectively receive the intermediate signal generated by the comparator 412 and the minimum off-time Toff _ min, and the output provides the set signal. The RS flip-flop 115 generates a pulse width modulation signal PWM according to the reset signal and the set signal. The driving module 116 converts the PWM signal PWM into a switching control signal to control the on-state of the switching transistors Q11 and Q12.

According to the switching converter 410 of this embodiment, the first timer 114 sets the fixed on-time so that the on-time of the switching control signal is a fixed value. When the direct current output voltage Vout is greater than or equal to the error signal Verr, the turn-off signal of the switch control signal is effective, so that the turn-off time dynamically adjusted according to the direct current output voltage Vout is generated. The off time is greater than the minimum off time. The dc output voltage Vout ripple generated through dynamic regulation is reduced.

Further, the control circuit 410 adaptively adjusts the slope of the ramp signal Vramp according to the operating mode of the switching converter and the dc output voltage Vout, so as to achieve both the stability and the transient performance of the switching converter.

Fig. 5 shows a graph of ramp signal amplitude versus dc output voltage amplitude in a switching converter in accordance with an embodiment of the invention. The magnitude of the ramp signal Vramp generated by the compensation module 413 in the switching converter 400 according to the embodiment of the present invention is no longer fixed, and is related to the command signal Vcom, i.e., is proportional to the dc output voltage Vout.

Fig. 6 shows a schematic circuit diagram of a compensation module in a switching converter according to an embodiment of the invention. The compensation module 413 includes a control module 10, a voltage detection module 20, a sample-and-hold module 30, a ramp signal generation module 40, and an equalization switch S1.

The control module 10 generates a plurality of switching control signals including a sample-and-hold signal SH, a discharge signal DSC, and an equalization signal EQ according to the pulse width modulation signal PWM and the current mode signal CM. The control module 10 includes an or gate 11, one-shot circuits 12 to 14 and 16, and an RS flip-flop 15.

The equalization switch S1 is connected between the output of the voltage detection module 20 and the output of the ramp signal generation module 40. During the active period of the equalization signal EQ, the output terminal of the voltage detection block 20 and the output terminal of the ramp signal generation block 40 are connected to each other, thereby equalizing the command signal Vcom and the ramp signal Vramp.

In the control module 10, two input terminals of the or gate 11 respectively receive the pulse width modulation signal PWM and the current mode signal CM, and an output terminal thereof is connected to an input terminal of the one-shot circuit 12. The sample-and-hold signal SH provided at the output of the one-shot circuit 12 is active when either one of the pulse width modulation signal PWM and the current mode signal CM is active. The one-shot circuits 13 and 14 have input terminals receiving the sample-and-hold signal SH and the pulse width modulation signal PWM, respectively, and output terminals connected to the set terminal and the reset terminal of the RS flip-flop 15, respectively. First output terminal (Q terminal) and second output terminal (Q terminal) of RS flip-flop 15Terminal) provides a first logic signal and a second logic signal that are inverted with respect to each other, wherein the first logic signal serves as an equalization signal EQ and the second logic signal generates a discharge signal DSC via the one-shot circuit 16.

The voltage detection module 20 generates a command signal Vcom according to the dc output voltage Vout and the reference voltage Vref. The voltage detection module 20 includes a low pass filter 21, voltage gain circuits 22 and 23, and an adder 24. The dc output voltage Vout may be a voltage signal collected from an output terminal of the switching power supply, or an equivalent voltage signal obtained by averaging the node voltages collected at the intermediate nodes of the switching transistors Q11 and Q12.

In the voltage detection module 20, the dc output voltage Vout is filtered and response time is slowed down via a low pass filter 21 and then provided to one input of an adder 24 via a voltage gain circuit 22. The reference voltage Vref is supplied to the other input of the adder 24 via the voltage gain circuit 22. Adder 24 adds the two to obtain command signal Vcom, which can be expressed as:

Vcom＝Vout*K1+Vref*K2 (1)

where K1 and K2 are gain coefficients of the voltage gain circuits 22 and 23, respectively, which are constants, respectively.

The sample-and-hold module 30 performs sample-and-hold on the error signal of the command signal Vcom and the ramp signal Vramp to obtain a sampling signal Va. The sample-and-hold module 30 includes a transconductance amplifier 31, a switch S2, and a capacitor C11.

In the sample-and-hold block 30, a transconductance amplifier 31 converts error signals of the command signal Vcom and the ramp signal Vramp into an error current. The switch S2 is turned on and off under the control of the sample-and-hold signal SH. When the switch S2 is turned on, the error current charges the capacitor C11 to obtain the sampling signal Va. The capacitor C11 holds the sampled signal Va when the switch S2 is open.

The ramp signal generating module 40 includes a voltage-to-current converter (V2I)41, a voltage gain circuit 42, a capacitor C12, a resistor R12, and a switch S3.

In the ramp signal generation module 40, the voltage-to-current converter 41 generates a charging current corresponding to the sampling signal Va. This charging current charges the capacitor C12 to generate the ramp signal Vamp. A resistor R12 and a switch S3 are connected in series across the capacitor C12, thereby forming a discharge path. The switch S3 is turned on and off under the control of the discharge signal DSC.

Switch S3 is turned on and off for a period of time during each switching cycle of switching converter 400. When the switch S3 is turned off, the charging current charges the capacitor C12, and the voltage across the capacitor C12 gradually increases with time. When the switch S3 is turned on, the capacitor C12 discharges via the discharge path. Thus, the ramp signal generating module 40 may generate a ramp signal of the same switching period as the switching converter 400.

When the switch S2 is in the conducting state, the charging current of the capacitor C12 will be automatically adjusted by the transconductance amplifier 31. After the system is stable in operation, the ramp signal Vramp at the moment when the switching tube Q12 is turned off can be expressed as:

Vramp＝Vcom (2)

when the switch S1 is open and the switch S2 is conductive, the input Va of the voltage-to-current converter 41 can be expressed as:

where K3 represents the gain factor of the voltage gain circuit 42, Tos represents the discharge time of one discharge of the switch S3, V2I represents the gain factor of the voltage-to-current converter 41, and Toff represents the off time of the switching tube Q11.

Finally, when the switching tube Q11 is turned off, the compensation slope Se of the whole system can be represented as:

fig. 7 shows a schematic waveform diagram of the compensation module shown in fig. 6 operating in continuous current mode CCM. In the figure, curves Is, PWM, SH, EQ, DSC, CM, Vcom, and Vramp respectively represent a current detection signal related to an inductor current during the on period of the switching tube Q12, a pulse width modulation signal related to the switching tube Q11, a sample hold signal, an equalization signal, a discharge signal, a current pattern signal, a command signal, and a ramp signal.

The command signal Vcom is a superimposed signal generated from the dc output voltage Vout and the reference voltage Vref, and its value is shown in equation (1).

This compensation module is for example used for the compensation module 413 in the switching converter 400 shown in fig. 4. In this embodiment, the switching converter 400 operates in continuous current mode CCM. In the switching cycle of the switching converter 400, the current detection signal Is does not cross zero all the time during the conduction period of the switching tube Q12, and the current mode signal CM Is always kept inactive.

In each switching period T, the sample-and-hold signal SH and the discharge signal DSC are pulse signals triggered at the rising edge and the falling edge of the pulse width modulation signal PWM, respectively, and last for the first period T1 and the third period T3. The sample-and-hold signal SH and the discharge signal DSC are used to control the switches S2 and S3, respectively, to sample the command signal Vcom for the first time period t1 beginning during the on period of the switching tube Q11 of the switching converter 400 to obtain the sample signal Va, and to discharge the capacitor C12 for the third time period t3 beginning during the off period of the switching tube Q11.

The equalization signal EQ is a pulse signal triggered at the falling edge of the sample-and-hold signal SH and continues until the falling edge of the pulse width modulation signal PWM. Equalization signal EQ is used to control the conductive state of equalization switch S1. That is, during the active period of the equalization signal EQ, the equalization switch S1 is turned on, thereby equalizing the command signal Vcom and the ramp signal Vramp.

The compensation module 413 generates a segmented ramp signal Vramp that is related to the switching control signal of the switching converter 400. At the beginning of each switching cycle, i.e., at the first time period t1 beginning at the conducting phase of the switching tube Q11, the command signal Vcom is sampled to generate the sampling signal Va, at which time the ramp signal Vramp gradually increases to the peak value, i.e., the command signal Vcom. During the remaining second time period t2 of the on-phase of the switching tube Q11, the ramp signal Vramp is equalized to the command signal Vcom, and at this time, the ramp signal Vramp is constant to the command signal Vcom. In a third time period t3 from the beginning of the off-phase of the switching tube Q11, the capacitor C12 is discharged, and the ramp signal Vramp gradually decreases to the valley value. The valley of the ramp signal Vramp is related to three factors: the resistance of resistor R12, the length of the on time of switch S3, and the peak value of ramp signal Vramp. During the remaining fourth time period t4 of the off-phase of the switching transistor Q11, the capacitor C12 is charged with the charging current associated with the sampling signal Va, and the ramp signal Vramp is gradually increased until the beginning of the next switching cycle.

In the control circuit 410 of the switching converter 400, the comparator 412 further compares a first superimposed signal of the dc output voltage Vout, the command signal Vcom with a second superimposed signal of the error signal Verr, the ramp signal Vramp, the reference voltage Vref to obtain an intermediate signal for generating a set signal to control the off-time of the pulse width modulation signal PWM. The control circuit 410 may eliminate the voltage regulation problem and introduce an additional ramp signal Vramp with a compensation module. The slope of the ramp signal Vramp is adaptively adjusted according to the dc output voltage Vout, and the generated system compensation slope Se is as shown in equation (4), so that the control system can be maintained stable and the output ripple can be suppressed.

Fig. 8 shows a schematic waveform diagram of the compensation module shown in fig. 6 operating in discontinuous current mode DCM. In the figure, curves Is, PWM, SH, EQ, DSC, CM, Vcom, and Vramp respectively represent a current detection signal related to an inductor current, a pulse width modulation signal related to the switching tube Q11, a sample hold signal, an equalization signal, a discharge signal, a current mode signal, a command signal, and a ramp signal during the on period of the switching tube Q12.

The command signal Vcom is a superimposed signal generated from the dc output voltage Vout and the reference voltage Vref, and its value is shown in equation (1).

This compensation module is for example used for the compensation module 413 in the switching converter 400 shown in fig. 4. In this embodiment, the switching converter 400 operates in discontinuous current mode DCM. In the switching period of the switching converter 400, since the switching tube Q12 Is turned on during the low level of the PWM signal, the current detection signal Is crosses zero during the turn-on of the switching tube Q12, and the current mode signal CM Is inactive during the period from the falling edge of the PWM signal until the current of Is crosses zero, and Is active during the rest of the period of the PWM signal.

In each switching period T, the sample-and-hold signal SH is a pulse signal triggered by a rising edge of the current mode signal CM, and the discharge signal DSC is a pulse signal triggered by a falling edge of the pulse width modulation signal PWM, which last for the fourth time period T4 and the second time period T2, respectively. The sample-and-hold signal SH and the discharge signal DSC are used to control the switches S2 and S3, respectively, to sample the command signal Vcom during a fourth time period t4 beginning at the zero crossing of the current of the switching converter 400 to obtain the sample signal Va, and to discharge the capacitor C12 during a second time period t2 beginning during the off period of the switching tube Q11.

The equalization signal EQ is a pulse signal triggered at the falling edge of the sample-and-hold signal SH and continues until the falling edge of the pulse width modulation signal PWM. Equalization signal EQ is used to control the conductive state of equalization switch S1. That is, during the active period of the equalization signal EQ, the equalization switch S1 is turned on, and the command signal Vcom and the ramp signal Vramp are equalized to be equal to each other.

The compensation module 413 generates a segmented ramp signal Vramp that is related to the switching control signal of the switching converter 400. During each switching period T, i.e. during the corresponding first time period T1 of the conducting phase of the switching tube Q11, the equalizing switch S1 is turned on to equalize the ramp signal Vramp to the command signal Vcom. During a second time period t2 when the off-phase of the switching tube Q11 begins, the capacitor C12 is discharged, and the ramp signal Vramp gradually decreases to a valley value. The valley of the ramp signal Vramp is related to three factors: the resistance of resistor R12, the length of the on time of switch S3, and the peak value of ramp signal Vramp. In the subsequent third time period t3, the capacitor C12 is recharged with a charging current corresponding to the sampled signal Va of the previous switching cycle. During a fourth time period t4 when the zero crossing of the current begins, the command signal Vcom is sampled by charging the capacitor C11 to generate a sampling signal Va, the sampling signal Va is converted into a current through the voltage-to-current converter (V2I), and the charging current of the capacitor C12 is adjusted according to the sampling signal Va to change the slope of the ramp signal Vramp, and at this time, the ramp signal Vramp gradually increases to a peak value, that is, the command signal Vcom is reached. In a fifth time period t5 of the off phase of the switching tube Q11, the ramp signal Vramp is equalized to the command signal Vcom, and at this time, the ramp signal Vramp is constant to the command signal Vcom.

In the control circuit 410 of the switching converter 400, the comparator 412 further compares a first superimposed signal of the dc output voltage Vout, the command signal Vcom with a second superimposed signal of the error signal Verr, the ramp signal Vramp, the reference voltage Vref to obtain an intermediate signal for generating a set signal to control the off-time of the pulse width modulation signal. The control circuit 410 may eliminate the voltage regulation problem and introduce an additional ramp signal Vramp with the compensation module. The slope of the ramp signal Vramp is adaptively adjusted according to the dc output voltage Vout, and the generated system compensation slope Se is as shown in equation (4), so that the stability of the switching converter can be maintained and the output ripple can be suppressed.

Fig. 9 shows a flowchart of a control method of a switching converter according to an embodiment of the present invention. The switching converter is for example the switching converter shown in fig. 4, wherein the control circuit comprises the compensation module shown in fig. 6. The switching converter operates in continuous current mode CCM and discontinuous current mode DCM.

In step S01, an adaptive ramp signal is generated based on the dc output voltage of the switching converter.

In step S02, the first superimposed signal of the dc output voltage and the command signal is compared with the second superimposed signal of the error signal, the ramp signal and the reference voltage to obtain an intermediate signal.

In step S03, a reset signal of a fixed period is generated to obtain a fixed on-time.

In step S04, a set signal is generated according to the intermediate signal to obtain an off-time associated with the dc output voltage.

In step S05, a pulse width modulation signal is generated based on the set signal and the reset signal.

In step S06, the pulse width modulated signal is converted into a switching control signal.

The above step S01 includes generating a command signal according to the dc output voltage, and performing a plurality of sub-steps in a first period, a fourth period, a second period, and a third period that are consecutive in turn in a switching cycle of the pulse width modulation signal. In a first time period, the command signal and the error signal of the ramp signal are sampled to obtain a sampling signal. And in a third time period, charging the capacitor by using the charging current generated according to the sampling signal. In a second time period, the capacitor is discharged via the discharge path. And equalizing the instruction signal and the ramp signal in a fourth time period.

The first time period is a predetermined time period beginning at a rising edge of the pulse width modulated signal when the switching converter is operating in the continuous current mode, and the first time period is a predetermined time period beginning at a zero crossing of the current sense signal of the inductor current when the switching converter is operating in the discontinuous current mode. Further, in both of the above-described current modes, the second period is a predetermined period from a falling edge of the pulse width modulation signal.

Preferably, the step S04 includes obtaining a minimum off-time by using a second timer, where the off-time is greater than the minimum off-time.

In the above embodiments, although the switching converter with the buck topology is described with reference to fig. 4, it is understood that the adaptive slope ramp signal generated by the compensation module can be used in switching converters with other topologies, including but not limited to buck, boost, buck-boost, non-inverting buck-boost, forward, flyback, etc.

In the above description, well-known structural elements and steps are not described in detail. It should be understood by those skilled in the art that the corresponding structural elements and steps may be implemented by various technical means. In addition, in order to form the same structural elements, those skilled in the art may also design a method which is not exactly the same as the above-described method. In addition, although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in advantageous combination.

The embodiments of the present invention have been described above. However, these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. The scope of the invention is defined by the appended claims and equivalents thereof. Various alternatives and modifications can be devised by those skilled in the art without departing from the scope of the invention, and these alternatives and modifications are intended to fall within the scope of the invention.