阅读说明：本技术 正面局域钝化接触的晶硅太阳电池及其制备方法 (Crystalline silicon solar cell with locally passivated and contacted front surface and preparation method thereof ) 是由 张树德 魏青竹 钱洪强 李跃 连维飞 倪志春 刘玉申 杨希峰 于 2019-09-24 设计创作，主要内容包括：本发明公开了一种正面局域钝化接触的晶硅太阳电池及其制备方法。该晶硅太阳电池包括正面电极、正面钝化层、N型硅掺杂层、P型硅基体、背面钝化层及背面电极，背面钝化层形成于P型硅基体背面，背面电极形成于背面钝化层上且局部穿过背面钝化层而和P型硅基体形成欧姆接触，N型硅掺杂层形成于P型硅基体的正面，N型硅掺杂层上形成有图形化的氧化硅薄层，氧化硅薄层上覆盖形成有N<Sup>+</Sup>型多晶硅层，正面电极透过正面钝化层并形成在N<Sup>+</Sup>型多晶硅层的上表面上和N<Sup>+</Sup>型多晶硅层形成欧姆接触。本发明在减小非金属接触区域复合速率的同时，进一步减小金属接触区域的复合速率。(The invention discloses a crystalline silicon solar cell with a locally passivated and contacted front surface and a preparation method thereof. The crystalline silicon solar cell comprises a front electrode, a front passivation layer, an N-type silicon doping layer, a P-type silicon substrate, a back passivation layer and a back electrode, wherein the back passivation layer is formed on the back of the P-type silicon substrate, the back electrode is formed on the back passivation layer and partially penetrates through the back passivation layer to form ohmic contact with the P-type silicon substrate, the N-type silicon doping layer is formed on the front of the P-type silicon substrate, a graphical silicon oxide thin layer is formed on the N-type silicon doping layer, and an N is formed on the silicon oxide thin layer in a covering manner + A polysilicon layer with a front electrode formed on N via the front passivation layer + On the upper surface of the type polysilicon layer and N + The type polysilicon layer forms an ohmic contact. The invention further reduces the recombination rate of the metal contact area while reducing the recombination rate of the non-metal contact area.)

1. The utility model provides a crystal silicon solar cell of front local passivation contact, includes front electrode, front passivation layer, N type silicon doping layer, P type silicon substrate, back passivation layer and back electrode, the back passivation layer form in P type silicon substrate back, the back electrode is formed on the back passivation layer and local pass the back passivation layer and form ohmic contact with P type silicon substrate, N type silicon doping layer form in the front of P type silicon substrate its characterized in that: a patterned silicon oxide thin layer is formed on the N-type silicon doping layer, and N is formed on the silicon oxide thin layer in a covering mode⁺A front passivation layer formed on the N layer⁺The front electrode penetrates through the front passivation layer and is formed on the N-type silicon doping layer⁺On the upper surface of the type polysilicon layer, and the N⁺The type polysilicon layer forms an ohmic contact.

2. The crystalline silicon solar cell of claim 1, wherein: the N-type silicon doping layer is provided with a plane local area and a suede area, the silicon oxide thin layer is formed on the plane area contacted with the N-type silicon doping layer, and the suede area of the N-type silicon doping layer is covered with the front passivation layer.

3. The crystalline silicon solar cell of claim 2, wherein: the front surface of the P-type silicon substrate is locally textured to form a textured surface, and the N-type doped layer is stacked on the front surface of the P-type silicon substrate and is provided with the plane area and the textured area.

4. The crystalline silicon solar cell of claim 1, wherein: the N-type silicon doped layer and the N⁺Phosphorus elements are doped in the type polycrystalline silicon layers, and the doping concentration of the phosphorus elements in the N type silicon doping layer is smaller than that of the N⁺And the doping concentration of phosphorus element in the polycrystalline silicon layer.

5. The crystalline silicon solar cell of claim 1, wherein: said N is⁺The thickness of the polycrystalline silicon layer is 10-200 nm, and the thickness of the silicon oxide thin layer is 0.1-2 nm.

6. The crystalline silicon solar cell of claim 1, wherein: the back passivation layer is provided with a groove, and the P-type silicon substrate is provided with a P corresponding to the groove⁺A type silicon portion, a part of the back electrode passing through the groove and contacting the P⁺The type silicon portion forms an ohmic contact.

7. A method of manufacturing a crystalline silicon solar cell according to any one of claims 1 to 6, comprising the steps of:

A. polishing the surface of the P-type silicon wafer;

B. depositing a patterned first mask on the front surface of the silicon wafer;

C. texturing the silicon wafer, and then removing the first mask;

D. carrying out phosphorus doping on the front side of the silicon wafer to form an N-type silicon doping layer;

E. growing a silicon oxide thin layer on the N-type silicon doped layer, and forming N on the silicon oxide thin layer⁺A type polycrystalline silicon layer;

F. in N⁺Depositing a patterned second mask on the type polycrystalline silicon layer, wherein the pattern of the second mask is the same as or similar to the pattern of the first mask;

G. removing N outside the second mask region⁺A type polycrystalline silicon layer;

H. removing the thin silicon oxide layer and the second mask;

I. depositing a back passivation film on the back of the silicon wafer, and depositing a front passivation film on the front;

J. slotting the back of the silicon wafer to expose the P-type silicon substrate;

K. and respectively printing slurry on the back and the front of the silicon wafer, and sintering.

8. The method of claim 7, wherein: and in the step E, forming the silicon oxide thin layer through thermal oxidation or wet chemical oxidation, wherein the thickness is 0.1-2 nm.

9. The method of claim 7, wherein: in the step E, the N is formed on the silicon oxide thin layer by in-situ doping⁺A type polycrystalline silicon layer; or, firstly, forming a polysilicon layer on the silicon oxide thin layer, and then doping by diffusion or ion implantation to form the N⁺And forming a polycrystalline silicon layer.

10. The method of claim 7, wherein: the first mask and the second mask are silicon nitride; in the step C, removing the first mask by adopting hydrofluoric acid; in the step G, the N except the second mask area is etched by using alkali solution⁺Etching the edge of the silicon wafer by adopting a mixed solution of nitric acid and hydrofluoric acid, and polishing the back surface of the silicon wafer; and in the step H, removing the silicon oxide thin layer and the second mask by adopting hydrofluoric acid.

Technical Field

The invention belongs to the field of crystalline silicon solar cells, and relates to a crystalline silicon solar cell with a locally passivated and contacted front surface and a preparation method thereof.

Background

The PERC (passivated Emitter and reader cell) crystalline silicon solar cell adopts the dielectric layer as the back passivation layer, so that the back surface recombination rate can be greatly reduced, and the photoelectric conversion efficiency of the cell is improved. Compared with the traditional aluminum back field battery, the PERC battery can obtain 1% -1.5% efficiency improvement. After back surface recombination is effectively inhibited, front surface recombination becomes a bottleneck for improving battery efficiency, so that many photovoltaic enterprises begin to introduce a selective emitter technology on the PERC battery to reduce the front surface recombination rate and further improve the battery efficiency. The selective emitter technology divides the emitter into a non-metal contact area and a metal contact area, the doping concentration of the non-metal contact area is low, the recombination rate is reduced, the doping concentration of the metal contact area is high, and the contact resistance of the electrode is reduced. That is, selective emitter technology can only reduce the recombination rate of non-metal contact regions, but cannot reduce the recombination rate of metal contact regions.

Disclosure of Invention

In view of the above technical problems, the present invention aims to provide a crystalline silicon solar cell with a front surface in a local passivation contact, which reduces the recombination rate of a non-metal contact region and further reduces the recombination rate of a metal contact region.

The invention also provides a preparation method of the crystalline silicon solar cell with the front surface in local passivation contact, and the prepared crystalline silicon solar cell has a low recombination rate of the metal contact area.

In order to achieve the purpose, the invention adopts a technical scheme as follows:

the utility model provides a crystal silicon solar cell of front local passivation contact, includes front electrode, front passivation layer, N type silicon doping layer, P type silicon substrate, back passivation layer and back electrode, the back passivation layer form in P type silicon substrate back, the back electrode form in on the back passivation layer and local pass the back passivation layer and with P type silicon substrate form ohmic contact, N type silicon doping layer form in the front of P type silicon substrate, be formed with graphical silicon oxide thin layer on the N type silicon doping layer, the cover is formed with N on the silicon oxide thin layer⁺A front passivation layer formed on the N layer⁺The front electrode penetrates through the front passivation layer and is formed on the N-type silicon doping layer⁺On the upper surface of the type polysilicon layer, and the N⁺The type polysilicon layer forms an ohmic contact.

Preferably, the N-type silicon doped layer has a planar local area and a textured area, the silicon oxide thin layer is formed on the planar area contacted by the N-type silicon doped layer, and the textured area of the N-type silicon doped layer is covered with the front passivation layer.

More preferably, the front surface of the P-type silicon substrate is locally textured to form a textured surface, and the N-type doped layer is stacked on the front surface of the P-type silicon substrate and has the plane area and the textured area.

Preferably, the N-type silicon doped layer and the N⁺The type polycrystalline silicon layers are all doped with phosphorus elements.

More preferably, the doping concentration of the phosphorus element in the N-type silicon doping layer is less than that of the N⁺And the doping concentration of phosphorus element in the polycrystalline silicon layer.

Preferably, the thickness of the N + type polycrystalline silicon layer is 10-200 nm.

Preferably, the thickness of the silicon oxide thin layer is 0.1-2 nm.

Preferably, the back passivation layer is provided with a groove, and the P-type silicon substrate has a P corresponding to the groove⁺A type silicon portion, a part of the back electrode passing through the groove and contacting the P⁺The type silicon portion forms an ohmic contact.

The other technical scheme adopted by the invention is as follows:

a preparation method of the crystalline silicon solar cell comprises the following steps:

A. polishing the surface of the P-type silicon wafer;

B. depositing a patterned first mask on the front surface of the silicon wafer;

C. texturing the silicon wafer, and then removing the first mask;

D. carrying out phosphorus doping on the front side of the silicon wafer to form an N-type silicon doping layer;

E. growing a silicon oxide thin layer on the N-type silicon doped layer, and forming N on the silicon oxide thin layer⁺A type polycrystalline silicon layer;

F. in N⁺Depositing a patterned second mask on the type polycrystalline silicon layer, wherein the pattern of the second mask is the same as or similar to the pattern of the first mask;

G. removing N outside the second mask region⁺A type polycrystalline silicon layer;

H. removing the thin silicon oxide layer and the second mask;

I. depositing a back passivation film on the back of the silicon wafer, and depositing a front passivation film on the front;

J. slotting the back of the silicon wafer to expose the P-type silicon substrate;

K. and respectively printing slurry on the back and the front of the silicon wafer, and sintering.

Preferably, in the step E, the thin silicon oxide layer is formed by thermal oxidation or wet chemical oxidation, and the thickness is 0.1 to 2 nm.

Preferably, in the step E, the N is formed by in-situ doping on the silicon oxide thin layer⁺A type polycrystalline silicon layer; orForming a polysilicon layer on the silicon oxide thin layer, and doping by diffusion or ion implantation to form the N⁺And forming a polycrystalline silicon layer.

Preferably, the first mask and the second mask are silicon nitride; in the step C, removing the first mask by adopting hydrofluoric acid; in the step G, the N except the second mask area is etched by using alkali solution⁺Etching the edge of the silicon wafer by adopting a mixed solution of nitric acid and hydrofluoric acid, and polishing the back surface of the silicon wafer; and in the step H, removing the silicon oxide thin layer and the second mask by adopting hydrofluoric acid.

Compared with the prior art, the invention has the following advantages by adopting the scheme:

in the crystalline silicon solar cell with the front surface in local passivation contact, the silicon surface of the front surface metal contact area is a plane, the density of surface defect states is low, and the plane structure and the passivation contact structure are combined in the front surface metal contact area, so that the passivation effect of the passivation contact structure can be further improved, the recombination rate of the metal contact area is reduced, and the cell conversion efficiency is improved.

Drawings

In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a crystalline silicon solar cell.

Wherein the content of the first and second substances,

1. a front electrode; 2. n is a radical of⁺A type polycrystalline silicon layer; 3. a thin layer of silicon oxide; 4. a front passivation layer; 5. an N-type silicon doped layer; 6. a P-type silicon substrate; 7. p⁺A type silicon site; 8. a back passivation layer; 9. and a back electrode.

Detailed Description

Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings so that the advantages and features of the invention may be more readily understood by those skilled in the art. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

The embodiment provides a crystalline silicon solar cell with a front surface local passivation contact, which is a PERC cell. Referring to fig. 1, the crystalline silicon solar cell includes front electrodes 1, N⁺The solar cell comprises a type polycrystalline silicon layer 2, a silicon oxide thin layer 3, a front passivation layer 4, an N-type silicon doping layer 5, a P-type silicon substrate 6, a back passivation layer 8 and a back electrode 9. Wherein the P-type silicon substrate 6 is a boron-doped or gallium-doped P-type silicon substrate. The N-type silicon doping layer 5 is doped with phosphorus with low phosphorus doping concentration, is formed on the front surface of the P-type silicon substrate 6 and forms a PN junction with the P-type silicon substrate. Thin layer of silicon oxide 3 and N⁺The type polycrystalline silicon layer 2 is a graphical layered structure, the graphs of the type polycrystalline silicon layer and the type polycrystalline silicon layer are consistent, and the type polycrystalline silicon layer are stacked to form a passivation contact structure; a thin layer of silicon oxide 3 is formed on a portion of the upper surface of the N-type silicon doped layer 5, N⁺The type polycrystalline silicon layer 2 covers the upper surface of the formed silicon oxide thin layer 3. A front passivation layer 4 is laminated on N⁺On the type polycrystalline silicon layer 2 and on the other upper surface of the N-type doped silicon layer 5 not covered by the thin silicon oxide layer 3. The front electrode 1 is also patterned and its pattern and N⁺The pattern of the polysilicon layer 2 is identical or similar, and the front electrode 1 is positioned at N⁺ A polysilicon layer 2 formed on the front surface of the substrate and penetrating the front passivation layer 4⁺On the upper surface of the type polycrystalline silicon layer 2, thereby adding N⁺The type polycrystalline silicon layer 2 forms an ohmic contact. A back passivation layer 8 is formed on the back of the P-type silicon substrate 6, and a back electrode 9 is formed on the back passivation layer 8 and partially penetrates through the back passivation layer 8 to form ohmic contact with the P-type silicon substrate 6.

Specifically, the front surface of the P-type silicon substrate 6 is locally textured to form a textured surface, so that the P-type silicon substrate has a plane area and a textured area, wherein the textured area is concave and convex, and has a pyramid structure. The plane area is a metal contact area, and the suede area is a non-metal contact area. The N-type doped layer 5 is stacked on the front surface of the P-type silicon substrate 6 and is provided with a corresponding plane area and a suede area. The silicon oxide thin layer 3 is formed on the plane area of the N-type silicon doping layer 5, and the front passivation layer 4 covers the suede area of the N-type silicon doping layer 5.

The N-type silicon doped layer 5 and N⁺The type polysilicon layers 2 are all doped with phosphorus elements, and the doping concentration of the phosphorus elements in the N type silicon doping layer 5 is less than that of N⁺The doping concentration of phosphorus element in the type polysilicon layer 2. N is a radical of⁺The thickness of the polycrystalline silicon layer 2 is 10-200 nm. The thickness of the thin silicon oxide layer 3 is 0.1 to 2 nm.

The back passivation layer 8 is provided with a groove, and the P-type silicon substrate 6 is provided with a P corresponding to the groove⁺The silicon portion 7, the back electrode 9 partially passing through the groove and being combined with P⁺ Type silicon sites 7 form ohmic contacts. Specifically, laser grooving is carried out on the passivation layer 8 on the back until the P-type silicon substrate 6 is exposed, then metal slurry is printed on the back of the silicon wafer, part of the slurry enters the groove and forms ohmic contact with the P-type silicon substrate 6 after sintering, and the contact position is the P⁺And a type silicon site 7.

In this embodiment, the front electrode 1 may be a silver electrode; the front passivation layer 4 can be a silicon nitride layer, and plays a role of passivation and antireflection; p⁺The type silicon site 7 is located on the back surface of the P-type silicon substrate 6 and is called a local back surface field; the back passivation layer 8 may be an aluminum oxide/silicon nitride stack; the back electrode 9, which may be aluminum, covers the back passivation layer 8 and partially enters the grooves of the back passivation layer 8.

As shown in fig. 1, the N-type silicon doping concentration in the non-metal contact region (the region not in contact with the front electrode) is low, which can reduce the recombination rate of the non-metal contact region. The recombination rate of the metal contact region can be reduced by introducing a passivation contact structure (a thin silicon oxide layer and doped polysilicon) in the metal contact region. Because the N-type silicon of the non-metal contact region extends to the metal contact region, carriers separated in the non-metal contact region can be transported to the metal contact region and then collected and converted into electric energy, namely the carrier collection efficiency is high.

The N-type silicon doping concentration in the non-metal contact area is low, and the recombination rate of the non-metal contact area can be reduced. The metal contact area is a plane structure, and the combination with a passivation contact structure (a silicon oxide thin layer and doped polysilicon) can further reduce the recombination rate of the metal contact area.

The embodiment also provides a preparation method of the crystalline silicon solar cell with the front surface locally passivated contact, which sequentially comprises the following steps:

A. polishing the surface of the P-type silicon wafer;

B. depositing a patterned first mask on the front surface of the silicon wafer;

C. texturing the silicon wafer, and then removing the first mask;

D. carrying out phosphorus doping on the front side of the silicon wafer to form an N-type silicon doping layer;

E. growing a silicon oxide thin layer on the N-type silicon doped layer, and forming N on the silicon oxide thin layer⁺A type polycrystalline silicon layer;

F. in N⁺Depositing a patterned second mask on the type polycrystalline silicon layer, wherein the pattern of the second mask is the same as or similar to the pattern of the first mask;

G. removing N outside the second mask region⁺A type polycrystalline silicon layer;

H. removing the thin silicon oxide layer and the second mask;

I. depositing a back passivation film on the back of the silicon wafer, and depositing a front passivation film on the front;

J. slotting the back of the silicon wafer to expose the P-type silicon substrate;

K. and respectively printing slurry on the back and the front of the silicon wafer, and sintering.

And in the step A, cleaning the P-type silicon wafer and polishing the surface.

In the step B, a patterned first mask is deposited on the front surface of the silicon wafer, and the mask material is a material that does not react with alkali, such as silicon nitride, and is formed by screen printing or PECVD with a mask.

And in the step C, the silicon wafer is subjected to alkali texturing, then the mask is removed, and the silicon nitride mask is removed by soaking with hydrofluoric acid.

And D, doping phosphorus on the front surface of the silicon wafer by adopting a diffusion or ion implantation method to form N-type silicon with lower doping concentration. Wherein if a diffusion method is used, the phosphosilicate glass generated by the diffusion needs to be removed with hydrofluoric acid.

And in the step E, growing a silicon oxide thin layer on the front surface of the silicon wafer, wherein the thickness is 0.1-2 nm, and the method can be thermal oxidation or wet chemical oxidation. Depositing higher phosphorus-doped N on silicon oxide thin layer⁺The method of the polysilicon can be LPCVD in-situ doping, or LPCVD is adopted to deposit a polysilicon layer firstly, and then diffusion or ion implantation is adopted to carry out doping. Wherein if a diffusion method is used, the phosphosilicate glass generated by the diffusion needs to be removed with hydrofluoric acid.

And in the step F, depositing a patterned second mask on the front surface of the silicon wafer, wherein the pattern of the second mask is the same as or similar to that of the previous mask. The mask material is a material that does not react with alkali, such as silicon nitride, and the method can be screen printing or PECVD with a mask.

In the step G, the N except the second mask area is etched by using alkali solution⁺And (3) molding the polycrystalline silicon, and etching the edge of the silicon wafer and polishing the back of the silicon wafer by adopting a mixed solution of nitric acid and hydrofluoric acid.

And H, removing the silicon oxide thin layer and the second mask by adopting hydrofluoric acid soaking.

And in the step I, depositing a passivation layer, specifically an aluminum oxide/silicon nitride lamination, on the back of the silicon wafer. And depositing a passivation layer, specifically silicon nitride, on the front surface.

And step J, carrying out laser hole opening on the passivation layer on the back of the silicon wafer to expose the P-type silicon substrate.

In the step K, screen printing metallization slurry, which can be aluminum slurry, on the back surface of the silicon wafer; screen printing metallization slurry, which can be silver paste, on the front surface of the silicon wafer; and sintering to complete metallization. During sintering, the aluminum paste and silicon are fused to form a local back surface field, i.e. the P⁺A type silicon site. The pattern of the front electrode is the same as or similar to the pattern of the previous mask.

According to the invention, the silicon surface of the front metal contact area is a plane, the density of surface defect states is low, and the plane structure and the passivation contact structure are combined in the front metal contact area, so that the passivation effect of the passivation contact structure can be further improved, the recombination rate of the metal contact area is reduced, and the battery conversion efficiency is improved.

The above embodiments are merely illustrative of the technical ideas and features of the present invention, and are preferred embodiments, which are intended to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and not to limit the scope of the present invention. All equivalent changes or modifications made according to the principles of the present invention should be covered within the protection scope of the present invention.