Mask strip, array substrate, display screen and display device
阅读说明:本技术 掩膜条、阵列基板、显示屏及显示装置 (Mask strip, array substrate, display screen and display device ) 是由 刘明星 刘如胜 张兵 韩冰 赵莹 甘帅燕 高峰 于 2019-01-31 设计创作,主要内容包括:本申请提供一种掩膜条、阵列基板、显示屏及显示装置,掩膜条用于阵列基板上的发光结构层的制作,所述掩膜条包括多个子掩膜版,所述子掩膜版包括第一掩膜区和第二掩膜区,所述第一掩膜区具有第一掩膜开口,所述第二掩膜区具有第二掩膜开口,所述第二掩膜开口的密度小于第一掩膜开口的密度,且至少部分第二掩膜开口的尺寸大于所述第一掩膜开口的尺寸。至少部分第二掩膜开口的尺寸大于所述第一掩膜开口的尺寸,从而降低第二掩膜区的强度,使得第二掩膜区的强度接近或等于第一掩膜区的强度,掩膜条在张网时第一掩膜区与第二掩膜区的交界区域受力均匀,因而交界区域不易产生褶皱,从而降低或消除透明显示区域和正常显示区域的混色风险。(The application provides a mask strip, array substrate, display screen and display device, the mask strip is used for the preparation of the last light-emitting structure layer of array substrate, the mask strip includes a plurality of sub-mask versions, sub-mask version includes first mask region and second mask region, first mask region has first mask opening, the second mask region has second mask opening, second mask open-ended density is less than first mask open-ended density, and at least partial second mask open-ended size is greater than first mask open-ended size. At least part of the second mask openings are larger than the first mask openings, so that the strength of the second mask area is reduced, the strength of the second mask area is close to or equal to that of the first mask area, the stress of the junction area of the first mask area and the second mask area is uniform when the mask strip is in a stretched state, wrinkles are not easily generated in the junction area, and the color mixing risk of a transparent display area and a normal display area is reduced or eliminated.)
1. The mask strip is used for manufacturing a light-emitting structure layer on an array substrate and is characterized by comprising a plurality of sub-masks, each sub-mask comprises a first mask area and a second mask area, the first mask area is provided with a first mask opening, the second mask area is provided with a second mask opening, the density of the second mask opening is smaller than that of the first mask opening, and at least part of the size of the second mask opening is larger than that of the first mask opening.
2. The mask strip of claim 1, wherein: the array substrate comprises a substrate and a first OLED area and a second OLED area which are positioned on the substrate, the pixel density of the second OLED region is less than the pixel density of the first OLED region, the first OLED region includes a first pixel opening, the second OLED region includes a second pixel opening, the first mask opening is used for manufacturing a first light emitting structure layer of a first OLED area, the second mask opening is used for manufacturing a second light emitting structure layer of a second OLED area, the first light emitting structure layer and the second light emitting structure layer are formed in the same process by adopting the sub-masks, wherein a distance d2 between the projected outer contour of the second mask opening on the substrate and the projected outer contour of the second pixel opening on the substrate is larger than a distance d1 between the projected outer contour of the first mask opening on the substrate and the projected outer contour of the first pixel opening on the substrate;
preferably, the distance d2 between the projected outer contour of the second mask opening on the substrate and the projected outer contour of the second pixel opening on the substrate is 8-15 micrometers;
preferably, the second mask openings and the first mask openings are arranged in the same rule;
preferably, the first mask opening is square, and the second mask opening is circular, oval, dumbbell-shaped, gourd-shaped or square.
3. The mask strip of claim 1, wherein: the second mask area comprises at least two opening areas which are sequentially arranged from the central area to the outer area of the second mask area, and in the two adjacent opening areas, the size of the second mask opening of the opening area close to the central area is smaller than that of the second mask opening of the opening area far away from the central area;
preferably, the second mask region comprises 3 opening regions;
preferably, the size of the second mask opening in the opening region located in the central region of the second mask region is greater than or equal to the size of the first mask opening.
4. The mask strip of claim 1, wherein: the sub-mask comprises a non-mask functional region, the second mask region is positioned between the non-mask functional region and the first mask region, and the non-mask functional region is provided with a plurality of through holes or a plurality of recesses;
preferably, the sizes of the plurality of through holes are equal to each other or the sizes of the plurality of recesses are equal to each other;
preferably, the sizes of the plurality of through holes or the sizes of the plurality of recesses are gradually reduced along a direction away from the second mask region;
preferably, the through holes or the depressions are circular, oval, dumbbell-shaped, gourd-shaped or square.
5. The mask strip of claim 1, wherein: the second mask region comprises a plurality of mask recesses, and the mask recesses are positioned between the adjacent second mask openings;
preferably, the mask recess is equal in size to the second mask opening;
preferably, the array substrate comprises a substrate, and a first OLED region and a second OLED region located on the substrate, the second OLED region of the array substrate comprises a plurality of pixel units, each pixel unit comprises n sub-pixels, the second mask region comprises a plurality of second mask sub-regions corresponding to the pixel units, and the number of mask recesses of each second mask sub-region is n-1;
preferably, the pitch between adjacent mask recesses and second mask openings is equal to the pitch between two adjacent first mask openings.
6. An array substrate, comprising a substrate, and a first OLED region and a second OLED region on the substrate, wherein the pixel density of the first OLED region is greater than that of the second OLED region, the first OLED region comprises a first pixel opening, the second OLED region comprises a second pixel opening, the first OLED region comprises a first electrode layer, a first light emitting structure layer formed on the first electrode layer, and a second electrode layer formed on the first light emitting structure layer, the second OLED region comprises a third electrode layer, a second light emitting structure layer formed on the third electrode layer, and a fourth electrode layer formed on the second light emitting structure layer, and the first light emitting structure layer and the second light emitting structure layer are formed in the same process by using the mask strip according to any one of claims 1 to 5.
7. The array substrate of claim 6, wherein the second pixel openings are arranged in a same pattern as the first pixel openings;
preferably, the size of the second pixel opening is the same as the size of the first pixel opening, or the size of the second pixel opening is larger than the size of the first pixel opening;
preferably, the second pixel opening has a square, circular, oval or dumbbell shape;
preferably, when the size of the second pixel opening is larger than that of the first pixel opening, the second OLED region includes at least two display regions arranged from a central region to an outer region of the second OLED region, and of the two adjacent display regions, the size of the second pixel opening of the display region close to the central region is smaller than that of the second pixel opening of the display region far from the central region;
preferably, the second OLED region includes 3 display regions;
preferably, the size of the second pixel opening of the display region located in the central region of the second OLED region is greater than or equal to the size of the first pixel opening.
8. The array substrate of claim 6, wherein: the first electrode layer and the third electrode layer are anodes, and the second electrode layer and the fourth electrode layer are cathodes;
preferably, the third electrode layer comprises a plurality of third electrodes, and the third electrodes are circular, square, oval, dumbbell-shaped, gourd-shaped or wavy;
preferably, the fourth electrode layer is a surface electrode;
preferably, the fourth electrode layer is a single-layer structure or a laminated structure, when the fourth electrode layer is a single-layer structure, the fourth electrode layer is a single-layer metal layer, a single-layer metal mixture layer, or a single-layer transparent metal oxide layer, when the fourth electrode layer is a laminated structure, the fourth electrode layer is a laminated layer of a transparent metal oxide layer and a metal layer, or the fourth electrode layer is a laminated layer of a transparent metal oxide layer and a metal mixture layer;
preferably, when the material of the fourth electrode layer is doped with metal, the thickness of the fourth electrode layer is greater than or equal to 100 angstroms, and when the thickness of the fourth electrode layer is less than or equal to 500 angstroms, the thickness of the fourth electrode layer is entirely continuous, and the transparency of the fourth electrode layer is greater than 40%;
preferably, when the material of the fourth electrode layer is doped with metal, the thickness of the fourth electrode layer is greater than or equal to 100 angstroms, and when the thickness of the fourth electrode layer is less than or equal to 200 angstroms, the thickness of the fourth electrode layer is entirely continuous, and the transparency of the fourth electrode layer is greater than 40%;
preferably, when the material of the fourth electrode layer is doped with metal, the thickness of the fourth electrode layer is greater than or equal to 50 angstroms, and when the thickness of the fourth electrode layer is less than or equal to 200 angstroms, the thickness of the fourth electrode layer is entirely continuous, and the transparency of the fourth electrode layer is greater than 50%;
preferably, when the material of the fourth electrode layer is doped with metal, the thickness of the fourth electrode layer is greater than or equal to 50 angstroms, and when the thickness of the fourth electrode layer is less than or equal to 200 angstroms, the thickness of the fourth electrode layer is entirely continuous, and the transparency of the fourth electrode layer is greater than 60%;
preferably, when the fourth electrode layer is a single-layer structure, the single-layer metal layer is made of Al or Ag, the single-layer metal mixture layer is made of MgAg or a metal mixture material doped with Al, and the transparent metal oxide is ITO or IZO.
9. A display screen, its characterized in that: the display screen includes:
the array substrate as claimed in claims 6-8, and a package structure covering the surface of the array substrate.
10. A display device, characterized in that the display device comprises:
an apparatus body having a device region;
the display screen of claim 9 overlaid on the device body;
the device area is located below the second OLED area, and a photosensitive device which penetrates through the second OLED area to collect light is arranged in the device area.
Technical Field
The application relates to the field of display, in particular to a mask strip, an array substrate, a display screen and a display device.
Background
With the rapid development of display terminals, the requirements of users on screen occupation ratios are higher and higher, so that the comprehensive screen display of the display terminal is concerned more and more in the industry. Traditional display terminal such as cell-phone, panel computer etc. owing to need integrate such as leading camera, earphone and infrared sensing element etc. but the fluting region can not be used for the display picture, like the bang screen among the prior art, or adopts the mode of trompil on the screen, to the electronic equipment who realizes the function of making a video recording, external light accessible screen on the trompil department get into the photosensitive element who is located the screen below. However, such display terminals are not truly full-screen.
Disclosure of Invention
Based on this, this application provides a mask strip, array substrate, display screen and display device.
The application provides a mask strip for the preparation of the last luminous structure layer of array substrate, the mask strip includes a plurality of sub-mask version, sub-mask version includes first mask district and second mask district, first mask district has first mask opening, second mask district has second mask opening, second mask open-ended density is less than first mask open-ended density, and at least partial second mask open-ended size is greater than first mask open-ended size.
The density of the first mask openings of the first mask area is high, the density of the second mask openings of the second mask area is low, if the size of the first mask openings is equal to that of the second mask openings, the strength of the second mask area is high, and at least part of the size of the second mask openings is larger than that of the first mask openings, so that the strength of the second mask area is reduced, the strength of the second mask area is close to or equal to that of the first mask area, the stress of the junction area of the first mask area and the second mask area is uniform when the mask strip is in a net-opening state, wrinkles are not easily generated in the junction area, and the color mixing risk of the junction area of the transparent display area and the normal display area is reduced or eliminated.
In one embodiment, the array substrate includes a substrate and first and second OLED regions on the substrate, the pixel density of the second OLED region is less than the pixel density of the first OLED region, the first OLED region includes a first pixel opening, the second OLED region includes a second pixel opening, the first mask opening is used for manufacturing a first light emitting structure layer of a first OLED area, the second mask opening is used for manufacturing a second light emitting structure layer of a second OLED area, the first light emitting structure layer and the second light emitting structure layer are formed in the same process by adopting the sub-masks, wherein a distance d2 between the projected outer contour of the second mask opening on the substrate and the projected outer contour of the second pixel opening on the substrate is larger than a distance d1 between the projected outer contour of the first mask opening on the substrate and the projected outer contour of the first pixel opening on the substrate; the distance d2 between the outer contour of the projection of the second mask opening on the substrate and the outer contour of the projection of the second pixel opening on the substrate is 8-15 micrometers; preferably, the second mask openings and the first mask openings are arranged in the same rule; preferably, the first mask opening is square, and the second mask opening is circular, oval, dumbbell-shaped, gourd-shaped or square.
When the value range of d2 is 8-15 microns, the intensity of the first mask area and the intensity of the second mask area are close to equal, and the color mixing risk of the first OLED area and the second OLED area is eliminated.
In one embodiment, the second mask region includes at least two opening regions sequentially arranged from a central region to an outer region of the second mask region, and of the two adjacent opening regions, a size of a second mask opening of the opening region close to the central region is smaller than a size of a second mask opening of the opening region far from the central region; preferably, the second mask region comprises 3 opening regions; preferably, the size of the second mask opening in the opening region located in the central region of the second mask region is greater than or equal to the size of the first mask opening.
On the whole area of the sub-mask, the intensity of each area is gradually increased from outside to inside, and the difference of the intensity between two adjacent areas is very small, so that the stress distribution is relatively uniform on the boundary area of each area of the sub-mask, and correspondingly, the color mixing phenomenon is not easy to generate between each area of the array substrate corresponding to each area of the sub-mask.
In one embodiment, the sub-mask comprises a non-mask functional region, the second mask region is located between the non-mask functional region and the first mask region, and the non-mask functional region is provided with a plurality of through holes or a plurality of recesses; in one embodiment, the plurality of through holes are equal in size to each other or the plurality of recesses are equal in size to each other.
Through setting up through-hole or sunken, make whole sub-mask version stress at the mask strip and open the net in-process even, avoid factor mask version to produce the colour mixture risk that the fold caused array substrate.
In one embodiment, the sizes of the plurality of through holes or the sizes of the plurality of recesses are gradually reduced in a direction away from the second mask region.
In one embodiment, the through-hole or recess is circular, oval, dumbbell, gourd-shaped, or square.
In the direction of keeping away from the second mask district, the intensity in non-mask functional area strengthens gradually to further ensure that the intensity distribution in each region of whole sub-mask version tends to be even, make whole sub-mask version open the net in-process atress at the mask strip even, avoid factor mask version to produce the colour mixture risk that the fold caused array substrate.
In one embodiment, the second mask region includes a plurality of mask recesses, the mask recesses being located between adjacent second mask openings; preferably, the mask recess is equal in size to the second mask opening; preferably, the array substrate comprises a substrate, and a first OLED region and a second OLED region located on the substrate, the second OLED region of the array substrate comprises a plurality of pixel units, each pixel unit comprises n sub-pixels, the second mask region comprises a plurality of second mask sub-regions corresponding to the pixel units, and the number of mask recesses located between adjacent second mask openings of each second mask sub-region is n-1; preferably, the pitch between adjacent mask recesses and second mask openings is equal to the pitch between two adjacent first mask openings.
The mask is arranged between the two second mask openings and is sunken, so that the strength of the second mask area is close to or equal to that of the first mask area, the internal stress of the sub-mask is favorably relieved, the color mixing risk of the first OLED area and the second OLED area is reduced, and meanwhile, the influence on the position precision of the second mask opening due to the uneven stress of the factor mask is avoided.
The application also provides an array substrate, the array substrate includes the substrate and is located regional and the second OLED of first OLED on the substrate, regional pixel density of first OLED is greater than regional pixel density of second OLED, regional including first pixel opening of first OLED, the second OLED is regional including the second pixel opening, regional first electrode layer that includes of first OLED, first light emitting structure layer that forms on first electrode layer and the second electrode layer that forms on first light emitting structure layer, the regional third electrode layer that includes of second OLED, second light emitting structure layer that forms on the third electrode layer and the fourth electrode layer that forms on the second light emitting structure layer that adopts as before the mask strip forms in same technology.
The size of at least part of second mask openings of a second mask area for forming a second light-emitting structure layer is larger than the size of first mask openings of a first mask area for forming the second light-emitting structure layer, so that the strength of the second mask area is reduced, the strength of the second mask area is close to or equal to the strength of the first mask area, the stress of a junction area of the first mask area and the second mask area is uniform when a mask strip is in a net-opening state, therefore, wrinkles are not easily generated in the junction area, and the color mixing risk of a transparent display area and a normal display area is reduced or eliminated.
In one embodiment, the arrangement rule of the second pixel openings is the same as the arrangement rule of the first pixel openings; preferably, the size of the second pixel opening is the same as the size of the first pixel opening, or the size of the second pixel opening is larger than the size of the first pixel opening. Preferably, the second pixel opening has a square, circular, oval or dumbbell shape; preferably, when the size of the second pixel opening is larger than that of the first pixel opening, the second OLED region includes at least two display regions arranged from a central region to an outer region of the second OLED region, and of the two adjacent display regions, the size of the second pixel opening of the display region close to the central region is smaller than that of the second pixel opening of the display region far from the central region; preferably, the second OLED region includes 3 display regions; preferably, the size of the second pixel opening of the display region located in the central region of the second OLED region is greater than or equal to the size of the first pixel opening.
On the whole area of the sub-mask corresponding to the first OLED area and the second OLED area, the intensity of each area is gradually increased from outside to inside, and the difference value of the intensity between the two adjacent areas is small, so that the stress distribution is uniform on the boundary area of each area of the sub-mask, and correspondingly, the color mixing phenomenon is not easy to generate between each area of the array substrate corresponding to each area of the sub-mask.
In one embodiment, the first and third electrode layers are anodes, the second and fourth electrode layers are cathodes; preferably, the third electrode layer comprises a plurality of third electrodes, and the third electrodes are circular, square, oval, dumbbell-shaped, gourd-shaped or wavy; preferably, the fourth electrode layer is a surface electrode; preferably, the fourth electrode layer is a single-layer structure or a laminated structure, when the fourth electrode layer is a single-layer structure, the fourth electrode layer is a single-layer metal layer, a single-layer metal mixture layer, or a single-layer transparent metal oxide layer, when the fourth electrode layer is a laminated structure, the fourth electrode layer is a laminated layer of a transparent metal oxide layer and a metal layer, or the fourth electrode layer is a laminated layer of a transparent metal oxide layer and a metal mixture layer; preferably, when the material of the fourth electrode layer is doped with metal, the thickness of the fourth electrode layer is greater than or equal to 100 angstroms, and when the thickness of the fourth electrode layer is less than or equal to 500 angstroms, the thickness of the fourth electrode layer is entirely continuous, and the transparency of the fourth electrode layer is greater than 40%; preferably, when the material of the fourth electrode layer is doped with metal, the thickness of the fourth electrode layer is greater than or equal to 100 angstroms, and when the thickness of the fourth electrode layer is less than or equal to 200 angstroms, the thickness of the fourth electrode layer is entirely continuous, and the transparency of the fourth electrode layer is greater than 40%; preferably, when the material of the fourth electrode layer is doped with metal, the thickness of the fourth electrode layer is greater than or equal to 50 angstroms, and when the thickness of the fourth electrode layer is less than or equal to 200 angstroms, the thickness of the fourth electrode layer is entirely continuous, and the transparency of the fourth electrode layer is greater than 50%; preferably, when the material of the fourth electrode layer is doped with metal, the thickness of the fourth electrode layer is greater than or equal to 50 angstroms, and when the thickness of the fourth electrode layer is less than or equal to 200 angstroms, the thickness of the fourth electrode layer is entirely continuous, and the transparency of the fourth electrode layer is greater than 60%; preferably, when the fourth electrode layer is a single-layer structure, the single-layer metal layer is made of Al or Ag, the single-layer metal mixture layer is made of MgAg or a metal mixture material doped with Al, and the transparent metal oxide is ITO or IZO.
The application also provides a display screen, the display screen includes array substrate and cover in the packaging structure on array substrate surface.
The application also provides a display device, which comprises an equipment body and the display screen, wherein the equipment body is provided with a device area; the display screen covers the equipment body; the device area is located below the second OLED area, and a photosensitive device which penetrates through the second OLED area to collect light is arranged in the device area.
Drawings
FIG. 1 is a schematic top view of a sub-reticle of a conventional mask strip;
FIG. 2 is a schematic top view of one embodiment of a mask strip of the present application;
FIG. 3 is a schematic top view of one embodiment of a sub-reticle of the present application;
FIG. 4 is a schematic top view of one embodiment of a sub-reticle of the present application;
FIG. 5 is a schematic top view of one embodiment of a sub-reticle of the present application;
FIG. 6 is a schematic top view of one embodiment of a sub-reticle of the present application;
FIG. 7 is a schematic top view of one embodiment of a sub-reticle of the present application;
FIG. 8 is a schematic top view of one embodiment of a sub-reticle of the present application;
FIG. 9 is a schematic top view of one embodiment of a second mask region of a sub-mask according to the present application;
FIG. 10 is a schematic cross-sectional view of an embodiment of an array substrate of the present application;
FIG. 11 is a schematic top view of one embodiment of a first mask opening and a second mask opening of the present application;
FIG. 12 is a schematic top view of one embodiment of a first mask opening and a second mask opening of the present application;
FIG. 13 is a schematic top view of one embodiment of a third electrode layer of the present application;
FIG. 14 is a schematic top view of one embodiment of a first mask opening and a second mask opening of the present application;
FIG. 15 is a schematic top view of one embodiment of a first pixel opening and a first mask opening of the present application;
FIG. 16 is a schematic top view of one embodiment of a second pixel opening and a second mask opening of the present application;
FIG. 17 is a schematic front view of an embodiment of a display device of the present application.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus consistent with certain aspects of the present application, as detailed in the appended claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in the description and in the claims does not indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a" or "an" and the like do not denote a limitation of quantity, but rather denote the presence of at least one. "plurality" or "a number" means two or more. The word "comprising" or "comprises", and the like, means that the element or item listed as preceding "comprising" or "includes" covers the element or item listed as following "comprising" or "includes" and its equivalents, and does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. As used in this specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
As described in the background art, these electronic devices are not truly full-screen, and cannot display in each area of the entire screen, for example, the camera area cannot display the picture. In order to realize a full-screen, the display area corresponding to the photosensitive device is set to be a transparent display area with low pixel density, so that the photosensitive device can collect light through the transparent display area, and the normal display area outside the transparent display area keeps the original pixel density. Referring to fig. 1, the pixel density can be reduced by reducing the light emitting structure of the display area corresponding to the light sensing device, so as to obtain a transparent display area with low pixel density. Specifically, the density of the
In order to solve the technical problem, the present embodiment provides a mask strip for manufacturing a light emitting structure layer on an array substrate, the mask strip includes a plurality of sub-masks, each sub-mask includes a first mask region and a second mask region, the first mask region has a first mask opening, the second mask region has a second mask opening, the density of the second mask opening is smaller than that of the first mask opening, and the size of at least part of the second mask openings is larger than that of the first mask openings.
The density of the first mask opening of the first mask area is large, the density of the second mask opening of the second mask area is small, if the size of the first mask opening is equal to that of the second mask opening, the strength of the second mask area is large, at least part of the size of the second mask opening is larger than that of the first mask opening in the application, so that the strength of the second mask area is reduced, the strength of the second mask area is close to or equal to that of the first mask area, the stress of the first mask area of the sub-mask plate and the junction area of the second mask area of the mask strip is uniform when the mask strip is stretched, therefore, the junction area is not easy to generate wrinkles, and the color mixing risk of the junction area of the transparent display area and the normal display area is reduced or eliminated.
The embodiment of the application provides a mask strip for manufacturing a light emitting structure layer of an array substrate. The array substrate comprises a substrate, and a first OLED area and a second OLED area which are positioned on the substrate, wherein the first OLED area A is a non-transparent display area (or a normal display area), and the second OLED area is a transparent display area. Referring to fig. 2, the mask strip includes a plurality of
Referring to fig. 3, the sub-masks 10 include a first mask region 1a, a
Referring to fig. 3, in the embodiment, the first mask region 1a includes a plurality of
In some embodiments, the second mask openings and the first mask openings are arranged in the same manner, such as the
It should be noted that the relationship between the size of the second mask opening 21a and the size of the
Referring to fig. 4, in another embodiment, the
Referring to fig. 5, a structure of the first mask region 1c is the same as that of the first mask region 1a of the foregoing embodiment, and the second mask region 2c includes at least two opening regions sequentially arranged from a central region to an outer region of the second mask region 2c, and a size of a second mask opening of the opening region close to the central region is smaller than a size of a second mask opening of the opening region far from the central region in two adjacent opening regions. The open area remote from the central area at least partially surrounds the open area close to the central area.
As shown in fig. 5, the second mask region 2c includes adjacent first and second opening regions 201c and 202c, and the size of the second mask opening 211c of the first opening region 201c near the central region is smaller than the size of the second mask opening 212c of the second opening region 202c far from the central region. In one embodiment, the second mask region 2c further includes a third opening region 203c, the third opening region 203c is farther from the central region than the second opening region 202c, and the size of the second mask opening 212c of the second opening region 202c is smaller than the size of the third mask opening 213c of the third opening region 203 c. The first mask region 11c surrounds a third opened region 203c, the third opened region 203c surrounds a second opened region 202c, and the second opened region 202c surrounds a first opened region 201 c.
With reference to fig. 5, the second mask opening 211c of the first opening region 201c located in the central region of the second mask region 2c is equal to the size of the first mask opening 11 c. In other embodiments, the size of the second mask opening of the opening region located in the central region of the second mask region is larger than the size of the first mask opening.
In the direction from the outside to the inside of the second mask region (as shown by the arrow in fig. 5), the sizes of the second mask openings 213c, 212c, and 211c are sequentially decreased, and thus the intensities of the third opening region 203c, the second opening region 202c, and the first opening region 201c are sequentially decreased. The intensity of the first mask region 1c is approximately equal to the intensity of the third opening region 203c, the intensity of the third opening region 203c is slightly less than the intensity of the second opening region 202c, the intensity of the second opening region 202c is slightly less than the intensity of the first opening region 201c, in other words, the intensity of each region is gradually increased from outside to inside in the whole region of the sub-mask, and the difference of the intensity between two adjacent regions is small, so that the stress distribution is uniform on the boundary region of each region of the sub-mask, and the color mixing phenomenon is not easily generated between the regions of the array substrate corresponding to each region of the sub-mask.
The structure of the sub-mask shown in fig. 6 is substantially the same as that of the sub-mask shown in fig. 5, the mask opening and the second mask region of the sub-mask shown in fig. 5 are both circular, the
Referring to fig. 7, in the present embodiment, the sub-mask includes a first mask region 1e, a
In the sub-mask shown in fig. 8, the structures of the
In other embodiments, the through-holes shown in fig. 7 or 8 may be replaced by recesses, which may be understood to retain a portion of the material within the through-holes, similar in structure to blind holes. In some embodiments, a recess may be used instead of a portion of the through-hole. Through setting up sunken, make whole sub-mask version stress at the mask strip and open the net in-process even, avoid factor mask version to produce the colour mixture risk that the fold caused array substrate.
In one embodiment, the through hole or the recess is circular, oval, dumbbell, gourd-shaped or square, and it should be noted that the shape of the through hole or the recess may be the same as or different from the shape of the second mask opening. When the shape of the through hole or the recess is the same as that of the second mask opening, the stress distribution of the sub-masks is more uniform.
Referring to fig. 9, the
In one embodiment, the second OLED region B (in conjunction with fig. 10) of the array substrate includes a plurality of pixel units, each pixel unit includes n sub-pixels, the
In one embodiment, the distance between
Referring to fig. 10, the present application further provides an array substrate, where the array substrate includes a
The
The
In one embodiment, in order to improve the light transmittance of the transparent OLED substrate, the material of each conductive trace (e.g., the
In one embodiment, the
In one embodiment, when the material of the fourth electrode layer 8 is doped with metal, the thickness of the fourth electrode layer 8 is greater than or equal to 100 angstroms, and when the thickness of the fourth electrode layer 8 is less than or equal to 500 angstroms, the thickness of the fourth electrode layer 8 is entirely continuous, and the transparency of the fourth electrode layer 8 is greater than 40%; when the fourth electrode layer 8 is doped with metal, the thickness of the fourth electrode layer 8 is greater than or equal to 100 angstroms, and when the thickness of the fourth electrode layer 8 is less than or equal to 200 angstroms, the thickness of the fourth electrode layer 8 is entirely continuous, and the transparency of the fourth electrode layer 8 is greater than 40%; when the fourth electrode layer 8 is doped with metal, the thickness of the fourth electrode layer 8 is greater than or equal to 50 angstroms, and when the thickness of the fourth electrode layer 8 is less than or equal to 200 angstroms, the thickness of the fourth electrode layer 8 is entirely continuous, and the transparency of the fourth electrode layer 8 is greater than 50%; when the fourth electrode layer 8 is doped with metal, the thickness of the fourth electrode layer 8 is greater than or equal to 50 angstroms, and when the thickness of the fourth electrode layer 8 is less than or equal to 200 angstroms, the thickness of the fourth electrode layer 8 is entirely continuous, and the transparency of the fourth electrode layer 8 is greater than 60%; when the fourth electrode layer 8 is a single-layer structure, the single-layer metal layer is made of Al or Ag, the single-layer metal mixture layer is made of MgAg or a metal mixture material doped with Al, and the transparent metal oxide is ITO or IZO.
Referring to fig. 11, the first OLED region a includes a
With continuing reference to fig. 10 and fig. 11, the size of the second pixel opening 602 is the same as the size of the
In another embodiment, referring to fig. 12, the size of the
The
Referring to fig. 14, when the size of the second pixel opening is greater than that of the first pixel opening, the second OLED region B2 includes at least two display regions sequentially arranged from the central region to the outer region of the second OLED region B2, and of the two adjacent display regions, the size of the second pixel opening of the display region close to the central region is smaller than that of the display region far from the central region. In this embodiment, the second OLED region B2 includes a first display region B21, a second display region B22, and a third display region B23 arranged in this order from the center region to the outer region of the second OLED region B2, the size of the second pixel opening 6021B of the first display region B21 is smaller than the size of the second pixel opening 6022B of the second display region B22, and the size of the second pixel opening 6022B of the second display region B22 is smaller than the size of the second pixel opening 6023B of the third display region B23. In other embodiments, only the first display region and the second display region may be provided, or more display regions may be provided.
In this embodiment, the size of the second pixel opening 6021b of the first display region is larger than that of the first pixel opening 601 b. In other embodiments, the size of the second pixel opening of the display region located in the central region of the second OLED region B may also be equal to the size of the first pixel opening.
Referring to fig. 4, 15 and 16, a distance d2 between the outer contour of the projection of the second mask opening 21b on the
The application also provides a display screen, the display screen includes the array substrate and cover in packaging structure (not shown) on the array substrate surface. Photosensitive devices such as cameras and sensors can be arranged below the second OLED area B, the photosensitive devices can collect external light through the transparent second OLED area B, and the performance of the photosensitive devices is guaranteed while the display function is achieved.
Please refer to fig. 17, the present application further provides a display device, which includes an apparatus main body C and a display screen covering the apparatus main body. The display device can be a mobile phone, a tablet personal computer, a notebook computer and other equipment, and takes the mobile phone as an example, the equipment main body can comprise a shell, a circuit board, a battery, a processor and other elements, the equipment main body C is provided with a device area, the device area is positioned below the second OLED area B, and a photosensitive device D which conducts light collection through the second OLED area B is arranged in the device area.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.
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