Demodulation reference signal configuration
阅读说明:本技术 解调参考信号配置 (Demodulation reference signal configuration ) 是由 刘红梅 朱晨曦 孙振年 汪海明 于 2017-06-26 设计创作,主要内容包括:公开用于解调参考信号配置的装置、方法和系统。一种装置(200)包括接收器(212),该接收器(212)被配置成接收(502)用于物理下行链路共享信道的解调参考信号配置。该装置(200)还包括接收器(212),该接收器(212)被配置成基于解调参考信号配置来接收(504)解调参考信号。(Apparatus, methods, and systems for demodulation reference signal configuration are disclosed. An apparatus (200) includes a receiver (212), the receiver (212) configured to receive (502) a demodulation reference signal configuration for a physical downlink shared channel. The apparatus (200) also includes a receiver (212), the receiver (212) configured to receive (504) the demodulation reference signal based on the demodulation reference signal configuration.)
1. An apparatus, comprising:
a receiver, the receiver:
receiving a demodulation reference signal configuration for a physical downlink shared channel; and
receiving a demodulation reference signal based on the demodulation reference signal configuration.
2. The apparatus of claim 1, wherein the demodulation reference signal configuration comprises separate configurations for the physical downlink shared channel and physical downlink control channel.
3. The apparatus of claim 1, wherein the demodulation reference signal configuration is shared between the physical downlink shared channel and a physical downlink control channel.
4. The apparatus of claim 1, wherein the demodulation reference signal configuration comprises a frequency domain configuration, a time domain configuration, a demodulation reference signal port mapping order, or some combination thereof.
5. The apparatus of claim 4, wherein the frequency domain configuration comprises a periodicity, an offset, or some combination thereof.
6. The apparatus of claim 5, wherein the periodicity, the offset, or some combination thereof corresponds to a physical resource block.
7. The apparatus of claim 5, wherein the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling.
8. The apparatus of claim 4, wherein the time domain configuration comprises a subframe level configuration, a symbol level configuration, or some combination thereof.
9. The apparatus of claim 8, in which the subframe level configuration comprises a periodicity, an offset, or some combination thereof.
10. The apparatus of claim 9, wherein the periodicity indicates whether demodulation reference signals are present in a single subframe.
11. The apparatus of claim 9, wherein the periodicity, the offset, or some combination thereof indicates demodulation reference signal bearing subframes for consecutive scheduling subframes.
12. The apparatus of claim 9, wherein the periodicity, the offset, or some combination thereof indicates a demodulation reference signal bearing subframe for a non-contiguous scheduling subframe.
13. The apparatus of claim 12, wherein the demodulation reference signal bearing subframes for non-consecutive scheduled subframes are based on counted blank subframes.
14. The apparatus of claim 12, wherein demodulation reference signal bearing subframes for non-consecutively scheduled subframes are based on blank subframes that are not counted.
15. The apparatus of claim 9, wherein the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling.
16. The apparatus of claim 8, wherein the symbol level configuration comprises one or more symbols in a subframe or slot.
17. The apparatus of claim 16, wherein the symbol level configuration is indicated by downlink control information signaling, radio resource control signaling, or some combination thereof.
18. The apparatus of claim 4, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, a third mapping comprising time division orthogonal cover codes, and wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order.
19. The apparatus of claim 4, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division multiplexing.
20. The apparatus of claim 4, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising a cyclic shift, a second mapping comprising a comb, and a third mapping comprising a time-division orthogonal cover code.
21. The apparatus of claim 4, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising cyclic shifts, a second mapping comprising combs, and a third mapping comprising time division multiplexing.
22. The apparatus of claim 3, wherein the demodulation reference signal shared between the physical downlink shared channel and the physical downlink control channel is indicated by radio resource control signaling, downlink control signaling, or some combination thereof.
23. The apparatus of claim 1, wherein the demodulation reference signal configuration is in terms of bandwidth parts.
24. A method, comprising:
receiving a demodulation reference signal configuration for a physical downlink shared channel; and
receiving a demodulation reference signal based on the demodulation reference signal configuration.
25. The method of claim 24, wherein the demodulation reference signal configuration comprises a separate configuration for the physical downlink shared channel and the separate configuration is different from a configuration of a physical downlink control channel.
26. The method of claim 24, wherein the demodulation reference signal configuration is shared between the physical downlink shared channel and a physical downlink control channel.
27. The method of claim 24, wherein the demodulation reference signal configuration comprises a frequency domain configuration, a time domain configuration, a demodulation reference signal port mapping order, or some combination thereof.
28. The method of claim 27, wherein the frequency domain configuration comprises periodicity, offset, or some combination thereof.
29. The method of claim 28, wherein the periodicity, the offset, or some combination thereof corresponds to a physical resource block.
30. The method of claim 28, wherein the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling.
31. The method of claim 27, wherein the time domain configuration comprises a subframe level configuration, a symbol level configuration, or some combination thereof.
32. The method of claim 31, wherein the subframe level configuration comprises a periodicity, an offset, or some combination thereof.
33. The method of claim 32, wherein the periodicity indicates whether demodulation reference signals are present in a single subframe.
34. The method of claim 32, wherein the periodicity, the offset, or some combination thereof indicates demodulation reference signal bearing subframes for consecutive scheduling subframes.
35. The method of claim 32, wherein the periodicity, the offset, or some combination thereof indicates demodulation reference signal bearing subframes for non-continuously scheduled subframes.
36. The method of claim 35, wherein the demodulation reference signal bearing subframes for non-consecutive scheduled subframes are based on counted blank subframes.
37. The method of claim 35, wherein demodulation reference signal bearing subframes for non-consecutively scheduled subframes are based on uncounted blank subframes.
38. The method of claim 32, wherein the periodicity, offset, or some combination thereof is indicated by radio resource control signaling.
39. The method of claim 31, wherein the symbol level configuration comprises one or more symbols in a subframe or slot.
40. The method of claim 39, wherein the symbol level configuration is indicated by downlink control information signaling, radio resource control signaling, or some combination thereof.
41. The method of claim 27, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division orthogonal cover codes.
42. The method of claim 27, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division multiplexing.
43. The method of claim 27, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising a cyclic shift, a second mapping comprising a comb, and a third mapping comprising a time-division orthogonal cover code.
44. The method of claim 27, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising cyclic shifts, a second mapping comprising combs, and a third mapping comprising time division multiplexing.
45. The method of claim 26, wherein the demodulation reference signal shared between the physical downlink shared channel and the physical downlink control channel is indicated by radio resource control signaling, downlink control signaling, or some combination thereof.
46. The method of claim 24, wherein the demodulation reference signal configuration is in terms of bandwidth parts.
47. An apparatus, comprising:
a transmitter, the transmitter:
transmitting a demodulation reference signal configuration for a physical downlink shared channel; and
transmitting a demodulation reference signal based on the demodulation reference signal configuration.
48. The apparatus of claim 47, wherein the demodulation reference signal configuration comprises a separate configuration for the physical downlink shared channel and the separate configuration is different from a configuration of a physical downlink control channel.
49. The apparatus of claim 47, wherein the demodulation reference signal configuration is shared between the physical downlink shared channel and a physical downlink control channel.
50. The apparatus of claim 47, wherein the demodulation reference signal configuration comprises a frequency domain configuration, a time domain configuration, a demodulation reference signal port mapping order, or some combination thereof.
51. The apparatus of claim 50, wherein the frequency domain configuration comprises a periodicity, an offset, or some combination thereof.
52. The apparatus of claim 51, wherein the periodicity, the offset, or some combination thereof corresponds to a physical resource block.
53. The apparatus of claim 51, wherein the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling.
54. The apparatus of claim 50, wherein the time domain configuration comprises a subframe level configuration, a symbol level configuration, or some combination thereof.
55. The apparatus of claim 54, wherein the subframe level configuration comprises a periodicity, an offset, or some combination thereof.
56. The apparatus of claim 55, wherein the periodicity indicates whether demodulation reference signals are present in a single subframe.
57. The apparatus of claim 55, wherein the periodicity, the offset, or some combination thereof indicates demodulation reference signal bearing subframes for consecutive scheduling subframes.
58. The apparatus of claim 55, wherein the periodicity, the offset, or some combination thereof indicates a demodulation reference signal (DM-RS) carrying subframe for a non-contiguous scheduling subframe.
59. The apparatus of claim 58, wherein the demodulation reference signal bearing subframes for non-consecutive scheduled subframes are based on counted blank subframes.
60. The apparatus of claim 58, wherein demodulation reference signal bearing subframes for non-consecutively scheduled subframes are based on blank subframes that are not counted.
61. The apparatus of claim 55, wherein the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling.
62. The apparatus of claim 54, wherein the symbol level configuration comprises one or more symbols in a subframe or slot.
63. The apparatus of claim 62, wherein the symbol level configuration is indicated by downlink control information signaling, radio resource control signaling, or some combination thereof.
64. The apparatus of claim 50, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division orthogonal cover codes.
65. The apparatus of claim 50, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division multiplexing.
66. The apparatus of claim 50, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising a cyclic shift, a second mapping comprising a comb, and a third mapping comprising a time-division orthogonal cover code.
67. The apparatus of claim 50, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising cyclic shifts, a second mapping comprising combs, and a third mapping comprising time division multiplexing.
68. The apparatus of claim 49, wherein the demodulation reference signal shared between the physical downlink shared channel and the physical downlink control channel is indicated by radio resource control signaling, downlink control signaling, or some combination thereof.
69. The apparatus of claim 47, wherein the demodulation reference signal configuration is in terms of bandwidth parts.
70. A method, comprising:
transmitting a demodulation reference signal configuration for a physical downlink shared channel; and
transmitting a demodulation reference signal based on the demodulation reference signal configuration.
71. The method of claim 70, wherein the demodulation reference signal configuration comprises a separate configuration for the physical downlink shared channel and the separate configuration is different from a configuration of a physical downlink control channel.
72. The method of claim 70, wherein the demodulation reference signal configuration is shared between the physical downlink shared channel and a physical downlink control channel.
73. The method of claim 70, wherein the demodulation reference signal configuration comprises a frequency domain configuration, a time domain configuration, a demodulation reference signal port mapping order, or some combination thereof.
74. The method of claim 73, wherein the frequency domain configuration comprises periodicity, offset, or some combination thereof.
75. The method of claim 74, wherein the periodicity, the offset, or some combination thereof corresponds to physical resource blocks.
76. The method of claim 74, wherein the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling.
77. The method of claim 73, wherein the time domain configuration comprises a subframe level configuration, a symbol level configuration, or some combination thereof.
78. The method of claim 77, wherein the subframe level configuration comprises a periodicity, an offset, or some combination thereof.
79. The method of claim 78, wherein the periodicity indicates whether demodulation reference signals are present in a single subframe.
80. The method of claim 78, wherein the periodicity, the offset, or some combination thereof indicates demodulation reference signal (DM-RS) bearing subframes for consecutive scheduling subframes.
81. The method of claim 78, wherein the periodicity, the offset, or some combination thereof indicates demodulation reference signal (DM-RS) bearing subframes for non-consecutively scheduled subframes.
82. The method of claim 81, wherein the demodulation reference signal bearing subframes for non-consecutive scheduling subframes are based on counted blank subframes.
83. The method of claim 81, wherein demodulation reference signal bearing subframes for non-consecutive scheduled subframes are based on blank subframes that are not counted.
84. The method of claim 78, wherein the periodicity, offset, or some combination thereof is indicated by radio resource control signaling.
85. The method of claim 77, wherein the symbol level configuration comprises one or more symbols in a subframe or slot.
86. The method of claim 85, wherein the symbol level configuration is indicated by downlink control information signaling, radio resource control signaling, or some combination thereof.
87. The method of claim 73, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division orthogonal cover codes.
88. The method of claim 73, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division multiplexing.
89. The method of claim 73, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising a cyclic shift, a second mapping comprising a comb, and a third mapping comprising a time-division orthogonal cover code.
90. The method of claim 73, wherein the demodulation reference signal port mapping order comprises: a first mapping comprising cyclic shifts, a second mapping comprising combs, and a third mapping comprising time division multiplexing.
91. The method of claim 72, wherein the demodulation reference signal shared between the physical downlink shared channel and the physical downlink control channel is indicated by radio resource control signaling, downlink control signaling, or some combination thereof.
92. The method of claim 70, wherein the demodulation reference signal configuration is in terms of bandwidth parts.
Technical Field
The subject matter disclosed herein relates generally to wireless communications, and more particularly to demodulation reference signal configuration.
Background
The following abbreviations are defined herein, at least some of which are referred to in the following description: third generation partnership project ("3 GPP"), acknowledgement ("ACK"), binary phase shift keying ("BPSK"), clear channel assessment ("CCA"), cyclic prefix ("CP"), cyclic redundancy check ("CRC"), channel state information ("CSI"), common search space ("CSS"), discrete fourier transform extension ("DFTS"), downlink control information ("DCI"), downlink ("DL"), downlink pilot time slot ("DwPTS"), enhanced clear channel assessment ("eCCA"), enhanced mobile broadband ("eMBB"), evolved node B ("eNB"), european telecommunications standards institute ("ETSI"), frame-based device ("FBE"), frequency division duplex ("FDD"), frequency division multiple access ("FDMA"), frequency division orthogonal cover code ("FD-OCC"), guard period ("GP"), "BPSK, Hybrid automatic repeat request ("HARQ"), internet of things ("IoT"), grant-assisted access ("LAA"), load-based device ("LBE"), listen-before-talk ("LBT"), long term evolution ("LTE"), multiple access ("MA"), modulation and coding scheme ("MCS"), machine type communication ("MTC"), multiple-input multiple-output ("MIMO"), multi-user shared access ("MUSA"), narrowband ("NB"), negative acknowledgement ("NACK") or ("NAK"), next generation node B ("gbb"), non-orthogonal multiple access ("NOMA"), orthogonal frequency division multiplexing ("OFDM"), primary cell ("PCell"), physical broadcast channel ("PBCH"), physical downlink control channel ("PDCCH"), physical downlink shared channel ("PDSCH"), pattern division multiple access ("PDMA"), physical hybrid ARQ indicator channel ("PHICH"), "PHICH Physical random access channel ("PRACH"), physical resource block ("PRB"), physical uplink control channel ("PUCCH"), physical uplink shared channel ("PUSCH"), quality of service ("QoS"), quadrature phase shift keying ("QPSK"), radio resource control ("RRC"), random access procedure ("RACH"), random access response ("RAR"), radio network temporary identifier ("RNTI"), reference signal ("RS"), remaining minimum system information ("RMSI"), resource extended multiple access ("RSMA"), round trip time ("RTT"), receive ("RX"), sparse code multiple access ("SCMA"), scheduling request ("SR"), single carrier frequency division multiple access ("SC-FDMA"), secondary cell ("SCell"), shared channel ("SCH"), signal-to-interference-plus-noise ratio ("SINR"), (s, c, system information blocks ("SIBs"), synchronization signals ("SSs"), transport blocks ("TBs"), transport block sizes ("TBs"), time division duplexing ("TDD"), time division multiplexing ("TDM"), time division orthogonal cover codes ("TD-OCC"), transmission time intervals ("TTI"), transmission ("TX"), uplink control information ("UCI"), user entity/device (mobile terminal) ("UE"), uplink ("UL"), universal mobile telecommunications system ("UMTS"), uplink pilot time slots ("UpPTS"), ultra-reliable and low-delay communications ("URLLC"), and worldwide interoperability for microwave access ("WiMAX"). As used herein, "HARQ-ACK" may collectively refer to positive acknowledgement ("ACK") and negative acknowledgement ("NAK"). ACK means that the TB is correctly received, and NACK (or NAK) means that the TB is incorrectly received.
In some wireless communication networks, PDSCH demodulation reference signals ("DMRS") may be used. In such a network, a variety of different PDSCH DMRS configurations are possible.
Disclosure of Invention
An apparatus for demodulation reference signal configuration is disclosed. The method and system also perform the functions of the apparatus. In one embodiment, the apparatus includes a receiver that: receiving a demodulation reference signal configuration for a physical downlink shared channel; and receiving a demodulation reference signal based on the demodulation reference signal configuration.
In one embodiment, the demodulation reference signal configuration includes a separate configuration for a physical downlink shared channel, and the separate configuration is different from a configuration of a physical downlink control channel. In yet another embodiment, the demodulation reference signal configuration is shared between a physical downlink shared channel and a physical downlink control channel. In some embodiments, the demodulation reference signal configuration comprises a frequency domain configuration, a time domain configuration, a demodulation reference signal port mapping order, or some combination thereof. In various embodiments, the frequency domain configuration includes periodicity, offset, or some combination thereof. In some embodiments, the periodicity, the offset, or some combination thereof corresponds to physical resource blocks. In one embodiment, the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling. In yet another embodiment, the time domain configuration includes a subframe level configuration (subframe level configuration), a symbol level configuration (symbol level configuration), or some combination thereof. In some embodiments, the subframe level configuration includes periodicity, offset, or some combination thereof.
In various embodiments, the periodicity indicates whether or not a demodulation reference signal is present in a single subframe. In some embodiments, the periodicity, the offset, or some combination thereof indicates demodulation reference signal bearing subframes for consecutive scheduling subframes. In one embodiment, the periodicity, the offset, or some combination thereof indicates demodulation reference signal bearing subframes used for non-continuously scheduled subframes. In yet another embodiment, the demodulation reference signal carrying subframes for the non-consecutive scheduled subframes are based on the counted blank subframes. In certain embodiments, the demodulation reference signal carrying subframes for the non-consecutive scheduled subframes are based on the blank subframes not counted. In various embodiments, the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling. In some embodiments, the symbol level configuration comprises one or more symbols in a subframe or slot. In one embodiment, the symbol level configuration is indicated by downlink control information signaling, radio resource control signaling, or some combination thereof.
In some embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division orthogonal cover codes, and wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In various embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division multiplexing, and wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In some embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising cyclic shifts, a second mapping comprising combs (comb), and a third mapping comprising time-division orthogonal cover codes, wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In one embodiment, the demodulation reference signal port mapping order comprises: a first mapping comprising cyclic shifts, a second mapping comprising combs, and a third mapping comprising time division multiplexing, and wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order.
In certain embodiments, the demodulation reference signal shared between the physical downlink shared channel and the physical downlink control channel is indicated by radio resource control signaling, downlink control signaling, or some combination thereof. In some embodiments, the demodulation reference signal configuration is in terms of bandwidth portions.
In one embodiment, a method for demodulation reference signal configuration includes: a demodulation reference signal configuration for a physical downlink shared channel is received. In some embodiments, the method includes receiving a demodulation reference signal based on a demodulation reference signal configuration.
In one embodiment, an apparatus for demodulation reference signal configuration, comprises: a transmitter that transmits a demodulation reference signal configuration for a physical downlink shared channel; and transmitting the demodulation reference signal based on the demodulation reference signal configuration.
In one embodiment, the demodulation reference signal configuration comprises separate configurations for a physical downlink shared channel and a physical downlink control channel. In another embodiment, the demodulation reference signal configuration is shared between a physical downlink shared channel and a physical downlink control channel. In some embodiments, the demodulation reference signal configuration comprises a frequency domain configuration, a time domain configuration, a demodulation reference signal port mapping order, or some combination thereof. In various embodiments, the frequency domain configuration includes periodicity, offset, or some combination thereof. In some embodiments, the periodicity, the offset, or some combination thereof corresponds to physical resource blocks. In one embodiment, the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling. In yet another embodiment, the time domain configuration comprises a subframe level configuration, a symbol level configuration, or some combination thereof. In some embodiments, the subframe level configuration includes periodicity, offset, or some combination thereof.
In various embodiments, the periodicity indicates whether or not a demodulation reference signal is present in a single subframe. In some embodiments, the periodicity, the offset, or some combination thereof indicates demodulation reference signal bearing subframes for consecutive scheduling subframes. In one embodiment, the periodicity, the offset, or some combination thereof indicates demodulation reference signal bearing subframes used for non-continuously scheduled subframes. In yet another embodiment, the demodulation reference signal carrying subframes for the non-consecutive scheduled subframes are based on the counted blank subframes. In certain embodiments, the demodulation reference signal carrying subframes for the non-consecutive scheduled subframes are based on the blank subframes not counted. In various embodiments, the periodicity, the offset, or some combination thereof is indicated by radio resource control signaling. In some embodiments, the symbol level configuration comprises one or more symbols in a subframe or slot. In one embodiment, the symbol level configuration is indicated by downlink control information signaling, radio resource control signaling, or some combination thereof.
In some embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division orthogonal cover codes, wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In various embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division multiplexing, and wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In some embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising a cyclic shift, a second mapping comprising a comb, and a third mapping comprising a time-division orthogonal cover code, wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In one embodiment, the demodulation reference signal port mapping order comprises: a first mapping comprising cyclic shifts, a second mapping comprising combs, and a third mapping comprising time division multiplexing, wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order.
In certain embodiments, the demodulation reference signal shared between the physical downlink shared channel and the physical downlink control channel is indicated by radio resource control signaling, downlink control signaling, or some combination thereof. In some embodiments, the demodulation reference signal configuration is in terms of bandwidth portions.
In one embodiment, a method for demodulation reference signal configuration includes: transmitting a demodulation reference signal configuration for a physical downlink shared channel. In some embodiments, the method includes transmitting the demodulation reference signal based on the demodulation reference signal configuration.
Drawings
A more particular description of the embodiments briefly described above will be rendered by reference to specific embodiments that are illustrated in the appended drawings. Understanding that these drawings depict only some embodiments and are not therefore to be considered to be limiting of its scope, the embodiments will be described and explained with additional specificity and detail through the use of the accompanying drawings in which:
fig. 1 is a schematic block diagram illustrating one embodiment of a wireless communication system for demodulation reference signal configuration;
FIG. 2 is a schematic block diagram illustrating one embodiment of an apparatus that may be used for demodulation reference signal configuration;
FIG. 3 is a schematic block diagram illustrating one embodiment of an apparatus that may be used for demodulation reference signal configuration;
FIG. 4 is a schematic block diagram illustrating one embodiment of a PRB;
FIG. 5 is a schematic flow chart diagram illustrating one embodiment of a method for demodulation reference signal configuration, an
Fig. 6 is a schematic flow chart diagram illustrating another embodiment of a method for demodulation reference signal configuration.
Detailed Description
As will be appreciated by one skilled in the art, aspects of the embodiments may be embodied as a system, apparatus, method or program product. Accordingly, embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a "circuit," module "or" system. Furthermore, embodiments may take the form of a program product embodied in one or more computer-readable storage devices that store machine-readable code, computer-readable code, and/or program code, referred to hereinafter as code. The storage device may be tangible, non-transitory, and/or non-transmissive. The storage device may not embody the signal. In a certain embodiment, the storage device only employs signals for the access codes.
Some of the functional units described in this specification may be labeled as modules, in order to more particularly emphasize their implementation independence. For example, a module may be implemented as a hardware circuit comprising custom very large scale integration ("VLSI") circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like.
Modules may also be implemented in code and/or software for execution by various types of processors. An identified module of code may, for instance, comprise one or more physical or logical blocks of executable code which may, for instance, be organized as an object, procedure, or function. Nevertheless, the executables of an identified module need not be physically located together, but may comprise disparate instructions stored in different locations which, when joined logically together, comprise the module and achieve the stated purpose for the module.
Indeed, a module of code may be a single instruction, or many instructions, and may even be distributed over several different code segments, among different programs, and across several memory devices. Similarly, operational data may be identified and illustrated herein within modules, and may be embodied in any suitable form and organized within any suitable type of data structure. The operational data may be collected as a single data set, or may be distributed over different locations including over different computer-readable storage devices. Where a module or portions of a module are implemented in software, the software portions are stored on one or more computer-readable storage devices.
Any combination of one or more computer-readable media may be utilized. The computer readable medium may be a computer readable storage medium. The computer readable storage medium may be a storage device storing the code. A storage device may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, holographic, micromechanical, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing.
More specific examples (a non-exhaustive list) of the storage device would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory ("RAM"), a read-only memory ("ROM"), an erasable programmable read-only memory ("EPROM" or flash memory), a portable compact disc read-only memory ("CD-ROM"), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
The code for performing the operations of an embodiment may be any number of lines and may be written in any combination including one or more of an object oriented programming language such as Python, Ruby, Java, Smalltalk, C + +, etc., and conventional procedural programming languages, such as the "C" programming language, and/or a machine language, such as assembly language. The code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer, partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network ("LAN") or a wide area network ("WAN"), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
Reference in the specification to "one embodiment," "an embodiment," or similar language means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, appearances of the phrases "in one embodiment," "in an embodiment," and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise. The enumerated listing of items does not imply that any or all of the items are mutually exclusive, unless expressly specified otherwise. The terms "a", "an" and "the" also mean "one or more", unless expressly specified otherwise.
Furthermore, the described features, structures, or characteristics of the embodiments may be combined in any suitable manner. In the following description, numerous specific details are provided, such as examples of programming, software modules, user selections, network transactions, database queries, database structures, hardware modules, hardware circuits, hardware chips, etc., to provide a thorough understanding of embodiments. One skilled in the relevant art will recognize, however, that an embodiment may be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the embodiments.
Aspects of the embodiments are described below with reference to schematic flow charts and/or schematic block diagrams of methods, apparatuses, systems, and program products according to the embodiments. It will be understood that each block of the schematic flow chart diagrams and/or schematic block diagrams, and combinations of blocks in the schematic flow chart diagrams and/or schematic block diagrams, can be implemented by code. The code can be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the schematic flowchart and/or schematic block diagram block or blocks.
The code may also be stored in a memory device that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the memory device produce an article of manufacture including instructions which implement the function/act specified in the schematic flowchart and/or schematic block diagram block or blocks.
The code may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the code which executes on the computer or other programmable apparatus provides processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
The schematic flow charts and/or schematic block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, systems, methods and program products according to various embodiments. In this regard, each block in the schematic flow chart diagrams and/or schematic block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s).
It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. Other steps and methods may be conceived that are equivalent in function, logic, or effect to one or more blocks, or portions thereof, of the illustrated figure.
Although various arrow types and line types may be employed in the flow chart diagrams and/or block diagram blocks, they are understood not to limit the scope of the corresponding embodiments. Indeed, some arrows or other connectors may be used to indicate only the logical flow of the depicted embodiment. For instance, an arrow may indicate a waiting or monitoring period of unspecified duration between enumerated steps of the depicted embodiment. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and code.
The description of the elements in each figure may refer to elements of the previous figures. Like numbers refer to like elements throughout, including alternative embodiments of the same elements.
Fig. 1 depicts an embodiment of a wireless communication system 100 for demodulation reference signal configuration. In one embodiment, wireless communication system 100 includes a
In one embodiment,
The
In one embodiment, wireless communication system 100 conforms to 3GPP protocols in which
In one embodiment, the
In some embodiments, the
Fig. 2 depicts one embodiment of an
In one embodiment,
In one embodiment,
In one embodiment, input device 206 may comprise any known computer input device, including a touchpad, buttons, keyboard, stylus, microphone, and the like. In some embodiments, the input device 206 may be integrated with the
In one embodiment, the
In certain embodiments, the
The
Fig. 3 depicts one embodiment of an
In some embodiments, the
Various PDSCH DMRS embodiments may have a front-loaded DMRS. In the first front load PDSCH DMRS embodiment, up to 8 ports may be supported. Such embodiments may have an interleaved frequency division multiplexing ("IFDM") based pattern with combs 2 and/or combs 4 with cyclic shifts ("CS"). In some embodiments, the first preamble PDSCH DMRS configuration may have one OFDM symbol. In various configurations, one OFDM symbol may be a comb 2 plus 2 CSs for up to 4 ports. In other embodiments, one OFDM symbol may be comb 4 for up to 8 ports plus 2 CSs. In various embodiments, the first preamble PDSCH DMRS configuration may have two OFDM symbols. In some configurations, the two OFDM symbols may be selected from: TD-OCC for combs 2 plus 2 CS plus ({ 11 } and {1-1}) for up to 8 ports; comb 2 plus 4 CS plus TD-OCC for up to 8 ports ({ 11 }); and combs 4 plus 2 CS plus TD-OCC ({ 11 }) for up to 8 ports. As used herein, "symbol" may refer to an OFDM symbol and "symbol level" may refer to an OFDM symbol level.
In the second front load PDSCH DMRS embodiment, up to 12 ports may be supported. Such an embodiment may have an FD-OCC based pattern with adjacent REs in the frequency domain. In some embodiments, the second preamble PDSCH DMRS configuration may have one OFDM symbol. One OFDM symbol may be selected in various configurations from: 2 FD-OCCs spanning adjacent REs in the frequency domain for up to 6 ports; 2 FD-OCCs spanning adjacent REs in the frequency domain for up to 4 ports; and 2 FD-OCCs spanning adjacent REs in the frequency domain for up to 2 ports. In various embodiments, the second preamble PDSCH DMRS configuration may have two OFDM symbols. In some configurations, the two OFDM symbols may be selected from: 2 FD-OCC plus TDM across adjacent REs in the frequency domain for up to 12 ports; and 2 FD-OCCs plus TD-OCCs ({ 11 } and {1-1}) across adjacent REs in the frequency domain for up to 12 ports.
Fig. 4 is a schematic block diagram illustrating one embodiment of a
Fig. 4 is used to illustrate REs that may be used for DMRS port-to-RE mapping. In various embodiments, the mapping of DMRS ports to REs may be based on frequency division multiplexing ("FDM"), frequency division orthogonal cover codes ("FD-OCC"), time division orthogonal cover codes ("TD-OCC"), time division multiplexing ("TDM"), cyclic shift ("CS"), and/or combs.
In one embodiment,
In another embodiment,
In yet another embodiment, REs 406-428 may be determined by the RE mapping order of FD-OCC following TD-OCC following FDM. Such an embodiment may result in:
In certain embodiments,
In various embodiments,
In some embodiments,
TABLE 1
In one embodiment,
In another embodiment,
In yet another embodiment, REs 406-428 may be determined by the RE mapping order in which FDM follows FD-OCC follows TDM. Such an embodiment may result in:
In some embodiments, REs 406-428 may be determined by the RE mapping order following TDM following FD-OCC following FDM. Such an embodiment may result in:
In various embodiments, REs 406-428 may be determined by the RE mapping order in which FD-OCC follows TDM with FDM. Such an embodiment may result in:
In some embodiments, the
The various embodiments set forth above use 12 ports. It is to be understood that similar embodiments may be used for DMRSs having 2, 4 or 8 ports. Furthermore, the various embodiments set forth above may be used to support DL, UL, transparent and/or non-transparent multi-user ("MU") MIMO.
In some embodiments, the signaling of DMRS may be expressed in the frequency and/or time domain. In various embodiments, the signaling of DMRS may be bandwidth portion specific. In certain embodiments, to reduce DMRS overhead in the frequency domain, only a portion of the scheduled PRBs may have DMRS consumption. In one embodiment, the indication that the DMRS carries PRBs may be expressed by periodicity and/or offset. In some embodiments, the unit may be per PRB, and this may be configured through RRC signaling. In various embodiments, for time domain DMRS density, it may be partitioned at the subframe level and/or symbol level.
In certain embodiments, subframe-level DMRS density configurations may be used for overhead reduction in the time domain. For a single
In some embodiments, for a single subframe scheduling case, the DMRS for the
In various embodiments, for a continuous or discontinuous multiple subframe scheduling case, overhead reduction may be achieved by placing DMRS in only a portion of the scheduled subframe. In some embodiments, a general framework of subframe level periodicity and/or offset may be used. In one embodiment, two special periodicity values may be used to indicate the presence and absence of DMRS. In another embodiment, the periodicity and/or the offset may be used to indicate a DMRS-bearing subframe relative to the first scheduling subframe. In yet another embodiment, the subframes used to calculate the periodicity and/or offset may contain both scheduled and blank subframes. In various embodiments, the subframes used to calculate the periodicity and/or offset may only include scheduled subframes. In some embodiments, the time domain periodicity and/or offset may be configured separately. In some embodiments, the periodicity may be semi-statically configured and the offset may be obtained implicitly by the first scheduled subframe. For example, if the periodicity is set to 10ms and the subframe index of the first schedule is 1, the corresponding DMRS offset may be 1. In various embodiments, the time domain periodicity and/or offset configuration may be performed by RRC signaling.
In certain embodiments, there may be two types of DMRSs: a preamble DMRS and an additional DMRS. In some embodiments, the preamble DMRS locations may be set to symbols 2 and 3, and may be the primary DMRS in a subframe or slot. In various embodiments, additional DMRSs may be used for high speed scenarios to provide more accurate channel estimation. In certain embodiments, the additional DMRS locations may be symbols 6 and 7 or symbols 11 and 12. In other embodiments, the additional DMRS locations may be any suitable symbols.
In various embodiments, both the additional DMRS plus the preamble DMRS may be configured for high speed scenarios, while for slow moving scenarios, only the preamble DMRS may be used. In some embodiments, to support flexible DMRS symbol occupancy, the preamble and additional DMRS symbols may be indexed 0, 1, 2, 3, where 0/1 means two preamble DMRS symbols and 2/3 means two additional DMRS symbols. In such embodiments, the possible DMRS occupancy combinations may be: {0}, {0, 1}, {0, 2}, {0, 1, 2, 3 }. In one embodiment, a 1-symbol preamble DMRS and a 1-symbol additional DMRS may be used for a high speed scenario with fewer multiplexed spatial layers. With the previously described embodiments, the DMRS combination may be signaled using 3 bits. In some embodiments, these 3 bits may be indicated by DCI and/or RRC signaling.
In some embodiments, the mini-slot DMRSs may reuse as many normal subframe DMRSs as possible. In some embodiments, the minislots may be divided in two ways: the micro-slot length is equal to or greater than Y; and the minislot length is shorter than Y. In such embodiments, Y may be a predetermined value (e.g., Y ═ 7).
For a mini-slot length equal to or greater than Y, the normal subframe DMRS may be reused with possible shifts. In some embodiments, a shift may be used in response to the minislot start symbol not being aligned with the normal subframe start symbol. For example, in response to a minislot starting from symbol 2 and occupying 12 symbols, the front-loaded minislot DMRS symbols may occupy symbols 4 and 5, which are 2-symbol shifts relative to symbols 2 and 3 in the normal subframe.
For minislot lengths shorter than Y, there may be two alternatives to reduce DMRS overhead: PDSCH DMRS occupying one symbol, and the symbol is next to the PDCCH end symbol; and a PDSCH sharing the same DMRS as the PDCCH.
For PDSCH DMRS that occupies one symbol, a DMRS pattern with 1-symbol occupancy may be used. This helps to improve flexibility due to PDSCH specific DMRS. The maximum number of micro-slot DMRS ports and DCI for scheduling micro-slots may be designed separately from the conventional subframe DMRS/DCI. The number of minislot DMRS ports may be limited to a small number, such as 4, to reduce DMRS overhead. Meanwhile, DCI for a micro slot may consider overhead consumption. The DCI for scheduling micro-slots may be a compact DCI with a small number of DMRS ports (4 maximum), a small number of codewords (1 CW), and other overhead reduction methods. For certain use cases, the micro-slot duration may be limited to a small set. The set may be semi-statically configured and the DCI may be used to indicate which duration in the set is actually used for micro-slot scheduling.
For PDSCH sharing the same DMRS as PDCCH, limitations on PDSCH transmission may be unavoidable. In some embodiments, PDCCH DMRS may support a maximum of two ports, so the PDSCH spatial layer may be limited to 2. DMRS sharing of PDCCH and PDSCH may be partial sharing. PDSCH DMRS the port number may be greater than PDCCH DMRS and PDSCH ports 0 and 1 may be shared with PDCCH. Sharing may mean the same RE mapping, the same DMRS port index, and/or the same precoding vector selection. The PDCCH and PDSCH may have different block error rate ("BLER") requirements for a single transmission and may limit the spectral efficiency of PDSCH transmissions. In certain embodiments, DCI and/or RRC signaling may be used to indicate whether PDSCH DMRS occupying one symbol or PDSCH sharing the same DMRS as PDCCH is used for the mini-slot.
Fig. 5 is a schematic flow chart diagram illustrating one embodiment of a method 500 for demodulation reference signal configuration. In some embodiments, the method 500 is performed by an apparatus, such as the
The method 500 may include receiving 502 a demodulation reference signal configuration for a physical downlink shared channel. In some embodiments, the method 500 includes receiving 504 a demodulation reference signal based on a demodulation reference signal configuration.
In one embodiment, the demodulation reference signal configuration comprises a separate configuration for a physical downlink shared channel, and the separate configuration is different from a configuration of a physical downlink control channel. In yet another embodiment, the demodulation reference signal configuration is shared between a physical downlink shared channel and a physical downlink control channel. In some embodiments, the demodulation reference signal configuration comprises a frequency domain configuration, a time domain configuration, and/or a demodulation reference signal port mapping order. In various embodiments, the frequency domain configuration includes periodicity and/or offset. In some embodiments, the periodicity and/or offset corresponds to physical resource blocks. In one embodiment, the periodicity and/or the offset are indicated by radio resource control signaling. In yet another embodiment, the time domain configuration comprises a subframe level configuration and/or a symbol level configuration. In certain embodiments, the subframe level configuration includes periodicity and/or offset.
In various embodiments, the periodicity indicates whether or not a demodulation reference signal is present in a single subframe. In some embodiments, the periodicity and/or offset indicates demodulation reference signal carrying subframes used for consecutive scheduling subframes. In one embodiment, the periodicity and/or offset indicates demodulation reference signal carrying subframes used for non-continuously scheduled subframes. In yet another embodiment, the demodulation reference signal carrying subframes for the non-consecutive scheduled subframes are based on the counted blank subframes. In certain embodiments, the demodulation reference signal carrying subframes for the non-consecutive scheduled subframes are based on the blank subframes not counted. In various embodiments, the periodicity and/or the offset are indicated by radio resource control signaling. In some embodiments, the symbol level configuration comprises one or more symbols in a subframe or slot. In one embodiment, the symbol level configuration is indicated by downlink control information signaling and/or radio resource control signaling.
In some embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division orthogonal cover codes, and wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In various embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division multiplexing, and wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In some embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising a cyclic shift, a second mapping comprising a comb, and a third mapping comprising a time-division orthogonal cover code, wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In one embodiment, the demodulation reference signal port mapping order comprises: a first mapping comprising cyclic shifts, a second mapping comprising combs, and a third mapping comprising time division multiplexing, wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order.
In certain embodiments, the demodulation reference signal shared between the physical downlink shared channel and the physical downlink control channel is indicated by radio resource control signaling and/or downlink control signaling. In some embodiments, the demodulation reference signal configuration is in terms of bandwidth portions.
Fig. 6 is a schematic flow chart diagram illustrating another embodiment of a
The
In one embodiment, the demodulation reference signal configuration comprises a separate configuration for a physical downlink shared channel, and the separate configuration is different from a configuration of a physical downlink control channel. In yet another embodiment, the demodulation reference signal configuration is shared between a physical downlink shared channel and a physical downlink control channel. In some embodiments, the demodulation reference signal configuration comprises a frequency domain configuration, a time domain configuration, and/or a demodulation reference signal port mapping order. In various embodiments, the frequency domain configuration includes periodicity and/or offset. In some embodiments, the periodicity and/or offset corresponds to physical resource blocks. In one embodiment, the periodicity and/or the offset are indicated by radio resource control signaling. In yet another embodiment, the time domain configuration comprises a subframe level configuration and/or a symbol level configuration. In certain embodiments, the subframe level configuration includes periodicity and/or offset.
In various embodiments, the periodicity indicates whether or not a demodulation reference signal is present in a single subframe. In some embodiments, the periodicity and/or offset indicates demodulation reference signal carrying subframes used for consecutive scheduling subframes. In one embodiment, the periodicity and/or offset indicates demodulation reference signal carrying subframes used for non-continuously scheduled subframes. In yet another embodiment, the demodulation reference signal carrying subframes for the non-consecutive scheduled subframes are based on the counted blank subframes. In certain embodiments, the demodulation reference signal carrying subframes for the non-consecutive scheduled subframes are based on the blank subframes not counted. In various embodiments, the periodicity and/or the offset are indicated by radio resource control signaling. In some embodiments, the symbol level configuration comprises one or more symbols in a subframe or slot. In one embodiment, the symbol level configuration is indicated by downlink control information signaling and/or radio resource control signaling.
In some embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division orthogonal cover codes, wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In various embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising frequency division multiplexing, a second mapping comprising frequency division orthogonal cover codes, and a third mapping comprising time division multiplexing, and wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In some embodiments, the demodulation reference signal port mapping order comprises: a first mapping comprising a cyclic shift, a second mapping comprising a comb, and a third mapping comprising a time-division orthogonal cover code, wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order. In one embodiment, the demodulation reference signal port mapping order comprises: a first mapping comprising cyclic shifts, a second mapping comprising combs, and a third mapping comprising time division multiplexing, wherein the first mapping, the second mapping, and the third mapping are performed in any suitable order.
In certain embodiments, the demodulation reference signal shared between the physical downlink shared channel and the physical downlink control channel is indicated by radio resource control signaling and/or downlink control signaling. In some embodiments, the demodulation reference signal configuration is in terms of bandwidth portions.
Embodiments may be practiced in other specific forms. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.
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