阅读说明：本技术 病毒防护芯片及病毒防护方法 (Virus protection chip and virus protection method ) 是由 洪明哲 卢嘉謦 颜士轩 蔡志炜 于 2021-03-04 设计创作，主要内容包括：本发明提供了一种病毒防护芯片及病毒防护方法,该病毒防护芯片包含第一连接端、第二连接端、检测单元与处理单元。第一连接端用以耦接电子装置的连接埠。第二连接端用以耦接电子装置的系统电路。检测单元用以通过第一连接端检测连接埠是否连接到外部装置。于检测单元检测到连接埠连接到外部装置时,处理单元对外部装置执行病毒扫描程序以判断外部装置中是否存在病毒。于判断外部装置中不存在病毒时,处理单元建立第一连接端与第二连接端之间的第一传输路径。于判断外部装置中存在病毒时,处理单元不建立第一传输路径。本发明可利用病毒防护芯片来阻断外部装置直接通过连接埠连接到系统电路,使得电子装置及/或外部装置可受到病毒防护。(The invention provides a virus protection chip and a virus protection method. The first connection end is used for coupling with a connection port of an electronic device. The second connection terminal is coupled to a system circuit of the electronic device. The detection unit is used for detecting whether the connection port is connected to an external device or not through the first connection end. When the detection unit detects that the connection port is connected to the external device, the processing unit executes a virus scanning program to the external device to judge whether a virus exists in the external device. When the external device is judged to be free from viruses, the processing unit establishes a first transmission path between the first connecting end and the second connecting end. When the external device is judged to have the virus, the processing unit does not establish the first transmission path. The invention can utilize the virus protection chip to block the external device from being directly connected to the system circuit through the connecting port, so that the electronic device and/or the external device can be protected by virus.)

1. A virus protection chip, comprising:

a first connection end for coupling with a connection port of an electronic device;

a second connection terminal for coupling to a system circuit of the electronic device;

a detecting unit for detecting whether the connection port is connected to an external device through the first connection end; and

a processing unit, when the detecting unit detects that the connection port is connected to the external device, the processing unit executes a virus scanning program to the external device to determine whether a virus exists in the external device, wherein when the external device is determined not to exist the virus, the processing unit establishes a first transmission path between the first connection end and the second connection end, and when the external device is determined to exist the virus, the processing unit does not establish the first transmission path.

2. The virus-protection chip of claim 1, further comprising:

a path control unit for establishing or disconnecting the first transmission path, wherein the processing unit normally causes the path control unit to disconnect the first transmission path, the processing unit causes the path control unit to establish the first transmission path when determining that the virus does not exist in the external device, and the processing unit further causes the path control unit to disconnect the first transmission path when the detection unit does not detect that the connection port is connected to the external device after establishing the first transmission path.

3. The virus protection chip of claim 2, wherein the path control unit is further configured to establish or disconnect a second transmission path between the processing unit and the first connection end, wherein the processing unit further causes the path control unit to establish the second transmission path between the processing unit and the first connection end when the detection unit detects that the connection port is connected to the external device, so as to execute the virus scanning procedure on the external device through the second transmission path.

4. The virus protection chip of claim 1, wherein the processing unit comprises:

A transmission circuit; and

a processing circuit, the processing circuit performs virus scanning on the external device through the transmission circuit according to a plurality of virus codes in a virus database in the virus scanning program, and when the processing circuit finds that the external device has the virus according to the plurality of virus codes, the processing circuit judges that the virus exists in the external device.

5. The virus-protection chip of claim 4, further comprising:

a random access memory, including a virus-inducing area, the virus-inducing area includes a plurality of simulation file system files, wherein when the virus codes do not find the external device has the virus, the processing circuit induces the virus in the virus scanning program to attack the virus-inducing area, and the processing circuit further determines whether the virus exists in the external device according to a virus-inducing result of the virus-inducing area, wherein when the virus-inducing result indicates that the virus-inducing area is not attacked by the virus, the processing circuit determines that the virus does not exist in the external device, and when the virus-inducing result indicates that the virus-inducing area is attacked by the virus, the processing circuit determines that the virus exists in the external device.

6. The virus-protection chip of claim 1, wherein the processing unit executes the virus scanning procedure on the external device when the detecting unit detects that the connection port is connected to the external device and the system circuit is to read an external data in the external device.

7. The virus-protection chip of claim 1, further comprising:

a random access memory, wherein when the detection unit detects that the connection port is connected to the external device, the processing unit executes a write test program to the random access memory according to internal data output by the system circuit, and the processing unit determines whether another virus exists in the system circuit according to a test result of the write test program, wherein the processing unit establishes the first transmission path when determining that the virus does not exist in the external device and the another virus does not exist in the system circuit, and the processing unit does not establish the first transmission path when determining that the virus exists in the external device or the another virus exists in the system circuit.

8. The virus-protection chip of claim 7, further comprising:

A path control unit, wherein the processing unit uses the path control unit to establish or disconnect the first transmission path, the processing unit further uses the path control unit to establish a second transmission path between the processing unit and the first connection end so as to execute the virus scanning program on the external device through the second transmission path, the processing unit further uses the path control unit to establish a third transmission path between the second connection end and the processing unit so as to receive the internal data through the third transmission path, and the path control unit further disconnects the remaining two when any one of the first transmission path, the second transmission path and the third transmission path is established.

9. A virus protection method is applicable to a virus protection chip, the virus protection chip is used for being coupled between a connection port of an electronic device and a system circuit of the electronic device, and the virus protection method comprises the following steps:

detecting whether the connection port is connected to an external device;

when detecting that the connection port is connected to the external device, executing a virus scanning program on the external device to judge whether a virus exists in the external device;

When the external device is judged not to have the virus, a first transmission path between the connection port and the system circuit is established; and

when the virus exists in the external device, the first transmission path is not established.

10. The virus protection method of claim 9, wherein the step of establishing the first transmission path between the connection port and the system circuit further comprises:

detecting whether the connection port is connected to the external device; and

when the connection port is not detected to be connected to the external device, the first transmission path is disconnected.

11. The virus protection method of claim 9, wherein the step of executing the virus scanning procedure on the external device to determine whether the virus exists in the external device comprises:

scanning the external device according to a plurality of virus codes in a virus database; and

when the external device is found to have the virus according to the plurality of virus codes, the virus is judged to exist in the external device.

12. The virus protection method of claim 11, wherein the virus protection chip comprises a random access memory, the random access memory comprises a virus-trapping region, the virus-trapping region comprises a plurality of emulated file system files, the virus protection method further comprises:

When the virus exists in the external device according to the virus codes, inducing the virus to attack the virus induction area;

judging whether the virus exists in the external device according to a virus trapping result of the virus trapping area;

when the virus induction result shows that the virus induction area is not attacked by the virus, judging that the virus does not exist in the external device; and

and when the virus induction result shows that the virus induction area is attacked by the virus, judging that the virus exists in the external device.

13. The method of claim 11, further comprising:

when the connection port is detected to be connected to the external device, a second transmission path between a processing unit of the virus protection chip and the connection port is established, wherein the step of scanning the external device according to the plurality of virus codes in the virus database is performed on the external device through the second transmission path.

14. The virus protection method of claim 9, wherein the step of executing the virus scanning procedure on the external device to determine whether the virus exists in the external device is performed when it is detected that the connection port is connected to the external device and the system circuit is to read an external data in the external device.

15. The virus protection method of claim 9, wherein the virus protection chip comprises a random access memory, the virus protection method comprising:

when detecting that the connection port is connected to the external device, executing a write test program to the random access memory according to internal data output by the system circuit; and

judging whether another virus exists in the system circuit according to a test result of the write test program;

wherein the step of establishing the first transmission path between the connection port and the system circuit is performed when it is determined that the virus does not exist in the external device and the other virus does not exist in the system circuit; and

wherein the step of not establishing the first transmission path is performed when the virus exists in the external device or the other virus exists in the system circuit.

16. The method of claim 15, further comprising:

before executing the virus scanning program to the external device, establishing a second transmission path between a processing unit of the virus protection chip and the connection port; and

before the step of executing the write test program to the random access memory according to the internal data output by the system circuit, establishing a third transmission path between the system circuit and the processing unit;

Wherein, when any one of the first transmission path, the second transmission path and the third transmission path is established, the other two paths are disconnected.

17. A virus protection chip, comprising:

a first connection end for coupling with a connection port of an electronic device;

a second connection terminal for coupling to a system circuit of the electronic device;

a random access memory; and

a processing unit, which executes a write test program to the RAM according to an internal data output by the system circuit, and judges whether a virus exists in the system circuit according to a test result of the write test program, wherein when the virus exists in the system circuit, the processing unit does not establish a first transmission path between the first connection end and the second connection end, and when the virus does not exist in the system circuit, the processing unit establishes the first transmission path.

18. The virus-protection chip of claim 17, further comprising:

a detecting unit for detecting whether the connection port is connected to an external device through the first connection end before the processing unit establishes the first transmission path.

19. The virus-protection chip of claim 18, further comprising:

a path control unit, wherein the processing unit normally causes the path control unit to disconnect the first transmission path, the processing unit causes the path control unit to establish the first transmission path when determining that the virus does not exist in the system circuit, and after establishing the first transmission path, the processing unit further causes the path control unit to disconnect the first transmission path when the detection unit does not detect that the connection port is connected to the external device.

20. The virus-protection chip of claim 19, wherein the processing unit further causes the path control unit to establish a third transmission path between the second connection terminal and the processing unit when the detection unit detects that the connection port is connected to the external device, so as to receive the internal data through the third transmission path.

21. The virus protection chip of claim 17, wherein the processing unit further emulates the random access memory as a memory device, such that the processing unit executes the write test procedure to the random access memory according to the internal data output by the system circuit.

22. A virus protection method is applicable to a virus protection chip, the virus protection chip is used for being coupled between a connection port of an electronic device and a system circuit of the electronic device, and the virus protection method comprises the following steps:

executing a write test program to a random access memory of the virus protection chip according to internal data output by the system circuit;

judging whether a virus exists in the system circuit according to a test result of the write-in test program;

when the virus exists in the system circuit, a first transmission path between the connection port and the system circuit is not established; and

and establishing the first transmission path when the virus does not exist in the system circuit.

23. The virus protection method of claim 22, further comprising, before the step of establishing the first transmission path:

detecting whether the connection port is connected to an external device.

24. The virus protection method of claim 23, further comprising, after the step of establishing the first transmission path:

detecting whether the connection port is connected to the external device; and

when the connection port is not detected to be connected to the external device, the first transmission path is disconnected.

25. The method of claim 24, further comprising:

when the connection port is detected to be connected to the external device, a third transmission path between a processing unit of the virus protection chip and the system circuit is established, wherein the write test program is executed through the third transmission path.

26. The virus protection method of claim 25, wherein the step of executing the write test procedure on the random access memory of the virus protection chip according to the internal data outputted from the system circuit comprises:

the random access memory is simulated into a storage device, and the processing unit executes the write test program on the random access memory according to the internal data output by the system circuit.

Technical Field

The present invention relates to virus protection technology, and is especially one kind of virus protecting chip and virus protecting method.

Background

Generally, when an external device such as a portable disk is connected to a port of an electronic device, an operating system of the electronic device is automatically connected to the external device and reads all files in the external device. However, if a virus exists in the external device, the virus is likely to spread (infect) to all data following a File System in the electronic device.

In addition, since the electronic device is powered on in the magnetic boot sector after being connected to the external device, the antivirus software running on the operating system can only notify the user and cannot eliminate the powered-on virus, so that the general antivirus software can hardly prevent the attack of the powered-on virus.

Disclosure of Invention

One embodiment of the present invention discloses a virus protection chip. The virus protection chip comprises a first connecting end, a second connecting end, a detection unit and a processing unit. The first connection end is used for coupling with a connection port of an electronic device. The second connection terminal is coupled to the system circuit of the electronic device. The detection unit is used for detecting whether the connection port is connected to an external device or not through the first connection end. When the detection unit detects that the connection port is connected to the external device, the processing unit executes a virus scanning program to the external device to judge whether a virus exists in the external device. When the external device is judged to be free from viruses, the processing unit establishes a first transmission path between the first connecting end and the second connecting end. When the external device is judged to have the virus, the processing unit does not establish the first transmission path.

An embodiment of the present invention discloses a virus protection method suitable for a virus protection chip. The virus protection chip is used for being coupled between a connection port of the electronic device and a system circuit of the electronic device. The virus protection method comprises the following steps: detecting whether the connection port is connected to an external device; when detecting that the connection port is connected to the external device, executing a virus scanning program on the external device to judge whether a virus exists in the external device; when the external device is judged to be free from viruses, a first transmission path between the connection port and the system circuit is established; and when the virus exists in the external device, not establishing the first transmission path.

One embodiment of the present invention discloses a virus protection chip. The virus protection chip comprises a first connecting end, a second connecting end, a detection unit, a random access memory and a processing unit. The first connection end is used for coupling with a connection port of an electronic device. The second connection terminal is coupled to the system circuit of the electronic device. The processing unit executes a write test program to the random access memory according to internal data output by the system circuit, and judges whether a virus exists in the system circuit according to a test result of the write test program. When the system circuit is judged to have the virus, the processing unit does not establish the first transmission path between the first connection end and the second connection end, and when the system circuit is judged to have no virus, the processing unit establishes the first transmission path.

An embodiment of the present invention discloses a virus protection method suitable for a virus protection chip. The virus protection chip is used for being coupled between a connection port of the electronic device and a system circuit of the electronic device. The virus protection method comprises the following steps: causing the system circuit to execute a write test program to the random access memory of the virus protection chip; judging whether a virus exists in a system circuit according to a test result written in the test program; when the virus exists in the system circuit, a first transmission path between the connection port and the system circuit is not established; and establishing a first transmission path when the virus does not exist in the system circuit.

The invention utilizes the virus protection chip coupled between the connection port of the electronic device and the system circuit to block the external device from being directly connected to the system circuit through the connection port, and only bridges the external device to the electronic device after confirming that no virus exists in the external device and/or confirming that no virus exists in the electronic device, so that the electronic device and/or the external device can be protected by the virus.

Drawings

FIG. 1 is a schematic diagram of an embodiment of an external device connected to an electronic device having a virus protection chip.

FIG. 2 is a block diagram of an embodiment of a virus protection chip.

Fig. 3 is a flowchart illustrating a first embodiment of a virus protection method.

Fig. 4A is a flowchart illustrating a virus protection method according to a second embodiment.

Fig. 4B is a flowchart illustrating a virus protection method according to a third embodiment.

FIG. 5 is a flowchart illustrating a fourth exemplary embodiment of a virus protection method.

Reference numerals:

100 virus protection chip

111 first connection end

112 the second connecting end

113 external pin

120 detection unit

130 processing unit

131 transmission circuit

132 processing circuit

140 path control unit

150 random access memory

150A poison induction area

160 flash memory

170 flash memory controller

200 electronic device

210 connection port

220 system circuit

300 external device

A1 Link Signal

D1 +/a first positive phase data pin

D1-the first inverse data pin

D2+: second positive phase data pin

D2-second inverse data pin

L1 virus database

P1 first Transmission Path

P2 second Transmission Path

P3 third Transmission Path

V1-Vn virus code

S11-S16, S21-S27, S31-S38

Detailed Description

In order to make the aforementioned objects, features and advantages of the embodiments of the present invention comprehensible, embodiments accompanied with figures are described in detail below.

It will be understood that the terms "comprises" and "comprising," when used in this specification, specify the presence of stated features, values, method steps, operations, elements, and/or components, but do not preclude the presence or addition of further features, values, method steps, operations, elements, components, and/or groups thereof.

The terms "first," "second," "third," and the like are used to modify elements and are not used to denote a priority or precedence relationship, but rather are used to distinguish elements having the same name.

FIG. 1 is a schematic diagram of an embodiment of an external device connected to an electronic device having a virus protection chip. Referring to fig. 1, the virus protection chip 100 may be disposed in an electronic device 200. The electronic device 200 includes a connection port 210 and a system circuit 220. The port 210 is used to connect an external device 300, and the virus-protection chip 100 is located between the port 210 and the system circuit 220 to control whether a transmission path between the port 210 and the system circuit 220 is established. Herein, when the external device 300 is connected to the port 210 of the electronic device 200, for example, when the user inserts the port 310 of the external device 300 into the port 210 of the electronic device 200 or connects the external device 300 to the port 210 of the electronic device 200 through a connection wire, the system circuit 220 of the electronic device 200 cannot directly establish transmission with the external device 300, and the system circuit 220 must confirm no virus exists in the virus-protection chip 100 and then start to transmit with the external device 300 through the bridge connection of the virus-protection chip 100.

In an embodiment, the virus protection chip 100 can perform the virus protection method according to the first embodiment of the present invention, so that the virus protection chip 100 can bridge the external device 300 to the system circuit 220 after confirming that there is no virus in the external device 300, so as to prevent the electronic device 100 from being attacked by the virus. In another embodiment, the virus protection chip 100 may also execute the virus protection method according to the second or third embodiment of the present invention, so that the virus protection chip 100 bridges the external device 300 to the system circuit 220 after confirming that there is no virus in the system circuit 220, so as to prevent the external device 300 from being attacked by the virus. In another embodiment, the virus protection chip 100 further performs the virus protection method according to the fourth embodiment of the present invention, so that the virus protection chip 100 bridges the external device 300 to the system circuit 220 after confirming that no virus exists in the external device 300 and no virus exists in the system circuit 220, thereby preventing any party from being attacked by the virus.

In some embodiments, the electronic device 200 can be various electronic apparatuses, such as a computer, a tablet, a mobile phone, a machine, and so on. In addition, the transmission interface of the port 210 may be a Universal Serial Bus (USB), Serial Advanced Technology Attachment (SATA), Parallel Advanced Technology Attachment (PATA), Peripheral Controller Interface (PCI) or other suitable transmission interface. In this case, the port 210 is illustrated as a USB.

In some implementations, the system circuit 220 may be a core circuit of the electronic device 200, such as a chipset (chipset). The chipset may be, for example, a north bridge chip, a south bridge chip, a combination of the north bridge chip and the south bridge chip, or an independent chip. The external device 300 may also be any electronic device suitable for transmitting with the electronic device 200, such as a portable disk, an external hard disk, a mobile phone, etc. In addition, the virus protection chip 100 and the system circuit 220 may be disposed on the same circuit board, but the invention is not limited thereto.

FIG. 2 is a block diagram of an embodiment of a virus protection chip. Referring to fig. 1 and fig. 2, in an embodiment, the virus-protection chip 100 may include at least two connection terminals (hereinafter, referred to as a first connection terminal 111 and a second connection terminal 112, respectively), a detection unit 120, and a processing unit 130. In addition, the virus protection chip 100 may further include a path control unit 140. The detecting unit 120 is coupled to the first connection end 111, the path control unit 140 is coupled to the first connection end 111 and the second connection end 112, and the processing unit 130 is coupled to the detecting unit 120 and the path control unit 140.

The first connection end 111 is coupled to the connection port 210 of the electronic device 100, and the second connection end 112 is coupled to the system circuit 220 of the electronic device 100. In some embodiments, when the port 210 is a USB interface, the first connection 111 may include at least two data pins (hereinafter referred to as a first positive phase data pin D1+ and a first negative phase data pin D1-), and the second connection 112 may also include at least two data pins (hereinafter referred to as a second positive phase data pin D2+ and a second negative phase data pin D2-).

The detecting unit 120 is coupled to the first positive phase data pin D1+ and the first negative phase data pin D1-of the first connection 111. Here, the detecting unit 120 can detect whether the port 210 is connected to any external device 300 through the first positive phase data pin D1+ and the first negative phase data pin D1-of the first connection 111.

The path control unit 140 is controlled by the processing unit 130. Herein, the path control unit 140 may be configured to control whether the first transmission path P1 between the first connection end 111 and the second connection end 112 is established, whether the second transmission path P2 between the first connection end 111 and the processing unit 130 is established, and whether the third transmission path P3 between the second connection end 112 and the processing unit 130 is established. Here, the path control unit 140 normally disconnects the first transmission path P1. Therefore, when the external device 300 is connected to the port 210 of the electronic device 200, the external device 300 cannot be directly connected to the system circuit 220.

The processing unit 130 is configured to control the path control unit 140 to perform corresponding processing according to the detection result of the detection unit 120. In some embodiments, the processing unit 130 can be implemented by a Central Processing Unit (CPU), a micro-processor (micro-processor), a Digital Signal Processor (DSP), a programmable controller, an Application Specific Integrated Circuit (ASIC), a Programmable Logic Device (PLD), or other similar circuit elements, but the invention is not limited thereto.

Fig. 3 is a flowchart illustrating a first embodiment of a virus protection method. Referring to fig. 1 to 3, in the first embodiment of the virus protection method, the virus protection chip 100 can detect whether the connection port 210 is connected to the external device 300 through the first connection end 111 by using the detection unit 120 (step S11). When the detecting unit 120 detects that the port 210 is connected to the external device 300, the virus protection chip 100 can utilize the processing unit 130 to execute a virus scanning procedure on the external device 300 to determine whether a virus exists in the external device 300 (step S12). When the processing unit 130 determines in step S12 that no virus exists in the external device 300, the virus-protection chip 100 can establish a first transmission path P1 between the first connection end 111 and the second connection end 112 (i.e., between the connection port 210 and the system circuit 220) (step S13), so that the electronic device 200 and the external device 300 can perform one-way or two-way transmission. For example, the system circuit 220 of the electronic device 200 can write data to the external device 300 through the first transmission path P1, or read data from the external device 300 through the first transmission path P1. On the contrary, when the processing unit 130 determines in step S12 that the virus exists in the external device 300, the virus protection chip 100 does not establish the first transmission path P1 to prevent the virus from entering the electronic device 200 from the external device 300 (step S14). Therefore, in the present embodiment, the processing unit 130 can cause the path control unit 140 to bridge the external device 300 to the system circuit 220 after confirming that the external device 300 does not have the virus, so as to prevent the virus in the external device 300 from infecting (spreading) to the system circuit 220.

In one embodiment of the step S11, the detecting unit 120 determines whether an external device 300 is connected to the port 210 according to whether the level of the first positive phase data pin D1+ or the first negative phase data pin D1-of the first connection end 111 is changed to a predetermined level. For example, upon detecting that the level of the first positive phase data pin D1+ or the first negative phase data pin D1-is pulled up to the high level, the detecting unit 120 can determine that the port 210 is connected to the external device 300 and output the connection signal A1 to the processing unit 130. On the contrary, if the levels of the first positive phase data pin D1+ and the first negative phase data pin D1-are detected to be continuously maintained at the low level, the detecting unit 120 may determine that the port 210 is not connected to the external device 300 and does not output the connection signal A1 to the processing unit 130. Therefore, in some embodiments, the processing unit 130 can determine whether the external device 300 is connected to the port 210 according to whether the connection signal a1 is received. In some embodiments, the presence or absence of received link signal a1 may be determined based on the level of link signal a 1. For example, when the processing unit 130 determines that the level of the link signal a1 is high, e.g., logic "1", it indicates that the link signal a1 is received. On the contrary, when the processing unit 130 determines that the level of the link signal a1 is low, for example, logic "0", it indicates that the link signal a1 is not received.

After receiving the link signal a1, the processing unit 130 may proceed to step S12. Otherwise, the processing unit 130 returns to step S11 to continue the detection by the detecting unit 120.

In some embodiments, the second transmission path P2 between the first connection end 111 and the processing unit 130 is normally open. Therefore, in an embodiment of step S12, the processing unit 130 may first cause the path control unit 140 to establish the second transmission path P2, so as to execute the virus scanning procedure on the external device 300 through the second transmission path P2. However, the invention is not limited thereto. In other embodiments, the path control unit 140 may also normally establish the second transmission path P2 and disconnect the first transmission path P1 and the third transmission path P3, so that the processing unit 130 may directly execute the virus scanning procedure on the external device 300 through the second transmission path P2 in an embodiment of step S12.

In some embodiments, processing unit 130 may include transmission circuitry 131 and processing circuitry 132. The transmission circuit 131 is coupled to the path control unit 140, and the processing circuit 132 is coupled to the transmission circuit 131, the path control unit 140 and the detection unit 120. After the second transmission path P2 is established, the processing circuit 132 can communicate with the external device 300 through the transmission circuit 131. In some embodiments, the transmission circuit 131 may be a transmission circuit that uses a communication standard conforming to the port 210. For example, when the port 210 is a USB transmission interface, the transmission circuit 131 may be a master transmission device (USB Host), a Slave transmission device (USB Slave), or a master/Slave transmission device (USB Host/Slave) that adopts the USB communication standard.

In some embodiments, the processing circuit 132 may execute the step S12 to execute the virus scanning procedure on the external device 300 only when the detecting unit 120 detects that the port 210 is connected to the external device 300 and the system circuit 220 is to read the external data in the external device 300, but the invention is not limited thereto.

In an embodiment of the step S12, the processing circuit 132 performs a virus scanning process on the external device 300 through the transmission circuit 131 according to the virus codes V1-Vn in the virus database L1 (step S121).

In some embodiments, virus database L1 may be stored in flash memory 160. In some embodiments, the flash memory 160 may be built in the virus-protection chip 100, and the processing circuit 132 may read the virus database L1 in the flash memory 160 through the flash memory controller 170. In other embodiments, as shown in fig. 2, the flash memory 160 may also be externally connected to an external pin 113 of the virus-protection chip 100, and the processing circuit 132 may read the virus database L1 in the flash memory 160 through the flash memory controller 170 via the external pin 113. However, the invention is not limited thereto, and in other embodiments, the flash memory 160 can be further connected to the system circuit 220, and the processing circuit 132 can load the virus database L1 through the system circuit 220. In some embodiments, the pin 113 may be a Serial Peripheral Interface (SPI).

When the processing circuit 132 finds a virus in the external device 300 according to the virus codes V1-Vn in step S121, the processing circuit 132 may determine that a virus exists in the external device 300 (step S122), and cause the path control unit 140 not to establish the first transmission path P1 (step S14) to prevent the virus in the external device 300 from attacking the system circuit 220. In this regard, it is well known in the art how to search for viruses in the external device 300 according to the virus codes V1-Vn, and therefore, the description thereof is omitted.

In one embodiment of step S14, the processing circuit 132 may further execute a corresponding safety protection procedure except for causing the path control unit 140 not to establish the first transmission path P1. In an embodiment of the security procedure, the processing circuit 132 may cause the external device 300 to exclude the file infected by the virus through the transmission circuit 131, for example, isolate the file infected by the virus, perform formatting on the external device 300, and the like. In addition, the processing circuit 132 may also generate an alert to notify the user that the external device 300 contains a virus. For example, the processing circuit 132 may upload interrupts (interrupts) and data to the system circuit 220 via an enhanced serial peripheral interface (eSPI), and the system circuit 220 may notify the user by displaying a warning message, a warning sound, and/or a warning light. Alternatively, the processing circuit 132 may also directly drive a light emitting element, such as a power lamp on a computer case, to emit red flash through a general purpose input/output pin (GPIO pin). Furthermore, the processing circuit 132 further causes the path control unit 140 to disconnect the second transmission path P2 to disconnect the virus protection chip 100 from the external device 300.

In some embodiments, the program code of the security program may be stored in the flash memory 160, and the processing circuit 132 may execute the security program by reading the program code.

In some embodiments, in order to further enhance the virus protection capability of the virus protection chip 100, when the processing circuit 132 does not find a virus in the external device 300 according to the plurality of virus codes V1-Vn in step S121, the processing circuit 132 may further attempt to induce the virus to attack the planned virus-inducing region 150A in the virus scanning process (step S123), and the processing circuit 132 determines whether a virus exists in the external device 300 according to the virus-inducing result in step S123 (step S124).

In some embodiments, the virus protection chip 100 may further include a random access memory 150, and the random access memory 150 is coupled to the processing circuit 132. The processing circuit 132 can program a trapping region 150A in the RAM 150. Here, the virus-induced region 150A may include a plurality of simulation file system files to simulate a computer system disk for testing or inducing a virus to attack the virus-induced region 150A. In some embodiments, the emulated File system File may include a boot Sector (boot Sector) for indicating boot information and a required File, a Root Directory (Root Directory) for indicating a File name, location, attributes, and the like, a File Allocation Table (File Allocation Table), a File cluster (Data Area), and the like. In some implementations, the random access memory 150 may be a memory internal to the processing circuit 132.

In one embodiment of step S124, when the virus-trapping result in step S123 indicates that the virus-trapping region 150A is attacked by a virus, the processing circuit 132 determines that the virus exists in the external device 300 (step S125), and causes the path control unit 140 not to establish the first transmission path P1 (step S14). In one embodiment of step S14, the processing circuit 132 may perform a corresponding safety protection procedure except for causing the path control unit 140 not to establish the first transmission path P1. In an embodiment of the security procedure, in addition to the processing circuit 132 disconnecting the virus protection chip 100 from the external device 300 and/or generating an alarm to notify the user, the processing circuit 132 may further adopt a reset mechanism to reset the random access memory 150, reload the firmware from the flash memory 160, and so on, so as to make the virus protection chip 100 return to the initial security state. In some aspects, the Reset mechanism may include a power Reset, a Watchdog Timer Reset (Watchdog Timer Reset), or other suitable Reset method.

When the virus-trapping result indicates that the virus-trapping region 150A is not attacked by the virus, the processing circuit 132 may determine that no virus exists in the external device 300 (step S126), and cause the path control unit 140 to establish the first transmission path P1 (step S13) to bridge the external device 300 to the system circuit 220. In some embodiments, the path control unit 140 disconnects the second transmission path P2 between the first connection 111 and the processing unit 130 when the first transmission path P1 is established.

In some embodiments, after the first transmission path P1 is established, the virus-protection chip 100 may continuously detect whether the port 210 is still connected to the external device 300 through the first connection end 111 by using the detection unit 120 (step S15). Moreover, when the detecting unit 120 does not detect that the port 210 is connected to the external device 300, the processing circuit 132 may further cause the path control unit 140 to disconnect the first transmission path P1 (step S16) to prevent a malicious person from replacing the external device detected by the virus protection chip 100 with another external device with a virus.

Fig. 4A is a flowchart illustrating a virus protection method according to a second embodiment. Referring to fig. 1, fig. 2 and fig. 4A, in the second embodiment of the virus protection method, the virus protection chip 100 can utilize the processing circuit 132 of the processing unit 130 to execute a write test procedure on the random access memory 150 according to an internal data output by the system circuit 220 (step S22), and the processing circuit 132 can determine whether a virus exists in the system circuit 220 according to a test result of the write test procedure (step S23). When the processing unit 130 determines in step S23 that a virus exists in the system circuit 220, the virus protection chip 100 does not enable the path control unit 140 to establish the first transmission path P1 (step S24) to prevent the virus from entering the external device 300 from the electronic device 200 when the electronic device 200 is connected to the external device 300. On the contrary, when the processing circuit 132 determines in step S23 that there is no virus in the system circuit 220, the virus-protection chip 100 can detect whether the connection port 210 is connected to the external device 300 through the first connection terminal 111 by using the detection unit 120 (step S21). When the detecting unit 120 detects that the port 210 is connected to the external device 300, the virus-protection chip 100 can cause the path control unit 140 to establish a first transmission path P1 between the first connection end 111 and the second connection end 112 (i.e., between the port 210 and the system circuit 220) (step S25), so that the electronic device 200 and the external device 300 can perform one-way or two-way transmission. Therefore, in the present embodiment, the processing circuit 132 may cause the path control unit 140 to bridge the external device 300 to the system circuit 220 after confirming that the virus does not exist in the electronic device 200, so as to prevent the virus in the electronic device 200 from infecting (spreading) to the external device 300.

Here, step S21 is substantially the same as step S11, and thus will not be described in detail. In the present embodiment, the processing circuit 132 may continue to perform step S25 after receiving the linking signal a1 of the detecting unit 120. Otherwise, the processing circuit 132 returns to step S21 to continue the detection by the detecting unit 120.

In some embodiments, the third transmission path P3 between the second connection terminal 112 and the processing circuit 132 is normally open. Therefore, in an embodiment of step S22, the processing circuit 132 may first cause the path control unit 140 to establish the third transmission path P3, and then the processing circuit 132 receives the internal data output by the system circuit 220 by the transmission circuit 131 and performs the write test procedure on the random access memory 150 according to the received internal data. However, the invention is not limited thereto. In other embodiments, the path control unit 140 may also normally establish the third transmission path P3 and disconnect the first transmission path P1 and the second transmission path P2, so that the processing circuit 132 can directly utilize the transmission circuit 131 to receive the internal data output by the system circuit 220 and execute the write test procedure on the random access memory 150 according to the received internal data.

In some embodiments, the internal data output by the system circuit 220 is data that a user wants to copy from the electronic device 200 to the external device 300. In the write test procedure of step S22, the virus protection chip 100 can be simulated as a storage device by the virtual disk simulation technique, so that the system circuit 220 can first try to write to the external device 300 once on the random access memory 150 of the virus protection chip 100. That is, the processing unit 130 may simulate the random access memory 150 as a storage device, so that the processing circuit 132 of the processing unit 130 executes a write test program on the random access memory 150 according to the internal data output by the system circuit 220, so as to execute the system circuit 220 to test for virus on the storage device, and further determine whether the system circuit 220 has a virus.

In one embodiment of step S23, the processing circuit 132 determines whether a virus exists in the system circuit 220 according to whether the random access memory 150 has a poisoning phenomenon after the write test procedure of step S22.

In one embodiment of step S24, the processing circuit 132 may perform a corresponding safety protection procedure except for causing the path control unit 140 not to establish the first transmission path P1. In one embodiment of the safety protection process, the processing circuit 132 may generate an alert to notify the user. In addition, the processing circuit 132 may further adopt a reset mechanism to reset the random access memory 150, reload the firmware from the flash memory 160, and so on, so as to return the virus-protection chip 100 to the initial security state.

In an embodiment of the step S25, the path control unit 140 disconnects the third transmission path P3 between the second connection terminal 112 and the processing unit 130 when the first transmission path P1 is established.

In some embodiments, after the first transmission path P1 is established, the virus-protection chip 100 may continuously detect whether the port 210 is still connected to the external device 300 through the first connection end 111 by using the detection unit 120 (step S26). Moreover, when the detecting unit 120 does not detect that the port 210 is connected to the external device 300, the processing circuit 132 further causes the path control unit 140 to disconnect the first transmission path P1 (step S27).

Fig. 4B is a flowchart illustrating a virus protection method according to a third embodiment. The third embodiment of the virus protection method of FIG. 4B is substantially similar to the second embodiment of the virus protection method of FIG. 4A. The difference between fig. 4B and fig. 4A lies in the execution sequence of step S21, i.e., step S21 of fig. 4A is executed after determining that no virus exists in the system circuit 220 in step S23, step S21 of fig. 4B is executed before step S22, and step S21 of fig. 4A and fig. 4B is executed before step S25. In addition, in the third embodiment of the virus protection method of fig. 4B, the processing circuit 132 may continue to execute step S22 after receiving the link signal a1 of the detecting unit 120. Otherwise, the processing circuit 132 returns to step S21 to continue the detection by the detecting unit 120. In addition, the third embodiment of fig. 4B can refer to the description of the second embodiment of fig. 4A, and the same effect can be achieved.

FIG. 5 is a flowchart illustrating a fourth exemplary embodiment of a virus protection method. Referring to fig. 1, fig. 2 and fig. 5, in a fourth embodiment of the virus protection method, the virus protection chip 100 can detect whether the connection port 210 is connected to the external device 300 through the first connection end 111 by using the detection unit 120 (step S31). When the detecting unit 120 detects that the port 210 is connected to the external device 300, the virus protection chip 100 can utilize the processing circuit 132 to execute a virus scanning procedure on the external device 300 to determine whether a virus exists in the external device 300 (step S32). The virus protection chip 100 may utilize the processing circuit 132 to execute a write test procedure on the random access memory 150 according to the internal data outputted by the system circuit 220 (step S33), and determine whether a virus exists in the system circuit 220 according to the test result of the write test procedure (step S34).

In some embodiments, the virus protection chip 100 may utilize the processing circuit 132 to first cause the path control unit 140 to establish the second transmission path P2 to confirm whether a virus exists in the external device 300 by performing step S32. Thereafter, the virus protection chip 100 further uses the processing circuit 132 to cause the path control unit 140 to disconnect the second transmission path P2 and establish the third transmission path P3, so as to determine whether a virus exists in the system circuit 220 by performing steps S33 and S34. However, the invention is not limited thereto, and in other embodiments, the virus protection chip 100 may also cause the path control unit 140 to establish the third transmission path P3 first, so as to determine whether a virus exists in the system circuit 220 by performing steps S33 and S34. Thereafter, the virus protection chip 100 further uses the processing circuit 132 to cause the path control unit 140 to disconnect the third transmission path P3 and establish the second transmission path P2, so as to determine whether a virus exists in the external device 300 by performing step S32.

When the processing circuit 132 determines in step S32 that the virus exists in the external device 300 or determines in step S34 that the virus exists in the system circuit 220, the virus-protection chip 100 does not establish the first transmission path P1 (step S35). On the contrary, when the processing circuit 132 determines in step S32 that no virus exists in the external device 300 and determines in step S34 that no virus exists in the system circuit 220, the virus-protection chip 100 establishes the first transmission path P1 (step S36), so that the electronic device 200 and the external device 300 can perform one-way or two-way transmission. Therefore, in the present embodiment, the processing unit 130 can cause the path control unit 140 to bridge the external device 300 to the system circuit 220 after confirming that the virus does not exist in the external device 300 and confirming that the virus does not exist in the electronic device 200, thereby preventing any party from being infected by the virus.

In some embodiments, after the first transmission path P1 is established, the virus-protection chip 100 may continuously detect whether the port 210 is still connected to the external device 300 through the first connection end 111 by using the detection unit 120 (step S37). Moreover, when the detecting unit 120 does not detect that the port 210 is connected to the external device 300, the processing circuit 132 further causes the path control unit 140 to disconnect the first transmission path P1 (step S38).

Here, step S31 is substantially the same as step S11 and step S21. Step S32 is substantially the same as step S12. Step S33 is substantially the same as step S22. Step S34 is substantially the same as step S23. Step S35 is substantially the same as step S14 and step S24. Also, step S36 is substantially the same as step S13 and step S25. Therefore, detailed implementation aspects are not described in detail.

It is noted that since the firmware (stored in the flash memory 160) of the virus protection chip 100 is separated from the execution memory (i.e., the random access memory 150) by hardware, the flash memory 160 is not infected by virus, so the virus protection chip 100 is not vulnerable to virus attack. In particular, since the virus-protection chip 100 does not have a so-called boot sector, it is more resistant to boot viruses. In addition, even if the data in the random access memory 150 is damaged by virus tampering, the virus-protection chip 100 can return to the original security state as long as the power supply is powered up again.

In summary, embodiments of the present invention provide a virus protection chip and a virus protection method, which utilize the virus protection chip coupled between a connection port of an electronic device and a system circuit to block an external device from being directly connected to the system circuit through the connection port, and only after confirming that no virus exists in the external device and/or confirming that no virus exists in the electronic device, bridge the external device to the electronic device, so that the electronic device and/or the external device can be protected from viruses.

The embodiments of the present invention are disclosed in the above description, but not limited to the scope of the invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of the invention, therefore, the scope of the invention should be determined by the appended claims.