阅读说明：本技术 一种像素电路及显示装置 (Pixel circuit and display device ) 是由 刘炳麟 张皓东 钱栋 于 2018-07-10 设计创作，主要内容包括：本发明涉及一种像素电路及显示装置,所述像素电路包括：像素单元,所述像素单元包括：工作电流生成模块,具有栅极电压端和漏极电压端,所述工作电流生成模块适于根据所述栅极电压端的电压生成工作电流；发光控制模块,与所述工作电流生成模块串联,适于根据发光控制信号控制是否将所述工作电流提供至发光器件；驱动控制电路,所述驱动控制电路包括：反馈模块,接收第一输入电压和数据电流,适于提供所述栅极电压端和漏极电压端之间的反馈回路；数据电流模块,适于提供所述数据电流。本发明技术方案可以在不付出很大直流电流代价的情况下,快速建立栅极电压端的电压。(The invention relates to a pixel circuit and a display device, wherein the pixel circuit comprises: a pixel unit including: the working current generation module is provided with a grid voltage end and a drain voltage end and is suitable for generating working current according to the voltage of the grid voltage end; the light-emitting control module is connected with the working current generation module in series and is suitable for controlling whether the working current is supplied to the light-emitting device or not according to a light-emitting control signal; a drive control circuit, the drive control circuit comprising: the feedback module receives a first input voltage and a data current and is suitable for providing a feedback loop between the grid voltage end and the drain voltage end; a data current module adapted to provide the data current. According to the technical scheme, the voltage of the grid voltage end can be quickly established without paying a large direct current cost.)

1. A pixel circuit, comprising:

a pixel unit including:

the working current generation module is provided with a grid voltage end and a drain voltage end and is suitable for generating working current according to the voltage of the grid voltage end;

a light emission control module connected in series with the operating current generation module, the light emission control module being adapted to control whether the operating current is supplied to a light emitting device according to a light emission control signal;

a drive control circuit, the drive control circuit comprising:

a feedback module receiving a first input voltage and a data current, the feedback module adapted to provide a feedback loop between the gate voltage terminal and the drain voltage terminal;

a data current module adapted to provide the data current.

2. The pixel circuit according to claim 1, wherein the data current module is connected to a data voltage terminal, and the data current module is adapted to generate the data current according to a voltage of the data voltage terminal, or receive the data current from the outside and provide the data current to the feedback module.

3. The pixel circuit according to claim 2, wherein the data current block comprises an operational amplifier and a resistor, a first input terminal of the operational amplifier is connected to the data voltage terminal, a second input terminal of the operational amplifier is connected to an output terminal of the operational amplifier, an output terminal of the operational amplifier is connected to a first terminal of the resistor, and a second terminal of the resistor is connected to the drain voltage terminal.

4. The pixel circuit according to claim 2, further comprising a brightness adjustment module adapted to compare a voltage of the drain voltage terminal with a predetermined voltage and output a compensation control signal, wherein the compensation control signal controls the data voltage terminal to receive different data voltages.

5. The pixel circuit according to claim 4, wherein the brightness adjustment module comprises: a first input end of the comparator receives the preset voltage, a second input end of the comparator is connected with the drain voltage end, and an output end of the comparator outputs the compensation control signal;

the first input end of the gating switch receives the first data voltage, the second input end of the gating switch receives the second data voltage, the output end of the gating switch is connected with the data voltage end, and the control end of the gating switch receives the compensation control signal.

6. The pixel circuit according to claim 1, wherein the operating current generating module comprises:

the control end of the driving module is connected with the grid voltage end through a first gating module, the driving module is suitable for generating working current according to the voltage of the control end, and the first gating module is switched on or switched off under the control of a first gating control signal;

the output end of the driving module is connected with the drain voltage end through the second gating module, and the second gating module is switched on or switched off under the control of a second gating control signal;

the voltage maintaining module is used for maintaining the voltage of the control end of the driving module when the first gating module is switched off.

7. The pixel circuit according to claim 6, wherein the driving module comprises a first transistor, a source of the first transistor is connected to a power supply, a gate of the first transistor is a control terminal of the driving module, and a drain of the first transistor is an output terminal of the driving module.

8. The pixel circuit according to claim 6, wherein the first gating module comprises a second transistor, a gate of the second transistor receives the first gating control signal, a source of the second transistor is connected to the control terminal of the driving module, and a drain of the second transistor is connected to the gate voltage terminal.

9. The pixel circuit according to claim 6, wherein the second gating module comprises a third transistor, a gate of the third transistor receives the second gating control signal, a drain of the third transistor is connected to the drain voltage terminal, and a source of the third transistor is connected to the output terminal of the driving module.

10. The pixel circuit according to claim 6, wherein the voltage holding module comprises a capacitor, a first plate of the capacitor is connected to the control terminal of the driving module, and a second plate of the capacitor is connected to a reference voltage terminal.

11. The pixel circuit according to claim 10, further comprising a brightness adjustment module adapted to compare a voltage of the drain voltage terminal with a predetermined voltage and output a compensation control signal, wherein the compensation control signal controls the reference voltage terminal to receive different reference voltages.

12. The pixel circuit according to claim 11, wherein the brightness adjustment module comprises: a first input end of the comparator receives the preset voltage, a second input end of the comparator is connected with the drain voltage end, and an output end of the comparator outputs the compensation control signal;

the first input end of the gating switch receives a first reference voltage, the second input end of the gating switch receives a second reference voltage, the output end of the gating switch is connected with the reference voltage end, and the control end of the gating switch receives the compensation control signal.

13. The pixel circuit according to claim 1, wherein the light emission control module comprises a fourth transistor, a gate of the fourth transistor receives the light emission control signal, a drain of the fourth transistor is connected to the output terminal of the operating current generation module, and a source of the fourth transistor is connected to the light emitting device.

14. The pixel circuit of claim 1, wherein the feedback module comprises a voltage buffer, a first input terminal of the voltage buffer is connected to the drain voltage terminal and to the output terminal of the data current module, a second input terminal of the voltage buffer receives a first input voltage, and an output terminal of the voltage buffer is connected to the gate voltage terminal.

15. The pixel circuit according to claim 1, further comprising: a gate of the fifth transistor receives a reset control signal, a source of the fifth transistor receives a reset voltage, and a drain of the fifth transistor is connected to the drain voltage terminal.

16. A display device comprising the pixel circuit according to any one of claims 1 to 15.

Technical Field

The invention relates to the technical field of display panels, in particular to a pixel circuit and a display device.

Background

An organic electroluminescent device (OLED) is an all-solid device that directly converts electrical energy into optical energy, and has the advantages of thinness, lightness, high contrast, fast response, wide viewing angle, wide operating temperature range, and the like, so that the OLED attracts great attention in the industry and is considered as a new generation display device. In order to realize the large-scale industrialization of the organic light emitting diode, the light emitting efficiency and stability of the organic light emitting diode are required to be improved, and an effective pixel circuit is required to be designed.

The existing pixel circuit is generally divided into a voltage type pixel circuit and a current type pixel circuit, and for the current type pixel circuit, the threshold voltage drift and the channel mobility of a driving transistor can be effectively compensated, but the current type pixel circuit has the problem that the gate voltage setup time of the driving transistor is too slow, so that the gate voltage of the driving transistor cannot quickly follow a data current signal within microsecond-level scanning time of a row of pixels, which affects the setup of the working current of a light emitting device in the pixel circuit.

Disclosure of Invention

The technical problem solved by the invention is how to quickly establish the voltage for generating the operating current of the light emitting device in the current mode pixel circuit.

To solve the above technical problem, an embodiment of the present invention provides a pixel circuit, including: a pixel unit including: the working current generation module is provided with a grid voltage end and a drain voltage end and is suitable for generating working current according to the voltage of the grid voltage end; a light emission control module connected in series with the operating current generation module, the light emission control module being adapted to control whether the operating current is supplied to a light emitting device according to a light emission control signal; a drive control circuit, the drive control circuit comprising: a feedback module receiving a first input voltage and a data current, the feedback module adapted to provide a feedback loop between the gate voltage terminal and the drain voltage terminal; a data current module adapted to provide the data current.

Optionally, the data current module is connected to a data voltage terminal, and the data current module is adapted to generate the data current according to a voltage of the data voltage terminal, or the data current module receives the data current from the outside and provides the data current to the feedback module.

Optionally, the data current module includes an operational amplifier and a resistor, a first input terminal of the operational amplifier is connected to the data voltage terminal, a second input terminal of the operational amplifier is connected to an output terminal of the operational amplifier, an output terminal of the operational amplifier is connected to a first terminal of the resistor, and a second terminal of the resistor is connected to the drain voltage terminal.

Optionally, the pixel circuit further includes a brightness adjustment module, where the brightness adjustment module is adapted to compare the voltage at the drain voltage terminal with a preset voltage and output a compensation control signal, and the compensation control signal controls the data voltage terminal to receive different data voltages.

Optionally, the brightness adjusting module includes: a first input end of the comparator receives the preset voltage, a second input end of the comparator is connected with the drain voltage end, and an output end of the comparator outputs the compensation control signal; the first input end of the gating switch receives the first data voltage, the second input end of the gating switch receives the second data voltage, the output end of the gating switch is connected with the data voltage end, and the control end of the gating switch receives the compensation control signal.

Optionally, the operating current generating module includes: the control end of the driving module is connected with the grid voltage end through a first gating module, the driving module is suitable for generating working current according to the voltage of the control end, and the first gating module is switched on or switched off under the control of a first gating control signal; the output end of the driving module is connected with the drain voltage end through the second gating module, and the second gating module is switched on or switched off under the control of a second gating control signal; the voltage maintaining module is used for maintaining the voltage of the control end of the driving module when the first gating module is switched off.

Optionally, the driving module includes a first transistor, a source of the first transistor is connected to a power supply, a gate of the first transistor is a control end of the driving module, and a drain of the first transistor is an output end of the driving module.

Optionally, the first gating module includes a second transistor, a gate of the second transistor receives the first gating control signal, a source of the second transistor is connected to the control end of the driving module, and a drain of the second transistor is connected to the gate voltage end.

Optionally, the second gating module includes a third transistor, a gate of the third transistor receives the second gating control signal, a drain of the third transistor is connected to the drain voltage terminal, and a source of the third transistor is connected to the output terminal of the driving module.

Optionally, the voltage holding module includes a capacitor, a first plate of the capacitor is connected to the control end of the driving module, and a second plate of the capacitor is connected to the reference voltage end.

Optionally, the pixel circuit further includes a brightness adjustment module, where the brightness adjustment module is adapted to compare the voltage of the drain voltage terminal with a preset voltage and output a compensation control signal, and the compensation control signal controls the reference voltage terminal to receive different reference voltages.

Optionally, the brightness adjusting module includes: a first input end of the comparator receives the preset voltage, a second input end of the comparator is connected with the drain voltage end, and an output end of the comparator outputs the compensation control signal; the first input end of the gating switch receives a first reference voltage, the second input end of the gating switch receives a second reference voltage, the output end of the gating switch is connected with the reference voltage end, and the control end of the gating switch receives the compensation control signal.

Optionally, the light-emitting control module includes a fourth transistor, a gate of the fourth transistor receives the light-emitting control signal, a drain of the fourth transistor is connected to the output terminal of the operating current generating module, and a source of the fourth transistor is connected to the light-emitting device.

Optionally, the feedback module includes a voltage buffer, a first input terminal of the voltage buffer is connected to the drain voltage terminal and is connected to the output terminal of the data current module, a second input terminal of the voltage buffer receives the first input voltage, and an output terminal of the voltage buffer is connected to the gate voltage terminal.

Optionally, the pixel circuit further includes: a gate of the fifth transistor receives a reset control signal, a source of the fifth transistor receives a reset voltage, and a drain of the fifth transistor is connected to the drain voltage terminal.

In order to solve the above technical problem, an embodiment of the present invention further discloses a display device, which includes the pixel circuit.

Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:

the pixel circuit of the technical scheme of the invention comprises a pixel unit, wherein the pixel unit comprises: the working current generation module is provided with a grid voltage end and a drain voltage end and is suitable for generating working current according to the voltage of the grid voltage end; a light emission control module connected in series with the operating current generation module, the light emission control module being adapted to control whether the operating current is supplied to a light emitting device according to a light emission control signal; the pixel circuit further includes a drive control circuit including: a feedback module receiving a first input voltage and a data current, the feedback module adapted to provide a feedback loop between the gate voltage terminal and the drain voltage terminal; a data current module adapted to provide the data current. Thus, the voltage at the gate voltage terminal can be quickly and built up through the feedback loop without a large dc current penalty.

Further, the pixel circuit in the technical scheme of the present invention further includes a brightness adjusting module, wherein the brightness adjusting module is adapted to compare the voltage at the drain voltage terminal with a preset voltage and output a compensation control signal, and the compensation control signal controls the data voltage terminal to receive different data voltages or controls the reference voltage terminal to receive different reference voltages. Therefore, the working current can be compensated in time to avoid or reduce the problem of brightness dimming caused by the aging of the light-emitting device.

Furthermore, the pixel circuit in the technical solution of the present invention further includes a fifth transistor, a gate of the fifth transistor receives a reset control signal, a source of the fifth transistor receives a reset voltage, and a drain of the fifth transistor is connected to the drain voltage terminal. Therefore, the related devices of the pixel circuit can be reset after the display of the previous frame signal is finished, and the influence of the previous frame signal on the next frame signal is effectively reduced.

Further, the pixel circuit in the technical scheme of the present invention further includes a data current module, where the data current module includes an operational amplifier and a resistor, a first input end of the operational amplifier is connected to the data voltage terminal, a second input end of the operational amplifier is connected to an output end of the operational amplifier, an output end of the operational amplifier is connected to a first end of the resistor, and a second end of the resistor is connected to the drain voltage terminal. Therefore, the operational amplifier receives the data voltage, and the negative feedback loop of the operational amplifier reduces the influence of data voltage jitter, so that the output data current is more stable.

Drawings

FIG. 1 is a schematic diagram of a pixel circuit in the prior art;

FIG. 2 is a timing diagram illustrating operation of a pixel circuit according to the prior art;

FIG. 3 is a schematic structural diagram of a pixel circuit according to an embodiment of the invention;

FIG. 4 is a timing diagram illustrating operation of a pixel circuit according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of another pixel circuit according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of a pixel circuit according to yet another embodiment of the invention.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, a detailed description of the prior art and a specific embodiment thereof will be provided below with reference to the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, belong to the scope of the present invention.

Fig. 1 is a schematic structural diagram of a pixel circuit in the prior art. Fig. 2 is an operation timing diagram of a pixel circuit in the prior art.

Referring to fig. 1 and 2, a pixel circuit in the prior art includes a first transistor P1, a second transistor P2, a third transistor P3, a fourth transistor P4, a capacitor Cst, and a light emitting device OLED, wherein a source of the first transistor P1 is connected to an ELVDD, a drain of the first transistor P1 is connected to a drain of the fourth transistor P4, a source of the fourth transistor P4 is connected to an anode of the light emitting device OLED, a cathode of the light emitting device OLED is grounded to ELVSS, a first plate of the capacitor Cst is connected to a gate of the first transistor P1, and a second plate of the capacitor Cst is connected to a reference voltage terminal REF.

In the reset phase, the anode of the light emitting device OLED and the gate of the first transistor P1 receive a reset voltage (not shown), and the reset of the light emitting device OLED and the first transistor P1 is completed to eliminate the influence of the previous frame signal on the next frame signal.

In the write data phase, the gate control signal WS is set to a low level and the emission control signal EMIT is set to a high level. The gate voltage terminal g 'receives the DATA current I _ DATA, and the gate of the first transistor P1 is connected to the gate voltage terminal g' through the second transistor P2. At this time, since the second transistor P2 and the third transistor P3 are turned on, the fourth transistor P4 is turned off, the gate voltage Vg of the first transistor P1 is equal to the voltage Vg 'of the gate voltage terminal g', the voltage Vd 'of the drain voltage terminal d' is equal to the drain voltage Vd of the first transistor P1, and the gate voltage terminal g 'and the drain voltage terminal d' are connected together, the connection mode of the first transistor P1 is equal to the connection mode of the diode. If the time is sufficient, the current I _ DATA will pull down the voltage Vg 'of the gate voltage terminal g' to a voltage corresponding to the DATA current I _ DATA, i.e. the gate voltage Vg of the first transistor P1 is also pulled down to a voltage corresponding to the DATA current I _ DATA.

Subsequently, the gate control signal WS is set to a low level, the second transistor P2 is turned off, and the gate voltage Vg of the first transistor P1 is maintained by the capacitor Cst.

In the light emitting stage, the gate control signal WS is set to a high level, the light emitting control signal EMIT is set to a low level, the second transistor P2 and the third transistor P3 are turned off, the fourth transistor P4 is turned on, the working current corresponding to the gate voltage Vg of the first transistor P1 held by the capacitor Cst flows to the light emitting device OLED, and the light emitting device OLED EMITs light.

In the DATA writing phase, since a row of pixels has only microsecond scanning time, that is, each time DATA is written, the turn-on time of the second transistor P2 and the third transistor P3 is only several microseconds, in the working time of the several microseconds, the DATA current I _ DATA cannot completely pull down the voltage Vg 'of the gate voltage terminal g' to the voltage corresponding to the DATA current I _ DATA, nor pull down the gate voltage Vg of the first transistor P1 to the voltage corresponding to the DATA current I _ DATA, which results in that the luminance of the light emitting device OLED is not the luminance corresponding to the DATA current I _ DATA in the subsequent light emitting phase.

According to the technical scheme, the feedback module is arranged in the pixel circuit and is suitable for providing the feedback loop between the grid voltage end and the drain voltage end, the voltage of the grid voltage end can be pulled down to the voltage value corresponding to the data current through the feedback loop under the condition of not paying large direct current cost, and the voltage of the grid voltage end and the voltage of the light-emitting device can be quickly and separately established.

Fig. 3 is a schematic structural diagram of a pixel circuit according to an embodiment of the invention.

Referring to fig. 3, the pixel circuit may include a pixel unit, and the pixel unit may include: the working current generation module 1 is provided with a grid voltage end g 'and a drain voltage end d', and the working current generation module 1 is suitable for generating working current according to the voltage Vg 'of the grid voltage end g'; and the light emitting control module 2 is connected with the working current generating module 1 in series, and the light emitting control module 2 is suitable for controlling whether the working current is provided to the light emitting device OLED or not according to a light emitting control signal EMIT.

The pixel circuit may further include a drive control circuit, and the drive control circuit may include: a feedback module 3 receiving a first input voltage VINT1 and a DATA current I _ DATA, the feedback module 3 being adapted to provide a feedback loop between the gate voltage terminal g 'and the drain voltage terminal d'; a DATA current module 4, said DATA current module 4 being adapted to provide said DATA current I _ DATA.

Further, the gate voltage terminal g 'and the drain voltage terminal d' may be connection ports for signal interaction of the pixel unit and other components in the whole pixel circuit.

In one non-limiting example, the DATA current module 4 may receive the DATA current I _ DATA from the outside and provide it to the feedback module 3. The DATA current module 4 may filter the DATA current I _ DATA directly provided from the outside to reduce the current ripple in the DATA current I _ DATA.

In another non-limiting example, the DATA current module 4 may be connected to a DATA voltage terminal s ', and the DATA current module 4 may generate the DATA current I _ DATA according to a voltage of the DATA voltage terminal s'. Hereinafter, the present application will be described in detail by taking an example that the DATA current module 4 generates the DATA current I _ DATA according to the voltage of the DATA voltage terminal s'.

Further, the DATA current module 4 may include an operational amplifier 401 and a resistor R, a first input terminal of the operational amplifier 401 is connected to the DATA voltage terminal s ' and receives the DATA voltage V _ DATA through the DATA voltage terminal s ', a second input terminal of the operational amplifier 401 is connected to an output terminal of the operational amplifier 401, an output terminal of the operational amplifier 401 is connected to a first terminal of the resistor R, and a second terminal of the resistor R is connected to the drain voltage terminal d '.

Specifically, the first input terminal of the operational amplifier 401 may be a positive input terminal, and the second input terminal of the operational amplifier 401 may be a negative input terminal; the resistor R can be a fixed resistor or a variable resistor, and the resistance value of the resistor R can be set according to specific application occasions.

Specifically, the light emission control signal EMIT may be a level signal, for example: when the light emitting control signal EMIT is at a low level, the light emitting control module 2 can be controlled to be turned on; when the light emission control signal EMIT is at a high level, the light emission control module 2 may be controlled to be turned off.

In particular, the light emitting device OLED may be a light emitting diode. The anode of the light emitting diode may be connected to the light emitting control module 2, and the cathode of the light emitting diode may be grounded ELVSS.

More specifically, the light emitting diode may be an organic electroluminescent diode.

It should be noted that the pixel circuit of the embodiment of the present invention may be used to supply power to various light emitting devices, and the embodiment of the present invention does not limit the types of the light emitting devices OLED.

Further, the operating current generating module 1 may include: a driving module 103, a control terminal of the driving module 103 is connected to the gate voltage terminal g' via a first gating module 102, and is adapted to generate a working current according to a voltage of the control terminal, and the first gating module 102 is turned on or off under the control of a first gating control signal WS 1; a second gating module 104, wherein an output terminal of the driving module 103 is connected to the drain voltage terminal d' via the second gating module 104, and the second gating module 104 is turned on or off under the control of a second gating control signal WS 2; a voltage holding module 101, wherein the voltage holding module 101 is used for holding the voltage of the control terminal of the driving module 103 when the first gating module 102 is turned off.

Further, the driving module 103 may include a first transistor P1, a source of the first transistor P1 may be connected to a power supply ELVDD, a gate of the first transistor P1 may serve as a control terminal of the driving module 103, and a drain of the first transistor P1 may serve as an output terminal of the driving module 103.

Further, the first gate module 102 may include a second transistor P2, a gate of the second transistor P2 receives the first gate control signal WS1, a source of the second transistor P2 is connected to the control terminal of the driving module 103, and a drain of the second transistor P2 is connected to the gate voltage terminal g'. The second gate module 104 may include a third transistor P3, a gate of the third transistor P3 may receive the second gate control signal WS2, a drain of the third transistor P3 is connected to the drain voltage terminal d', and a source of the third transistor P3 is connected to the output terminal of the driving module 103.

Specifically, the first and second gate control signals WS1 and WS2 may be level signals, such as: when the first gate control signal WS1 and/or the second gate control signal WS2 are at a low level, the second transistor P2 and/or the third transistor P3 may be controlled to be turned on; when the first gate control signal WS1 and/or the second gate control signal WS2 are at a high level, the second transistor P2 and/or the third transistor P3 may be controlled to be turned off.

Further, the voltage maintaining module 101 may include a capacitor Cst, a first plate of the capacitor Cst being connected to the control terminal of the driving module 103, and a second plate of the capacitor Cst being connected to the reference voltage terminal REF. After the control terminal voltage of the driving module 103 is established, the capacitor Cst is used to maintain the control terminal voltage of the driving module 103.

Further, the reference voltage VREF received by the reference voltage terminal REF may be a Direct Current (DC) voltage or an Alternating Current (AC) voltage.

Further, the light emission control module 2 may include a fourth transistor P4, a gate of the fourth transistor P4 receives the light emission control signal EMIT, a drain of the fourth transistor P4 is connected to the output terminal of the operating current generating module 1, and a source of the fourth transistor P4 is connected to the light emitting device OLED. Specifically, the output end of the working current generating module 1 is a port for outputting the working current.

Specifically, the light emission control signal EMIT may be a level signal, for example: when the light emission control signal EMIT is at a low level, the fourth transistor P4 may be controlled to be turned on; when the light emission control signal EMIT is at a high level, the fourth transistor P4 may be controlled to be turned off.

Further, the feedback module 3 may include a voltage buffer 301, a first input terminal of the voltage buffer 301 is connected to the drain voltage terminal d 'and to the output terminal of the data current module 4, a second input terminal of the voltage buffer 301 receives a first input voltage VINT1, and an output terminal of the voltage buffer 301 is connected to the gate voltage terminal g'.

Further, the voltage buffer 301 may be a first operational amplifier. Accordingly, the first input terminal of the voltage buffer 301 may be a positive input terminal of the first operational amplifier, and the second input terminal of the voltage buffer 301 may be a negative input terminal of the first operational amplifier.

Further, the pixel circuit may further include a fifth transistor P5, the gate of the fifth transistor P5 receives the reset control signal CT, the source of the fifth transistor P5 receives the reset voltage Vf, and the drain of the fifth transistor P5 is connected to the drain voltage terminal d'.

Specifically, the reset control signal CT may be a level signal, such as: when the reset control signal CT is at a low level, the fifth transistor P5 may be controlled to be turned on; when the reset control signal CT is high, the fifth transistor P5 can be controlled to be turned off.

Further, the reset voltage Vf may be smaller than the turn-on voltage of the light emitting device OLED, so as to ensure that the light emitting device OLED is not turned on by mistake in the reset stage.

The operation phase of the pixel circuit may include three main phases, please refer to fig. 3 and fig. 4, wherein fig. 4 is an operation timing diagram of a pixel circuit according to an embodiment of the invention.

In the reset phase, the first gate control signal WS1 is set to a low level, the second gate control signal WS2 is set to a low level, the emission control signal EMIT is set to a low level, the reset control signal CT is set to a low level, the voltage buffer 301 is in an off (power-off) state, and the voltage at the output terminal of the voltage buffer 301 is set to a high level.

Further, in order to realize that the voltage at the output terminal of the voltage buffer 301 is at a high level during the reset phase, the output terminal of the voltage buffer 301 may be connected to the power supply ELVDD or another power supply terminal (not shown) through a switching device.

In the reset phase, the second transistor P2, the third transistor P3, the fourth transistor P4, and the fifth transistor P5 are turned on. Since the second transistor P2 is turned on, the gate voltage Vg of the first transistor P1 is equal to the voltage Vg ' of the gate voltage terminal g ' and is equal to the voltage Vg ' of the output terminal of the voltage buffer 301, and since the voltage Vg of the output terminal of the voltage buffer 301 is set to a high level, the voltage Vg ' of the gate voltage terminal g ' and the gate voltage Vg of the first transistor P1 are also high, i.e., the first transistor P1 is turned off. Since the third transistor P3 and the fifth transistor P5 are turned on, the voltage Vd 'at the drain voltage terminal d' is equal to the drain voltage Vd of the first transistor P1 and is equal to the reset voltage Vf. Since the fourth transistor P4 is turned on, the anode voltage V of the light emitting device₀And also equal to the reset voltage Vf, and setting the reset voltage Vf to be smaller than the turn-on voltage of the light emitting device OLED, so that the light emitting device OLED does not emit light in the reset stage.

The reset operation can eliminate the influence of the display state of the pixel of the previous frame on the display state of the pixel of the next frame.

In the write data phase, the first gate control signal WS1 is set to be at a low level, the second gate control signal WS2 is set to be at a low level, the emission control signal EMIT is at a high level, the reset control signal CT is at a high level, the voltage buffer 301 is in an on (power-on) state, and the output terminal of the voltage buffer 301 no longer receives the high level signal.

In the data writing phase, the second transistor P2 and the third transistor P3 are turned on, the fourth transistor P4 is turned off, and the fifth transistor P5 is turned off. The voltage buffer 301 forms a negative feedback loop with the first transistor P1 and the DATA current I _ DATA inputted by the DATA current module 4. Due to the feedback adjustment of the negative feedback loop, when the negative feedback loop operates stably, the positive voltage and the negative voltage of the voltage buffer 301 are equal and both equal to the first input voltage VINT1 received by the negative electrode, i.e. the voltage buffer 301 is in a virtual short state after the negative feedback loop operates stably. Since the third transistor P3 is turned on, the voltage Vd 'at the drain voltage terminal d' is equal to the drain voltage Vd of the first transistor P1 and is equal to the cathode voltage of the voltage buffer 301. Since the source of the first transistor P1 is directly connected to the power ELVDD, and therefore, the source voltage of the first transistor P1 and the drain voltage Vd of the first transistor P1 are both fixed values, a one-to-one relationship can be established between the gate voltage Vg of the first transistor P1 and the DATA current I _ DATA, and the DATA current I _ DATA can pull down the Vg, which is originally in a high voltage state, to a low voltage state corresponding to the DATA current I _ DATA, at which time, the control of the luminance of the light emitting device OLED by the DATA current I _ DATA is converted into the control of the luminance of the light emitting device OLED by the gate voltage Vg of the first transistor P1.

Further, the time required for the gate voltage Vg of the first transistor P1 to be pulled down to the low voltage state corresponding to the DATA current I _ DATA depends on the gain-bandwidth product and the slew rate of the voltage buffer 301. The gain-bandwidth product, which is the product of the gain and the bandwidth of the voltage buffer 301, is a parameter used to measure the performance of the voltage buffer 301. The larger the gain-bandwidth product, the faster the feedback loop in which the voltage buffer 301 is adjusted to a steady state, i.e., the shorter the time required for the gate voltage Vg of the first transistor P1 to be pulled down to a low voltage state corresponding to the DATA current I _ DATA. The slew rate refers to a slew rate of the output voltage of the voltage buffer 301, which is a parameter for measuring the speed of the voltage buffer 301, and the higher the slew rate is, the faster the speed of the feedback loop in which the voltage buffer 301 is adjusted to the steady state is, i.e., the shorter the time required for the control voltage Vg of the first transistor P1 to be pulled down to the low voltage state corresponding to the DATA current I _ DATA is.

In a specific application, the time required for the gate voltage Vg of the first transistor P1 to be pulled down to the low voltage state corresponding to the DATA current I _ DATA can be shortened by increasing the gain-bandwidth product and the slew rate of the voltage buffer 301.

In the light-emitting period, the first gate control signal WS1 is set to high level, the second gate control signal WS2 is set to high level, the light-emitting control signal EMIT is set to low level, the reset control signal CT is set to low level, and the voltage buffer 301 is set to off (power-off) state.

In the light emitting stage, the second transistor P2, the third transistor P3, the fifth transistor P5 are turned off, and the fourth transistor P4 is turned on. Since the second transistor P2 is turned off, the gate voltage Vg of the first transistor P1 is held by the capacitor Cst. Since the fourth transistor P4 is turned on, the working current corresponding to the gate voltage Vg of the first transistor P1 flows to the light emitting device OLED through the fourth transistor P4 to drive the light emitting device OLED to emit light, and since Vg is in a voltage state corresponding to the DATA current I _ DATA at this time, the light emitting brightness of the light emitting device is actually determined by the DATA current I _ DATA.

The light-emitting device OLED can be aged after working for a certain time, and for the same working current, the brightness of the aged light-emitting device OLED can be darkened under the same condition, and the anode voltage V of the aged light-emitting device OLED is simultaneously₀Will rise accordingly.

Fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention. The pixel circuit can compensate the brightness of the light emitting device OLED and improve the condition of brightness dimming in time after the light emitting device OLED is aged.

Referring to fig. 5, in one non-limiting embodiment, the pixel circuit may include a pixel unit, a driving control circuit, and a brightness adjusting module 5. The structures and the operating principles of the pixel units and the driving control circuits can be referred to in fig. 3 and fig. 4 for the description of the pixel circuits, which are not repeated herein.

The brightness adjusting module 5 is adapted to compare the voltage Vd ' of the drain voltage terminal d ' with a preset voltage VINT2 and output a compensation control signal, wherein the compensation control signal controls the data voltage terminal s ' to receive different data voltages.

Further, the brightness adjusting module 5 may include: a comparator 502, a first input terminal of the comparator 502 receiving the preset voltage VINT2, a second input terminal of the comparator 502 being connected to the drain voltage terminal d', an output terminal of the comparator 502 outputting the compensation control signal; the gate switch 501 has a first input terminal receiving the first DATA voltage V _ DATA1, a second input terminal receiving the second DATA voltage V _ DATA2, and an output terminal connected to the DATA voltage terminal s', and a control terminal receiving the compensation control signal. The comparator 502 is preferably a hysteresis comparator.

Further, the first DATA voltage V _ DATA1 may not be equal to the second DATA voltage V _ DATA2, such as: the first DATA voltage V _ DATA1 may be less than the second DATA voltage V _ DATA 2.

Furthermore, the first DATA voltage V _ DATA1 and the second DATA voltage V _ DATA2 may be voltages with fixed voltage values or voltages with adjustable voltage values to adapt to various aging conditions of the light emitting device OLED, and those skilled in the art can adaptively set the voltage values of the first DATA voltage V _ DATA1 and the second DATA voltage V _ DATA2 according to specific needs and applications, which is not limited in the embodiments of the present invention.

Further, the first input terminal of the comparator 502 may be a positive input terminal of the comparator 502, and the second input terminal of the comparator 502 may be a negative input terminal of the comparator 502.

In the specific implementation, the anode voltage V of the OLED during normal light emission is collected₀The preset voltage VINT2 at the positive input terminal of the comparator 502 is adjusted to be equal to the anode voltage V of the light emitting device OLED₀Are equal. After the light emitting device OLED is used for a period of time, if the light emitting device OLED is aged, the anode voltage V of the light emitting device OLED₀The aged anode voltage of the light emitting device OLED is fed back to the cathode of the comparator 502 through the drain voltage terminal d', and the output terminal of the comparator 502 outputs the compensation control signal. In particular, the compensation control signal may be a level jump signal.

Next, the control terminal of the gate switch 501 receives the compensation control signal, the gate switch 501 is triggered, the smaller first DATA voltage V _ DATA1 is connected to the DATA voltage terminal s', the smaller first DATA voltage V _ DATA1 translates into a smaller DATA current I _ DATA, the smaller DATA current I _ DATA further pulls down the voltage Vg 'of the gate voltage terminal g' and the gate voltage Vg of the first transistor P1 through the feedback loop, since the source of the first transistor P1 is connected to the power supply ELVDD, that is, the source voltage of the first transistor P1 is a constant value, if the gate voltage Vg of the first transistor P1 decreases, it causes the voltage difference between the source voltage and the gate voltage Vg of the first transistor P1 to become large, and then the working current flowing through the light-emitting device OLED is increased, and the brightness of the light-emitting device OLED is improved, so that the problem that the light-emitting device OLED is dark due to self aging can be solved.

Fig. 6 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention. The pixel circuit can compensate the brightness of the light emitting device OLED and improve the problem of brightness dimming in time after the light emitting device OLED is aged.

Referring to fig. 6, in another non-limiting embodiment, the pixel circuit may include a pixel unit, a driving control circuit, and a brightness adjusting module 5. The structures and the working principles of the pixel unit and the driving control circuit can be referred to the description of the pixel circuit in fig. 3 and 4, and are not repeated herein.

The brightness adjusting module 5 is adapted to compare the voltage Vd 'of the drain voltage terminal d' with a preset voltage VINT2 and output a compensation control signal, wherein the compensation control signal controls the reference voltage terminal REF to receive different reference voltages.

Further, the brightness adjusting module 5 may include: a comparator 502, a first input terminal of the comparator 502 receiving the preset voltage VINT2, a second input terminal of the comparator 502 being connected to the drain voltage terminal d', an output terminal of the comparator 502 outputting the compensation control signal; the gate switch 501 has a first input terminal receiving a first reference voltage VREF1, a second input terminal receiving a second reference voltage VREF2, an output terminal connected to the reference voltage terminal REF, and a control terminal receiving the compensation control signal. The comparator 502 is preferably a hysteresis comparator.

Further, the first reference voltage VREF1 may not be equal to the second reference voltage VREF2, e.g., the first reference voltage VREF1 may be less than the second reference voltage VREF 2.

Furthermore, the first reference voltage VREF1 and the second reference voltage VREF2 may be voltages with fixed voltage values or voltages with adjustable voltage values to adapt to various aging conditions of the light emitting device OLED, and those skilled in the art may adaptively set the voltage values of the first reference voltage VREF1 and the second reference voltage VREF2 according to specific needs and application occasions, which is not limited in the embodiment of the invention.

Further, the first input terminal of the comparator 502 may be a positive input terminal of the comparator 502, and the second input terminal of the comparator 502 may be a negative input terminal of the comparator 502.

In the specific implementation, the anode voltage V of the OLED during normal light emission is collected₀The preset voltage VINT2 of the anode of the comparator 502 is adjusted to be equal to the anode voltage V₀Are equal. After the light emitting device OLED is used for a period of time, if the light emitting device OLED is aged, the anode voltage V of the light emitting device OLED₀The increased anode voltage of the aged light emitting device OLED is fed back to the cathode of the comparator 502 through the drain voltage terminal d', and the output terminal of the comparator 502 outputs the compensation control signal. In particular, the compensation control signal may be a level jump signal.

Next, the control end of the gate switch 501 receives the compensation control signal, the gate switch 501 is triggered, and a first reference voltage VREF1 with a smaller value is applied to the reference voltage end REF, at this time, the voltage of the second plate of the capacitor Cst is decreased, and due to the conservation of charge, the voltage of the first plate of the capacitor Cst is also decreased accordingly. Since the gate of the first transistor P1 is connected to the first plate of the capacitor Cst, the gate voltage Vg of the first transistor P1 decreases accordingly. Since the source of the first transistor P1 is connected to the power supply ELVDD, that is, the source voltage of the first transistor P1 is a constant value, if the gate voltage Vg of the first transistor is decreased, the voltage difference between the source voltage and the gate voltage Vg of the first transistor P1 is increased, and thus the operating current flowing through the light emitting device OLED is increased, and the luminance of the light emitting device OLED is increased, so that the light emission dimming of the light emitting device OLED due to its aging can be compensated.

It should be understood by those skilled in the art that compensating for the dimming of the light emitting device OLED due to its aging is not limited to the aforementioned manner of changing the data voltage or changing the reference voltage, and the embodiment of the invention is not limited thereto, as long as the brightness compensation can be achieved by increasing the operating current of the light emitting device OLED.

Further, the embodiment of the invention also discloses a display device which comprises the pixel circuit. Further, the pixel circuit may be any one of the pixel circuits shown in fig. 3, 5, and 6, or any one of the pixel circuits mentioned in the related description of fig. 3, 5, and 6.

Specifically, the display device may be a Liquid Crystal Display (LCD), a Plasma Display Panel (PDP), a Field Emission Display (FED), an electroluminescence display (ECD), an electrochromic display (ECD), a laser display (LPD), or the like.

For a detailed description of the display and the brightness compensation process of the display device using the pixel circuit, reference may be made to the description of the pixel circuit in the embodiment shown in fig. 3 to 6, and details are not repeated here.

In this document, the voltage values of "high level" and "low level" are not particularly limited as long as the voltage value of the high level is higher than the voltage value of the low level. For example, a voltage value of a high level can be recognized as a logic 1, and a voltage value of a low level can be recognized as a logic 0.

Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.