Voltage detector and signal output device

文档序号:1549333 发布日期:2020-01-17 浏览:17次 中文

阅读说明:本技术 电压检测器及信号输出装置 (Voltage detector and signal output device ) 是由 小田康太 杉泽佑树 于 2018-06-01 设计创作,主要内容包括:电压检测器(15)检测蓄电池的正极的电压并输出表示检测到的电压值的检测值。经由第一开关(40)向电阻(R1)的一端施加作为检测对象的对象电压。从电阻(R1)的另一端向输出电路(31)输入电流。输出电路(31)将电阻(R1)的另一端的电压值实质上维持为规定电压值,并将电流值与从电阻(R1)输入的电流的电流值实质上一致的电流向电阻(R2)的一端输出。将电阻(R2)的一端的电压值作为检测值向微机输出。(A voltage detector (15) detects the voltage of the positive electrode of the battery and outputs a detection value representing the detected voltage value. A target voltage to be detected is applied to one end of a resistor (R1) via a first switch (40). A current is input to the output circuit (31) from the other end of the resistor (R1). The output circuit (31) substantially maintains the voltage value at the other end of the resistor (R1) at a predetermined voltage value, and outputs a current having a current value substantially identical to the current value of the current input from the resistor (R1) to one end of the resistor (R2). The voltage value at one end of the resistor (R2) is output to a microcomputer as a detection value.)

1. A voltage detector that detects a voltage and outputs a detection value indicating a detected voltage value, the voltage detector comprising:

a first resistor to which a target voltage to be detected is applied at one end;

an output circuit to which a current is input from the other end of the first resistor and which outputs a current having a current value that matches a current value of the current input from the other end of the first resistor; and

a second resistor to which a current outputted from the output circuit is inputted at one end,

the output circuit maintains a voltage value of the other end of the first resistor at a predetermined voltage value, and outputs a voltage value of one end of the second resistor as the detection value.

2. The voltage detector of claim 1,

the output circuit has:

a PNP type first bipolar transistor, wherein an emitter is connected with the other end of the first resistor, and a collector is connected with one end of the second resistor;

an NPN-type second bipolar transistor having an emitter connected to a base of the first bipolar transistor and a base to which a second predetermined voltage is applied; and

a third resistor having one end connected to the emitter of the second bipolar transistor,

the base of the second bipolar transistor is connected to the collector of the second bipolar transistor.

3. The voltage detector of claim 1,

the output circuit has:

the emitter of the PNP type bipolar transistor is connected with the other end of the first resistor, and the collector of the PNP type bipolar transistor is connected with one end of the second resistor;

a diode having a cathode connected to the base of the bipolar transistor and an anode to which a second predetermined voltage is applied; and

and one end of the third resistor is connected with the cathode of the diode.

4. The voltage detector according to claim 2 or 3,

the voltage detector includes a switch having one end connected to one end of the first resistor,

the object voltage is applied to one end of the first resistor via the switch,

the switch is turned on when the second predetermined voltage is applied, and turned off when the application of the second predetermined voltage is stopped.

5. A signal output device is provided with:

a voltage detector as claimed in any one of claims 1 to 4;

an output unit that outputs a PWM signal; and

and an adjusting unit for adjusting the duty ratio of the PWM signal output by the output unit according to the detection value output by the voltage detector.

Technical Field

The present invention relates to a voltage detector and a signal output device.

The present application claims priority based on japanese application No. 2017-122468 filed on 22/6/2017, and incorporates the entire contents of the description of the japanese application.

Background

Patent document 1 discloses a voltage detector that detects a voltage. The voltage detector has 2 resistors, and applies a target voltage to be detected to one end of one resistor, and the other end of the one resistor is connected to one end of the other resistor, and the other end of the other resistor is grounded.

The 2 resistors divide a voltage to be applied to one end of one resistor, and output a voltage value of the divided voltage to an a (analog)/d (digital) conversion unit as a simulated detection value. In this case, the analog detection value is a voltage value calculated by dividing the voltage value of the target voltage by a predetermined number.

The A/D conversion unit converts an inputted analog detection value into a digital detection value. Various processes are performed based on the detected value of the digital signal converted by the a/D conversion section.

Prior art documents

Patent document

Patent document 1: japanese patent laid-open publication No. 2015-114204

Disclosure of Invention

A voltage detector according to an aspect of the present invention detects a voltage and outputs a detection value indicating a detected voltage value, the voltage detector including: a first resistor to which a target voltage to be detected is applied at one end; an output circuit to which a current is input from the other end of the first resistor and which outputs a current having a current value that matches a current value of the current input from the other end of the first resistor; and a second resistor having one end to which a current output from the output circuit is input, wherein the output circuit maintains a voltage value of the other end of the first resistor at a predetermined voltage value, and outputs the voltage value of the one end of the second resistor as the detection value.

A signal output device according to an aspect of the present invention includes: the aforementioned voltage detector; an output unit that outputs a PWM signal; and an adjusting section for adjusting the duty ratio of the PWM signal outputted from the output section based on the detection value outputted from the voltage detector.

Drawings

Fig. 1 is a block diagram showing a main configuration of a power supply system according to embodiment 1.

Fig. 2 is a flowchart showing the procedure of the duty adjustment process.

Fig. 3 is a circuit diagram of the voltage detector.

Fig. 4 is an explanatory diagram of characteristics of the first transistor and the second transistor.

Fig. 5 is an explanatory diagram of the effect of the voltage detector.

Fig. 6 is a circuit diagram of a voltage detector according to embodiment 2.

Fig. 7 is a block diagram showing a main configuration of a power supply system according to embodiment 3.

Detailed Description

[ problems to be solved by the present disclosure ]

In the conventional voltage detector as described in patent document 1, an input-enabled range of a detection value to an a/D conversion unit is set in advance. The A/D conversion unit selects 1 of N digital voltage values belonging to an input-enabled range as a digital detection value based on the input analog detection value. Thereby, the analog detection value is converted into a digital detection value. N is an integer of 2 or more. The voltage values of the N numbers are set at equal intervals within the input-enabled range. For example, in the case where the input range is from 0V to 5V, the amplitude of 1 scale is represented by 5/(N-1). The a/D conversion unit selects, for example, a digital voltage value closest to the input analog detection value as a digital detection value.

In the conventional voltage detector, the upper limit of the range of variation of the voltage value of the target voltage is 25V, and the input range is assumed to be a range from 0V to 5V. In this case, in the conventional voltage detector, in order to set the analog detection value to a value within an input-enabled range, the 2 resistors output, for example, the following voltage values as the analog detection value: a voltage value calculated by dividing the voltage value of the target voltage by 5.

In this case, the range of the output analog detection value is from 0V to 5V, and is included in the input-enabled range. The voltage value of the target voltage is calculated by multiplying the detection value of the digital signal converted by the A/D converter by 5. In many cases, the analog detection value does not completely match the digital detection value, and an error occurs between the analog detection value and the digital detection value.

When there is an error between the analog detection value and the digital detection value, there is also an error between the voltage value of the calculated target voltage and the voltage value of the actual target voltage. The maximum value of the error in the voltage value of the target voltage is calculated by converting the amplitude of 1 scale of the digital detection value into the amplitude of the voltage value of the target voltage, and is 25/(N-1). The maximum value of the error is the resolution of the voltage detection.

In the configuration of dividing the target voltage, even if the variation range of the voltage value of the target voltage is from 5V to 25V, the lower limit value of the voltage detection range is 0V. Since the upper limit of the voltage detection range must be set to a voltage value equal to or greater than the upper limit of the voltage value variation range of the target voltage, the minimum value of the resolution of voltage detection is calculated by dividing the upper limit of the voltage value variation range of the target voltage by (N-1). Therefore, the structure of dividing the target voltage has a problem of high resolution of voltage detection.

Therefore, an object is to provide a voltage detector capable of adjusting the lower limit of the detection range of the target voltage to a voltage value exceeding 0V, and a signal output device including the voltage detector.

[ Effect of the present disclosure ]

According to the present disclosure, the lower limit value of the detection range of the target voltage can be adjusted to a voltage value exceeding 0V.

[ description of embodiments of the invention ]

First, embodiments of the present invention will be described. At least some of the embodiments described below may be arbitrarily combined.

(1) A voltage detector according to an aspect of the present invention detects a voltage and outputs a detection value indicating a detected voltage value, the voltage detector including: a first resistor to which a target voltage to be detected is applied at one end; an output circuit to which a current is input from the other end of the first resistor and which outputs a current having a current value that matches a current value of the current input from the other end of the first resistor; and a second resistor having one end to which a current output from the output circuit is input, wherein the output circuit maintains a voltage value of the other end of the first resistor at a predetermined voltage value, and outputs the voltage value of the one end of the second resistor as the detection value.

In the above-described embodiment, the value of the current input from the first resistor is represented by ((voltage value of target voltage) - (predetermined voltage value))/(resistance value of the first resistor) because the other end of the first resistor is maintained at the predetermined voltage value. The voltage value of one end of the second resistor is output as a detection value. The current value of the current input from the other end of the first resistor to the output circuit matches the current value of the current input from the output circuit to one end of the second resistor. Therefore, when the other end of the second resistor is grounded, the detected value is represented by ((voltage value of the target voltage) - (predetermined voltage value)) · (resistance value of the second resistor)/(resistance value of the first resistor). "·" denotes a product.

When the voltage value of the target voltage is smaller than the predetermined voltage value, the voltage value of the target voltage is not detected. When the voltage value of the target voltage is a predetermined voltage value, the detection value is 0V. When the voltage value of the target voltage is equal to or greater than the predetermined voltage value, the detection value also increases together with the increase in the voltage value of the target voltage. By adjusting the predetermined voltage value to a voltage value exceeding 0V, the lower limit value of the detection range of the target voltage can be adjusted to a voltage value exceeding 0V.

(2) In the voltage detector according to an aspect of the present invention, the output circuit includes: a PNP type first bipolar transistor, wherein an emitter is connected with the other end of the first resistor, and a collector is connected with one end of the second resistor; an NPN-type second bipolar transistor having an emitter connected to a base of the first bipolar transistor and a base to which a second predetermined voltage is applied; and a third resistor, one end of which is connected with the emitter of the second bipolar transistor, and the base of the second bipolar transistor is connected with the collector of the second bipolar transistor.

In the above-described aspect, the current flows sequentially through the emitter and the base of the first bipolar transistor and the third resistor, and flows sequentially through the base and the emitter of the second bipolar transistor and the third resistor. The difference calculated by subtracting the voltage value between the emitter and the base of the second bipolar transistor from the voltage value between the base and the emitter of the first bipolar transistor is assumed to be substantially 0V or substantially constant regardless of the current value of the current flowing to the third resistor. Here, the voltage value between the base and the emitter of the first bipolar transistor is a voltage value of the emitter with reference to the potential of the base, and the voltage value between the emitter and the base of the second bipolar transistor is a voltage value of the base with reference to the potential of the emitter.

In the output circuit, the voltage value of the other end of the first resistor is a voltage value calculated by adding a difference to the voltage value of the second predetermined voltage. Here, since the difference is substantially 0V or substantially constant, the voltage value of the other end of the first resistor is maintained at a substantially constant value. In the first bipolar transistor, substantially all of the current input from the other end of the first resistor to the emitter is output from the collector to one end of the second resistor. Therefore, the current value of the current input from the other end of the first resistor substantially matches the current value of the current output to the one end of the second resistor.

(3) In the voltage detector according to an aspect of the present invention, the output circuit includes: the emitter of the PNP type bipolar transistor is connected with the other end of the first resistor, and the collector of the PNP type bipolar transistor is connected with one end of the second resistor; a diode having a cathode connected to the base of the bipolar transistor and an anode to which a second predetermined voltage is applied; and a third resistor having one end connected to the cathode of the diode.

In the above-described embodiment, the current flows sequentially through the emitter and the base of the bipolar transistor and the third resistor, and flows sequentially through the diode and the third resistor. The difference calculated by subtracting the forward voltage value of the diode from the voltage value between the base and the emitter of the bipolar transistor is assumed to be substantially 0V or substantially constant, regardless of the current value of the current flowing through the third resistor. Here, the voltage value between the base and the emitter of the bipolar transistor is a voltage value of the emitter with reference to the potential of the base.

In the output circuit, the voltage value of the other end of the first resistor is a voltage value calculated by adding a difference to the voltage value of the second predetermined voltage. Here, since the difference is substantially 0V or substantially constant, the voltage value of the other end of the first resistor is maintained at a substantially constant value. In the bipolar transistor, substantially all of the current input from the other end of the first resistor to the emitter is output from the collector to one end of the second resistor. Therefore, the current value of the current input from the other end of the first resistor substantially matches the current value of the current output to the one end of the second resistor.

(4) A voltage detector according to an aspect of the present invention includes a switch having one end connected to one end of the first resistor, the target voltage being applied to the one end of the first resistor via the switch, the switch being turned on when the second predetermined voltage is applied thereto, and turned off when the application of the second predetermined voltage is stopped.

In the above-described aspect, when the application of the second predetermined voltage is stopped, the switch is turned off, and the current does not flow through the first resistor and the second resistor. Therefore, the power consumed by the first resistor and the second resistor can be suppressed.

(5) A signal output device according to an aspect of the present invention includes: the aforementioned voltage detector; an output unit that outputs a PWM signal; and an adjusting section for adjusting the duty ratio of the PWM signal outputted from the output section based on the detection value outputted from the voltage detector.

In the above-described aspect, the duty ratio of the PWM (Pulse Width Modulation) signal is adjusted according to the detection value output by the voltage detector.

[ details of embodiments of the present invention ]

Specific examples of the power supply system according to the embodiment of the present invention will be described below with reference to the drawings. The present invention is not limited to the above-described examples, and is disclosed by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims.

(embodiment mode 1)

Fig. 1 is a block diagram showing a main configuration of a power supply system 1 according to embodiment 1. The power supply system 1 is preferably mounted on a vehicle, and includes a generator 10, a battery 11, a power supply switch 12, a load 13, a regulator 14, a voltage detector 15, a microcomputer (hereinafter referred to as a "microcomputer") 16, and a switching unit 17. The regulator 14 has an input and an output.

One end of the generator 10 and the positive electrode of the battery 11 are connected to one end of a power supply switch 12. The other end of the power supply switch 12 is connected to one end of a load 13. The other end of the generator 10, the negative electrode of the battery 11, and the other end of the load 13 are grounded. An input terminal of the regulator 14 and a voltage detector 15 are also connected to one end of the power supply switch 12. The output of the regulator 14 is connected to a voltage detector 15 and a microcomputer 16. The voltage detector 15 is also connected to a microcomputer 16. The switching unit 17 is also connected to the microcomputer 16.

The generator 10 generates ac power in conjunction with an engine, not shown, of the vehicle. The generator 10 rectifies the generated ac power into dc power and outputs a dc voltage related to the rectified dc power. When the engine stops operating, the generator 10 also stops operating.

When the generator 10 is operated, the generator 10 supplies electric power to the battery 11. Thereby, the battery 11 is charged.

When the power supply switch 12 is turned on while the generator 10 is operating, the generator 10 supplies electric power to the load 13 in addition to the battery 11.

When the generator 10 stops operating, the battery 11 supplies electric power to the load 13 when the power supply switch 12 is turned on.

When the power supply switch 12 is off, no power is supplied to the load 13.

A power supply signal instructing to supply power to the load 13 and a stop signal instructing to stop the power supply to the load 13 are input to the microcomputer 16 from a device not shown.

When the power supply signal is input, the microcomputer 16 outputs a PWM signal to the switching unit 17. The switching unit 17 alternately switches the power supply switch 12 on and off while the PWM signal is input from the microcomputer 16. Thereby, electric power is supplied from the generator 10 or the battery 11 to the load 13 via the power supply switch 12, and the load 13 operates.

The load 13 is an electric device mounted on the vehicle, and is, for example, an incandescent bulb.

The switching unit 17 periodically switches the power supply switch 12 from off to on or switches the power supply switch 12 from on to off in accordance with the PWM signal input from the microcomputer 16.

The performance of the load 13 depends on the voltage value of the voltage applied to the load 13 and the switching duty ratio of the switching to on and off of the power supply switch 12. The switching duty is a ratio of a period during which the power supply switch 12 is turned on in 1 cycle, and is adjusted to a value exceeding 0 and smaller than 1.

The load 13 is assumed to be an incandescent light bulb. The intensity of the light emitted by an incandescent bulb depends on the average value of the power supplied to the incandescent bulb. The larger the average value of the electric power for a certain period of time, the higher the intensity of the light emitted from the incandescent bulb. The higher the voltage value of the voltage applied to the incandescent bulb, the larger the power value of the electric power supplied to the incandescent bulb. Therefore, the higher the voltage value of the voltage applied to the incandescent bulb, the higher the intensity of light emitted by the incandescent bulb, and the higher the switching duty ratio, the higher the intensity of light emitted by the incandescent bulb.

When the stop signal is input, the microcomputer 16 stops the output of the PWM signal to the switching unit 17. When the output of the PWM signal to the switching unit 17 is stopped, the switching unit 17 switches the power supply switch 12 off, and maintains the power supply switch 12 off until the PWM signal is input. When the power supply switch 12 is off, as described above, no power is supplied to the load 13, and the load 13 stops operating.

The PWM signal is composed of a high level voltage and a low level voltage. When the voltage indicated by the PWM signal is switched from the low-level voltage to the high-level voltage, the switching unit 17 switches the power supply switch 12 from off to on. When the voltage indicated by the PWM signal is switched from the high-level voltage to the low-level voltage, the switching unit 17 switches the power supply switch 12 from on to off.

In the PWM signal, switching from a low-level voltage to a high-level voltage or switching from a high-level voltage to a low-level voltage is periodically performed. The signal duty ratio of the PWM signal is a ratio of a period in which the PWM signal indicates a high-level voltage in 1 cycle, and is adjusted to a value exceeding 0 and less than 1.

When the PWM signal indicates a high level voltage, the power supply switch 12 is turned on, and when the PWM signal indicates a low level voltage, the power supply switch 12 is turned off. Therefore, the signal duty ratio coincides with the switching duty ratio. The microcomputer 16 adjusts the switching duty ratio by adjusting the signal duty ratio.

In the case where the generator 10 is operated, the voltage output from the generator 10 is input to the input terminal of the regulator 14. When the generator 10 stops operating, a voltage is input from the battery 11 to the input terminal of the regulator 14. The regulator 14 generates a predetermined voltage having a voltage value equal to the reference voltage value Vr using the voltage input to the input terminal, and outputs the generated predetermined voltage from the output terminal to the voltage detector 15 and the microcomputer 16. The reference voltage value Vr is a constant value and is set in advance.

When the regulator 14 outputs a predetermined voltage from the output terminal, the voltage detector 15 detects the voltage and the microcomputer 16 operates. When the regulator 14 stops outputting the voltage, the voltage detector 15 does not detect the voltage, and the microcomputer 16 stops operating.

The regulator 14 operates when, for example, an ignition switch of the vehicle is switched from off to on, and stops operating when the ignition switch is switched from on to off.

The voltage detector 15 detects a target voltage, which is a voltage of the positive electrode of the battery 11 with reference to the ground potential. The voltage detector 15 detects the target voltage, and outputs an analog detection value indicating a voltage value of the target voltage to the microcomputer 16. The range in which the detection value can be input to the microcomputer 16 is set in advance, and is, for example, a range from 0V to the reference voltage value Vr. The voltage value of the target voltage corresponds to the voltage value detected by the voltage detector 15.

The microcomputer 16 includes a first input unit 20, a second input unit 21, an output unit 22, an a/D conversion unit 23, a storage unit 24, and a control unit 25. The second input unit 21, the output unit 22, the a/D conversion unit 23, the storage unit 24, and the control unit 25 are connected to a bus 26. The a/D conversion unit 23 is connected to the first input unit 20 in addition to the bus 26. The first input 20 is also connected to the voltage detector 15. The output unit 22 is connected to the switching unit 17 in addition to the bus 26.

The voltage detector 15 inputs the analog detection value to the first input unit 20. The first input unit 20 outputs the analog detection value input from the voltage detector 15 to the a/D conversion unit 23.

The a/D conversion section 23 converts the analog detection value input from the first input section 20 into a digital detection value. Within the input-enabled range, voltage values of N numbers are set at equal intervals. N is an integer of 2 or more. For example, in the case where the input-enabled range is from 0V to the reference voltage value Vr, the magnitude of 1 scale is Vr/(N-1). In the case where the digital detection value is represented by data of K bits, N is, for example, a power of K of 2. K is a natural number.

The a/D conversion section 23 selects 1 of the N digital voltage values as a digital detection value based on the analog detection value input from the first input section 20. For example, the a/D conversion unit 23 rounds off the voltage values of the N numbers to select, as the digital detection value, a digital voltage value closest to the analog detection value input from the first input unit 20. As another example, the a/D conversion unit 23 performs truncation to select, as a digital detection value, a digital voltage value that is first or second close to the analog detection value input from the first input unit 20 from among the N digital voltage values.

The control unit 25 obtains the detection value of the number converted by the a/D conversion unit 23 from the a/D conversion unit 23. The voltage value indicated by the detection value acquired by the control unit 25 substantially coincides with the voltage value of the target voltage at the time of acquisition.

A feeding signal and a stop signal are input to the second input unit 21 from a device not shown. When the power supply signal or the stop signal is input, the second input unit 21 notifies the control unit 25 of the input signal.

The output unit 22 stops the output of the PWM signal to the switching unit 17 and the output of the PWM signal to the switching unit 17 in accordance with the instruction of the control unit 25. The output unit 22 stores duty information indicating a duty. The signal duty ratio of the PWM signal output from the output unit 22 to the switching unit 17 is the duty ratio indicated by the duty ratio information. The control unit 25 adjusts the signal duty of the PWM signal by changing the duty indicated by the duty information.

When the duty ratio indicated by the duty ratio information is changed by the control unit 25 while the output unit 22 outputs the PWM signal, the signal duty ratio of the PWM signal is also changed.

The storage unit 24 is, for example, a nonvolatile memory. The storage unit 24 stores a computer program P1. The control unit 25 includes a CPU (central Processing unit), and the CPU of the control unit 25 executes the computer program P1 to execute the power supply start Processing, the power supply stop Processing, and the duty ratio adjustment Processing. The power supply start processing is processing for causing the output unit 22 to output the PWM signal to the switching unit 17 and start power supply to the load 13. The power supply stop process is a process of stopping the output of the PWM signal by the output unit 22 and stopping the power supply to the load 13. The duty ratio adjustment process is a process of adjusting the signal duty ratio of the PWM signal. The computer program P1 is used to cause the CPU of the control unit 25 to execute the power supply start processing, the power supply stop processing, and the duty ratio adjustment processing.

The computer program P1 may be stored in the storage medium a1 so as to be readable by the CPU of the controller 25. In this case, the computer program P1 read from the storage medium a1 by a reading device not shown is stored in the storage unit 24. The storage medium a1 is an optical disk, a flexible disk, a magnetic disk, a magneto-optical disk, a semiconductor memory, or the like. The optical disk is a CD (compact Disc) -ROM (read Only memory), DVD (digital Versatile Disc) -ROM, BD (Blu-ray (registered trademark) Disc), or the like. The magnetic disk is, for example, a hard disk. Further, the computer program P1 may be downloaded from an external device, not shown, connected to a communication network, not shown, and the downloaded computer program P1 may be stored in the storage unit 24.

When the power supply signal is input to the second input unit 21, the control unit 25 executes power supply start processing. In the power supply start processing, the control unit 25 instructs the output unit 22 to output the PWM signal to the switching unit 17. Thereby, the switching unit 17 alternately switches the power supply switch 12 on and off. As a result, power is supplied from the generator 10 or the battery 11 to the load 13, and the load 13 operates. After causing output unit 22 to output the PWM signal, control unit 25 ends the power supply start processing.

When the stop signal is input to the second input unit 21, the control unit 25 executes the power supply stop process. In the power supply stop process, the control unit 25 instructs the output unit 22 to stop the output of the PWM signal. Thereby, the switching unit 17 keeps the power supply switch 12 off. As a result, the power supply to the load 13 is stopped, and the load 13 stops operating. After the control unit 25 stops the output of the PWM signal by the output unit 22, the power supply stop process is ended.

Fig. 2 is a flowchart showing the procedure of the duty adjustment process. The control unit 25 periodically executes the duty adjustment process from the end of the power supply start process to the start of the power supply stop process.

In the duty adjustment process, the control unit 25 first acquires a digital detection value from the a/D conversion unit 23 (step S1), and calculates a voltage value of the target voltage based on the acquired digital detection value (step S2).

Next, the controller 25 determines whether or not the voltage value calculated in step S2 is equal to or greater than a threshold value (step S3). The threshold value is a constant value and is set in advance. When determining that the voltage value calculated in step S2 is equal to or greater than the threshold value (yes in S3), controller 25 instructs output unit 22 to stop outputting the PWM signal (step S4). Thus, since the switching unit 17 keeps the power supply switch 12 off, the application of the target voltage to the load 13 is stopped.

As described above, when the voltage value of the target voltage is equal to or greater than the threshold value, the application of the target voltage to the load 13 is stopped, and therefore no overvoltage is applied to the load 13. For example, by setting the threshold value to 18V, it is possible to prevent the application of an overvoltage having a voltage value of 20V or more.

After execution of step S4, control unit 25 ends the duty adjustment process. Then, the control unit 25 does not execute the duty adjustment process until the predetermined condition is satisfied. The predetermined condition is, for example, a case where the power supply start processing that is restarted by sequentially inputting the stop signal and the power supply signal to the second input unit 21 is ended.

When determining that the voltage value calculated in step S2 is smaller than the threshold value (no in S3), controller 25 determines the duty ratio based on the voltage value calculated in step S2 (step S5). Then, the control unit 25 changes the duty ratio of the duty ratio information to the duty ratio determined in step S5 (step S6). Thus, the signal duty of the PWM signal and the switching duty of the switching of the power supply switch 12 to on and off are adjusted to the duty determined by the control unit 25 in step S5.

After execution of step S6, control unit 25 ends the duty adjustment process. In this case, the duty adjustment process is executed again as long as the power supply end process is not started.

The voltage value of the target voltage varies for various reasons. In step S5, for example, control unit 25 divides a preset voltage value by the voltage value calculated in step S2, and calculates the square of the divided value. The control unit 25 determines the duty ratio as the square value. The set voltage value is equal to or less than the lower limit of the range of variation of the voltage value of the target voltage. When the duty ratio is determined in this way, even when the voltage value of the target voltage fluctuates, the average value of the power supplied to the load 13 is maintained substantially constant.

As described above, in step S2, the control unit 25 calculates a voltage value based on the digital detection value acquired from the a/D conversion unit 23. The digital detection value is a value corresponding to the analog detection value output from the voltage detector 15. Therefore, the control unit 25 functions as an adjusting unit that adjusts the signal duty of the PWM signal output from the output unit 22 based on the analog detection value output from the voltage detector 15.

The voltage detector 15 and the microcomputer 16 function as signal output devices.

As described above, the intensity of light emitted from an incandescent bulb depends on the average value of power supplied to the incandescent bulb. Therefore, when the load 13 is an incandescent bulb, the intensity of light emitted from the incandescent bulb is substantially constant even if the voltage value of the target voltage varies, and the incandescent bulb hardly flickers.

The voltage value of the target voltage indicated by the digital detection value acquired in step S1, that is, the voltage value calculated in step S2, is closer to the voltage value of the actual target voltage, the fluctuation range of the average value of the power supplied to the load 13 is smaller. In this case, when load 13 is an incandescent bulb, the variation in the intensity of light emitted by the incandescent bulb is also small. Therefore, it is preferable that the error between the voltage value of the target voltage indicated by the digital detection value acquired from the a/D conversion unit 23 and the voltage value of the actual target voltage is small.

As described above, the voltage values of the N numbers are set at equal intervals within the range in which the detected value can be input to the first input unit 20. A value calculated by converting the amplitude of the 1 scale to the amplitude of the detected voltage value of the object voltage is the resolution of voltage detection. The smaller the resolution, the smaller the maximum value of the error between the voltage value of the target voltage indicated by the digital detection value acquired from the a/D conversion unit 23 and the voltage value of the actual target voltage.

In the power supply system 1, the voltage detector 15 has a unique structure, and therefore a small resolution can be achieved. The voltage detector 15 is explained below.

Fig. 3 is a circuit diagram of the voltage detector 15. The voltage detector 15 includes a suppression circuit 30, an output circuit 31, and resistors R1 and R2. The suppression circuit 30 includes a first switch 40, a second switch 41, and resistors R3, R4, and R5. The output circuit 31 includes a first transistor 50, a second transistor 51, and a resistor R6. The first switch 40 and the first transistor 50 are PNP-type bipolar transistors, respectively. The second switch 41 and the second transistor 51 are NPN-type bipolar transistors, respectively.

The suppression circuit 30 has the emitter of the first switch 40 and one end of the resistor R3 connected to the positive electrode of the battery 11. The collector of the first switch 40 is connected to one end of a resistor R1. The base of the first switch 40 is connected to the other end of the resistor R3 and one end of the resistor R4. The other end of the resistor R4 is connected to the collector of the second switch 41. The emitter of the second switch 41 is grounded. The base of the second switch 41 is connected to one end of a resistor R5. The other end of the resistor R5 is connected to the output terminal of the regulator 14.

The output circuit 31 has the emitter of the first transistor 50 connected to the other end of the resistor R1. The collector of the first transistor 50 is connected to one end of a resistor R2. The base of the first transistor 50 is connected to the emitter of the second transistor 51. The base of the second transistor 51 is connected to the output terminal of the regulator 14 and the collector of the second transistor 51. One end of a resistor R6 is also connected to the emitter of the second transistor 51. The other end of the resistor R6 is connected to ground. The resistor R6 functions as a third resistor.

The other end of the resistor R2 is connected to ground. One end of the resistor R2 is connected to the second input unit 21 of the microcomputer 16.

The operation of the suppression circuit 30 will be described. In the first switch 40, when the voltage value of the base with the potential of the emitter as a reference is equal to or less than a negative constant voltage value, a current can flow between the emitter and the collector. At this time, the first switch 40 is turned on. In the first switch 40, when the voltage value of the base with the potential of the emitter as a reference exceeds a negative constant voltage value, a current does not flow between the emitter and the collector. At this time, the first switch 40 is turned off.

In the second switch 41, when the voltage value of the base with the potential of the emitter, that is, the ground potential as a reference is equal to or higher than a positive constant voltage value, a current can flow between the emitter and the collector. At this time, the second switch 41 is turned on. In the second switch 41, when the voltage value of the base with the potential of the emitter as a reference is smaller than a positive constant voltage value, a current does not flow between the emitter and the collector. At this time, the second switch 41 is turned off.

When the regulator 14 is operated, the voltage value of the output terminal of the regulator 14 is adjusted to the reference voltage value Vr, and a predetermined voltage having a voltage value of the reference voltage value Vr is applied to the base and emitter of the second switch 41. The positive constant voltage value of the second switch 41 is lower than the reference voltage value Vr. Therefore, when the regulator 14 is operated, the voltage value of the base with the emitter potential as a reference in the second switch 41 is equal to or higher than a positive constant voltage value, and therefore the second switch 41 is turned on.

When the second switch 41 is turned on, a current flows from one end of the generator 10 or the positive electrode of the battery 11 to the resistors R3 and R4 and the second switch 41 in this order, and a voltage drop occurs in the resistor R3. At this time, in the first switch 40, the voltage value of the base with the potential of the emitter as a reference is equal to or less than a negative constant voltage value, and the first switch 40 is turned on.

As described above, when the predetermined voltage having the voltage value of the reference voltage value Vr is applied from the output terminal of the regulator 14 to the base and the collector of the second transistor 51, the first switch 40 is turned on.

When the first switch 40 is turned on, a current flows in order from one end of the generator 10 or the positive electrode of the battery 11 to the first switch 40, the resistor R1, the first transistor 50 of the output circuit 31, and the resistor R2, and a target voltage is applied to one end of the resistor R1 via the first switch 40. At this time, the voltage value of the one end of the resistor R2 with the ground potential as the reference is a voltage value corresponding to the voltage value of the target voltage, and is output to the first input unit 20 of the microcomputer 16 as a simulated detection value. The resistor R1 functions as a first resistor, and the resistor R2 functions as a second resistor.

When the regulator 14 stops operating, the voltage value of the base with the emitter potential as a reference in the second switch 41 is 0V, and is smaller than a positive constant voltage value, and the second switch 41 is turned off. When the second switch 41 is off, the current does not flow to the resistors R3 and R4, and therefore, the voltage drop does not occur in the resistor R3. As a result, when the second switch 41 is turned off, the voltage value of the base with the emitter potential as a reference in the first switch 40 is 0V, and therefore, the voltage value is equal to or more than a certain negative voltage value, and the first switch 40 is turned off.

As described above, when the application of the predetermined voltage from the output terminal of the regulator 14 is stopped, the first switch 40 is turned off.

When the first switch 40 is turned off, since a current does not flow to the resistor R1, the first transistor 50 of the output circuit 31, and the resistor R2, one end of the resistor R2 is 0V regardless of the voltage value of the target voltage, and the target voltage cannot be detected by the voltage detector 15.

The load 13 is an electric device that does not need to be operated when the regulator 14 stops operating. Therefore, when the regulator 14 stops operating, the voltage detector 15 does not need to detect the voltage. In the voltage detector 15, when the regulator 14 stops operating, that is, when the application of the predetermined voltage from the output terminal of the regulator 14 stops, the first switch 40 of the suppression circuit 30 is turned off, and the current does not flow through the resistors R1 and R2. Therefore, power consumption by the resistors R1 and R2 can be suppressed.

Next, the operation of the output circuit 31 will be described. When the first switch 40 of the suppression circuit 30 is turned on, a current is input from the other end of the resistor R1 to the emitter of the first transistor 50. In the first transistor 50, substantially all of the current input from the other end of the resistor R1 to the emitter is output from the collector. Therefore, the current value of the current input from the other end of the resistor R1 to the emitter of the first transistor 50 substantially matches the current value of the current output from the collector of the first transistor 50. The current output from the collector of the first transistor 50 is input to one end of the resistor R2.

A very small part of the current input from the other end of the resistor R1 to the collector is output from the base to the resistor R6.

A current is input from the output terminal of the regulator 14 to the collector and base of the second transistor 51. In the second transistor 51, a current input to the collector and the base is output to the resistor R6.

Hereinafter, a voltage value of the emitter of the first transistor 50 with reference to a potential of the base of the first transistor 50 is referred to as an emitter voltage value Ve1, and a voltage value of the base of the second transistor 51 with reference to a potential of the emitter of the second transistor 51 is referred to as a base voltage value Vb 2. The current value of the current flowing through the resistor R6 is referred to as a resistor current value Ir.

The first switch 40 is assumed to be on. The magnitude of the voltage drop generated at the first switch 40 in the case where the current flows in the first switch 40 is very small. Therefore, hereinafter, in the case where a current flows in the first switch 40, the magnitude of the voltage drop generated at the first switch 40 can be regarded as 0V.

The voltage value at the other end of the resistor R1 with respect to the ground potential is represented by (Vr-Vb2+ Ve 1). Therefore, when the voltage value of the target voltage is represented by Va and the resistance value of the resistor R1 is represented by R1, the current value of the current input from the resistor R1 to the emitter of the first transistor 50 is represented by (Va- (Vr-Vb2+ Ve 1))/R1. As described above, in the first transistor 50, substantially all of the current input from the other end of the resistor R1 is output from the collector to one end of the resistor R2. Therefore, when the resistance value of the resistor R2 is represented as R2, the voltage value between both ends of the resistor R2 is represented by (Va- (Vr-Vb2+ Ve 1)). R2/R1. When (Va- (Vr-Vb2+ Ve1)) is negative, the voltage value between the two terminals of the resistor R2 is 0V, and the voltage value of the target voltage is not detected.

Fig. 4 is an explanatory diagram of characteristics of the first transistor 50 and the second transistor 51. In fig. 4, the relationship between the resistance current value Ir and the emitter voltage value Ve1 is represented by a thick line. The relationship between the resistance current value Ir and the base voltage value Vb2 is indicated by thin lines. Fig. 4 also shows a design range which is a variation range of the resistance current value Ir when the voltage value of the target voltage varies in the state where the first switch 40 is turned on. For example, in the design of the power supply system 1, when the voltage value of the target voltage ranges from 5V to 25V, the design range is a range of variation of the resistance current value Ir when the voltage value of the target voltage varies within the range.

As shown in fig. 4, when resistance current value Ir is within the design range, emitter voltage value Ve1 substantially matches base voltage value Vb 2. Therefore, when the resistance current value Ir is within the design range, (Ve1-Vb2) is substantially 0V, and therefore the first transistor 50 substantially maintains the voltage value of the other end of the resistor R1 with reference to the ground potential as the reference voltage value Vr.

As described above, the first transistor 50 of the output circuit 31 substantially maintains the voltage value of the other end of the resistor R1 at the reference voltage value Vr, and outputs a current having a current value substantially equal to the current value of the current input from the resistor R1 to the resistor R2.

When the resistance current value Ir is within the design range, the voltage value between the two ends of the resistance R2, that is, the analog detection value output from one end of the resistance R2 to the first input unit 20 of the microcomputer 16 is represented by ((Va-Vr) · R2/R1). The range of variation of the analog detection value needs to be included in the input-enabled range. The resistance values r1 and r2 are set so that the range of variation of the analog detection value is included in the input-enabled range.

Assuming that the voltage value of the target voltage ranges from 5V to 25V, the reference voltage value Vr is 5V, and the input range is from 0V to 5V. In this case, (Va-Vr) ranges from 0V to 20V. When r2/r1 is 1/4, the range of variation of the simulated detection values is from 0V to 5V, and is included in the input-enabled range.

In step S2 of the duty ratio adjustment process, the control unit 25 substitutes the detected value Vs of the number obtained in step S1 into ((Vs · r1/r2) + Vr) to calculate the voltage value Va of the target voltage.

Fig. 5 is an explanatory diagram of the effect of the voltage detector 15. In fig. 5, the relationship between the simulated detection value (Va-Vr) · r2/r1 and the voltage value Va of the target voltage is shown by a thick line with respect to the voltage detector 15. The setting conditions are that the voltage value of the object voltage ranges from 5V to 25V, the reference voltage value Vr is 5V, the input range is from 0V to 5V, and r2/r1 is 1/4. In order to facilitate understanding of the effect of the voltage detector 15, the number of digital voltage values, N, is assumed to be 3 powers of 2, i.e., 8.

As described above, the analog detection value is converted into 1 of N (═ 8) digital voltage values arranged at equal intervals in the input-enabled range. The resolution of the voltage detector 15 is calculated by converting the 1-step of the voltage values of the N numbers into the amplitude of the detected voltage value of the object voltage. The resolution of the voltage detector 15 is calculated by dividing the range of variation of the voltage value of the target voltage by (N-1), and is 2.86V in the example of fig. 5.

As a conventional configuration for detecting a voltage, a voltage dividing configuration for dividing a target voltage may be considered. In the voltage dividing structure, 2 resistors are provided, one end of one resistor is connected to the positive electrode of the battery 11, the other end of one resistor is connected to one end of the other resistor, and the other end of the other resistor is grounded. The 2 resistors divide the target voltage, and the voltage value of the divided voltage is output as an analog detection value from the other end of the one resistor to the first input unit 20 of the microcomputer 16.

When the resistance value of one resistor is represented by ra and the resistance value of the other resistor is represented by rb, the detection value of the simulation is represented by Va · rb/(ra + rb). In the voltage dividing structure, the resistance values ra and rb are set so that the range of variation of the analog detection value is included in the input possible range. Specifically, the voltage value Va of the target voltage ranges from 0V to 25V. Therefore, when rb/(ra + rb) is 1/5, the range of variation in the simulated detection values is from 0V to 5V, and is included in the range that can be input.

In fig. 5, the relationship between the analog detected value Va · rb/(ra + rb) and the voltage value Va of the target voltage is shown by a thin line for the voltage dividing structure. The resolution of the voltage dividing structure is calculated by dividing the upper limit value of the variation range of the voltage value of the target voltage by (N-1), and is 3.57V in the example of fig. 5.

As described above, the a/D conversion section 23 selects 1 of the N digital voltage values as a digital detection value based on the analog detection value. Therefore, the smaller the resolution, the smaller the error between the analog detected value and the digital detected value, and the smaller the error between the voltage value of the target voltage indicated by the digital detected value and the voltage value of the actual target voltage.

As shown in fig. 5, in the voltage detector 15, the lower limit value of the detection range of the target voltage can be adjusted to a voltage value exceeding 0V by adjusting the reference voltage value Vr to a voltage value exceeding 0V. The lower limit of the detection range of the voltage dividing structure is inevitably 0V. As a result, the slope of the graph of the voltage detector 15 is smaller than the slope of the graph of the resolution, and the resolution of the voltage detector 15 is smaller.

When resistance current value Ir is within the design range, emitter voltage Ve1 and base voltage Vb2 may not substantially match. For example, when the resistance current value Ir is a value within the design range, the difference voltage value Vd calculated by subtracting the base voltage value Vb2 from the emitter voltage value Ve1 may be substantially constant. The first transistor 50 maintains the voltage value of the other end of the resistor R1 at (Vr + Vd). (Vr + Vd) is substantially constant. Even in this case, the resolution of the voltage detector 15 is small. The simulated detection value is represented by ((Va-Vr-Vd). r2/r 1). In step S2 of the duty ratio adjustment process, the control unit 25 substitutes the detected value Vs of the number acquired in step S1 for ((Vs · r1/r2) + Vr + Vd) to calculate the voltage value of the target voltage.

In the suppression circuit 30, the first switch 40 is not limited to a PNP bipolar Transistor, and may be a P-channel FET (Field Effect Transistor), for example. The second switch 41 is not limited to an NPN-type bipolar transistor, and may be an N-trench FET, for example. The collector, emitter and base of the bipolar transistor correspond to the drain, source and gate of the FET, respectively.

(embodiment mode 2)

Fig. 6 is a circuit diagram of the voltage detector 15 according to embodiment 2.

Hereinafter, embodiment 2 is different from embodiment 1 in the following description. Since the configurations other than those described later are common to embodiment 1, the same reference numerals as those in embodiment 1 are given to the components common to embodiment 1, and the description thereof is omitted.

When comparing the power supply system 1 according to embodiment 2 with the power supply system 1 according to embodiment 1, the configuration of the voltage detector 15 is different. When comparing the voltage detector 15 according to embodiment 2 with the voltage detector 15 according to embodiment 1, the configuration of the output circuit 31 is different.

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