阅读说明：本技术 高压宽范围输入的升压电路和软开关电路 (High-voltage wide-range input booster circuit and soft switching circuit ) 是由 王跃斌 崔荣明 臧晓敏 宋栋梁 于 2021-07-19 设计创作，主要内容包括：本申请涉及一种高压宽范围输入的升压电路和软开关电路,升压电路包括主功率开关、主绕组、第一电容、主二极管和第一软启动控制单元,主绕组、第一电容和主二极管位于同一回路并两两相连,主二极管的正极连于第一电容的正极或主二极管的负极连于第一电容的负极,主绕组的两端分别耦接于主功率输入的正极和负极,主功率开关串联于主功率输入和主绕组之间,第一电容的两端作为升压电路的输出端；主功率开关上设置有第一控制端；第一软启动控制单元包括位于同一回路并两两相连的辅助开关、辅助绕组和第二电容,辅助绕组磁耦合于主绕组,辅助开关上设置有第二控制端。本申请具有实现宽范围调压并降低开关损耗的优点。(The application relates to a booster circuit and a soft switching circuit with high voltage and wide range input, wherein the booster circuit comprises a main power switch, a main winding, a first capacitor, a main diode and a first soft start control unit, the main winding, the first capacitor and the main diode are positioned in the same loop and connected in pairs, the anode of the main diode is connected to the anode of the first capacitor or the cathode of the main diode is connected to the cathode of the first capacitor, the two ends of the main winding are respectively coupled to the anode and the cathode of the main power input, the main power switch is connected in series between the main power input and the main winding, and the two ends of the first capacitor are used as the output end of the booster circuit; the main power switch is provided with a first control end; the first soft start control unit comprises an auxiliary switch, an auxiliary winding and a second capacitor which are positioned in the same loop and connected in pairs, the auxiliary winding is magnetically coupled with the main winding, and a second control end is arranged on the auxiliary switch. The method and the device have the advantages of realizing wide-range voltage regulation and reducing switching loss.)

1. A high-voltage wide-range input booster circuit is characterized by comprising a main power switch Q1, a main winding L1, a first capacitor C1, a main diode D1 and a first soft start control unit, wherein the main winding L1, the first capacitor C1 and the main diode D1 are positioned in the same loop and connected in pairs, the anode of the main diode D1 is connected to the anode of the first capacitor C1 or the cathode of the main diode D1 is connected to the cathode of the first capacitor C1, two ends of the main winding L1 are respectively coupled to the anode and the cathode of a main power input, the main power switch Q1 is connected between the anode of the main power input and the main winding L1 in series or between the cathode of the main power input and the main winding L1 in series, and two ends of the first capacitor C1 are used as the output end of the booster circuit; the main power switch Q1 is provided with a first control end for receiving a control signal to control the on-off of the main power switch Q1;

the first soft start control unit comprises an auxiliary switch Q2, an auxiliary winding L2 and a second capacitor C2 which are located in the same loop and connected in pairs, the auxiliary winding L2 is magnetically coupled to the main winding L1, and a second control end used for receiving a control signal to control the on-off of the auxiliary switch Q2 is arranged on the auxiliary switch Q2.

2. The high voltage wide range input boost circuit of claim 1, the first control end and the second control end input control signals periodically, each period is divided into four stages, in the first phase T1, a control signal is sent to the first control terminal to turn off the main power switch Q1, a control signal is sent to the second control terminal to turn on the auxiliary switch Q2, in the second stage T2, the first control terminal sends a control signal to turn off the main power switch Q1, the second control terminal sends a control signal to turn off the auxiliary switch Q2, in the third phase T3, a control signal is sent to the first control terminal to turn on the main power switch Q1, a control signal is sent to the second control terminal to turn off the auxiliary switch Q2, in the fourth phase T4, a control signal is sent to the first control terminal to turn off the main power switch Q1, and a control signal is sent to the second control terminal to turn off the auxiliary switch Q2.

3. A high voltage wide range input boost circuit as claimed in claim 2, wherein in the first phase T1, the second capacitor C2 discharges during the conduction phase of the auxiliary switch Q2 to make the auxiliary winding L2 pass current, the main winding L1 generates an induced current and pulls up the potential of the main winding L1 near the positive terminal of the main power input, and pulls down the potential of the main winding L1 near the negative terminal of the main power switch Q1 to reduce the potential difference across the main power switch Q1 before the main winding L1 charges; the first capacitor C1 discharges to supply power to the output end of the booster circuit, and the main diode D1 blocks the main winding L1 from supplying power to the output end of the booster circuit;

in the second stage T2, the second capacitor C2 discharges to other loads in the off-phase of the auxiliary switch Q2, the main winding L1 discharges and keeps pulling up the potential of the end of the main winding L1 close to the positive pole of the main power input, the potential of the end of the main winding L1 close to the negative pole of the main power switch Q1 is pulled down, and the main diode D1 blocks the main winding L1 from supplying power to the output end of the boost circuit;

in the third phase T3, the main winding L1 charges in the on phase of the main power switch Q1; the first capacitor C1 discharges to supply power to the output end of the booster circuit, the main diode D1 blocks the main power output to supply power to the output end of the booster circuit before the main winding L1 discharges, and the auxiliary winding L2 charges in the conduction process of the main power switch Q1;

in a fourth phase T4, the main winding L1 discharges during the off phase of the main power switch Q1, the main diode D1 turns on to charge the main winding L1 to charge the first capacitor C1 and supply power to the output of the boost circuit, and the auxiliary winding L2 induces inductance and charges the second capacitor C2.

4. The high voltage wide range input boost circuit of claim 1,

the first capacitor C1 is an electrolytic capacitor and has a positive electrode coupled to the negative electrode of the main power input and a negative electrode coupled to the positive electrode of the main power input;

and/or the second capacitor C2 is an electrolytic capacitor and the negative electrode of the second capacitor C2 is coupled to a first input terminal, which is the same name terminal of the auxiliary winding L2 coupled to one terminal of the main power input positive electrode with respect to the main winding L1.

5. The boost circuit of claim 1, wherein the main power switch Q1 is an NMOS transistor, the gate of the main power switch Q1 is the first control terminal, the source is connected to the negative terminal of the main power input, and the drain is connected to the main winding L1;

or, the main power switch Q1 is an NMOS transistor, the gate of the main power switch Q1 is the first control end, the drain is connected to the positive electrode of the main power input, and the source is connected to the main winding L1;

or, the main power switch Q1 is a PMOS transistor, the gate of the main power switch Q1 is the first control end, the drain is connected to the negative electrode of the main power input, and the source is connected to the main winding L1;

or, the main power switch Q1 is a PMOS transistor, the gate of the main power switch Q1 is the first control end, the source is connected to the positive electrode of the main power input, and the drain is connected to the main winding L1;

or, the main power switch Q1 is an NPN type triode, the base of the main power switch Q1 is the first control end, the emitter is connected to the negative electrode of the main power input, and the collector is connected to the main winding L1;

or, the main power switch Q1 is an NPN type triode, the base of the main power switch Q1 is the first control end, the collector is connected to the positive electrode of the main power input, and the emitter is connected to the main winding L1;

or, the main power switch Q1 is a PNP type triode, the base of the main power switch Q1 is the first control end, the collector is connected to the negative electrode of the main power input, and the emitter is connected to the main winding L1;

or, the main power switch Q1 is a PNP type triode, the base of the main power switch Q1 is the first control terminal, the emitter is connected to the positive electrode of the main power input, and the collector is connected to the main winding L1.

6. A boost circuit according to claim 1, wherein said auxiliary switch Q2 is an NMOS transistor, the gate of said auxiliary switch Q2 is said second control terminal, the drain is connected to a second capacitor C2, the source is connected to a second input terminal, said second input terminal is the same name terminal of the auxiliary winding L2 coupled to the negative terminal of the main power input with respect to the main winding L1;

or, the auxiliary switch Q2 is a PMOS transistor, the gate of the auxiliary switch Q2 is the second control end, the source is connected to the second capacitor C2, and the drain is connected to the second access end;

or, the auxiliary switch Q2 is an NMOS transistor, the gate of the auxiliary switch Q2 is the second control terminal, the source is connected to the second capacitor C2, the drain is connected to a first connection terminal, and the first connection terminal is the same name terminal of one terminal of the auxiliary winding L2 coupled to the main power input anode relative to the main winding L1;

or, the auxiliary switch Q2 is a PMOS transistor, the gate of the auxiliary switch Q2 is the second control end, the drain is connected to the second capacitor C2, and the source is connected to the first access end;

or, the auxiliary switch Q2 is an NPN type triode, the base of the auxiliary switch Q2 is the second control end, the collector is connected to the second capacitor C2, and the emitter is connected to the second access end;

or, the auxiliary switch Q2 is a PNP type triode, the base of the auxiliary switch Q2 is the second control end, the emitter is connected to the second capacitor C2, and the collector is connected to the second access end;

or, the auxiliary switch Q2 is an NPN type triode, the base of the auxiliary switch Q2 is the second control end, the emitter is connected to the second capacitor C2, and the collector is connected to the first access end;

or, the auxiliary switch Q2 is a PNP type triode, the base of the auxiliary switch Q2 is the second control terminal, the collector is connected to the second capacitor C2, and the emitter is connected to the first access terminal.

7. A high voltage wide range input soft switching DC/DC circuit, comprising the high voltage wide range input boost circuit of any one of claims 1-6, further comprising a post-stage circuit connected to the output of the boost circuit, wherein the post-stage circuit is a half-bridge isolation circuit, a full-bridge isolation circuit or an LLC isolation circuit.

8. A high-voltage wide-range input booster circuit is characterized by comprising a third switch Q3, a third winding L3, a third capacitor C3, a second diode D2 and a second soft start control unit, the third switch Q3, the third capacitor C3 and the second diode D2 are positioned in the same loop and are connected in pairs, the cathode of the second diode D2 is connected to the anode of the third capacitor C3 or the anode of the second diode D2 is connected to the cathode of the first capacitor C1, two ends of the third winding L3 are respectively coupled to the positive pole of the main power input and the positive pole of the third capacitor C3 or two ends of the third winding L3 are coupled to the negative pole of the main power input and the negative pole of the third capacitor C3 of the booster circuit, two ends of the third capacitor C3 are used as output ends, and a third control end for receiving a control signal to control the on/off of the third switch Q3 is arranged on the third switch Q3;

the second soft start control unit comprises a fourth switch Q4, a fourth winding L4 and a fourth capacitor C4 which are located in the same loop and connected in pairs, the fourth winding L4 is magnetically coupled to the third winding L3, and a fourth control end for receiving a control signal to control the on-off of the fourth switch Q4 is arranged on the fourth switch Q4.

9. The high voltage wide range input boost circuit of claim 1, the third control end and the fourth control end input control signals periodically, each period is divided into four stages, in the first stage S1, a control signal is sent to the third control terminal to turn off the third switch Q3, a control signal is sent to the fourth control terminal to turn on the fourth switch Q4, in the fourth stage T2, the third control terminal sends a control signal to turn off the third switch Q3, the fourth control terminal sends a control signal to turn off the fourth switch Q4, in the third stage T3, a control signal is sent to the third control terminal to turn on the third switch Q3, a control signal is sent to the fourth control terminal to turn off the fourth switch Q4, and in the fourth period T4, a control signal is sent to the third control terminal to turn off the third switch Q3, and a control signal is sent to the fourth control terminal to turn off the fourth switch Q4.

10. A high voltage wide range input soft switching DC/DC circuit comprising the high voltage wide range input boost circuit of any one of claims 8-9, and further comprising a post-stage circuit connected to the output of the boost circuit, wherein the post-stage circuit is a half bridge isolation circuit, a full bridge isolation circuit or an LLC isolation circuit.

Technical Field

The present application relates to the field of high voltage applications, and in particular, to a high voltage wide input boost circuit and soft switching circuit.

Background

The high-voltage DC/DC module has more requirements in practice, and is generally realized by topologies such as flyback, forward and bridge circuits according to a power size implementation scheme, but in practical application, a wide-range input needs to be adapted in some occasions, and high conversion efficiency needs to be kept. In the related art, the BOOST circuit shown in fig. 1 and the BUCK-BOOST circuit shown in fig. 2 adopt a scheme of a one-stage conversion topology, and the output secondary side power switch tube bears higher voltage stress due to a wide input voltage range, so that a device with a higher specification needs to be selected, and performance indexes, conversion efficiency and reliability are reduced. If the voltage is directly regulated by adopting methods such as bridge rectification and the like, the input range is narrow and difficult to regulate after the circuit parameters are fixed.

Disclosure of Invention

In order to realize wide-range voltage regulation of a DC/DC module and reduce switching loss, the application provides a high-voltage wide-range input booster circuit and a soft switching circuit.

In a first aspect, the present application provides a boost circuit with high voltage and wide input range, which adopts the following technical scheme:

a high-voltage wide-range input booster circuit comprises a main power switch Q1, a main winding L1, a first capacitor C1, a main diode D1 and a first soft start control unit, wherein the main winding L1, the first capacitor C1 and the main diode D1 are positioned in the same loop and connected in pairs, the anode of the main diode D1 is connected to the anode of the first capacitor C1 or the cathode of the main diode D1 is connected to the cathode of the first capacitor C1, two ends of the main winding L1 are respectively coupled to the anode and the cathode of a main power input, the main power switch Q1 is connected between the main power input and the main winding L1 in series, and two ends of the first capacitor C1 serve as an output end of the booster circuit; the main power switch Q1 is provided with a first control end for receiving a control signal to control the on-off of the main power switch Q1;

the first soft start control unit comprises an auxiliary switch Q2, an auxiliary winding L2 and a second capacitor C2 which are located in the same loop and connected in pairs, the auxiliary winding L2 is magnetically coupled to the main winding L1, and a second control end used for receiving a control signal to control the on-off of the auxiliary switch Q2 is arranged on the auxiliary switch Q2.

By adopting the technical scheme, the auxiliary winding L2 is added in the BUCK-BOOST circuit, the auxiliary rectification mode is changed into the synchronous rectification mode from a diode, and the main power works in the DCM mode. Before the main power is switched on, the synchronous rectification is conducted for a fixed time, the energy of the auxiliary power supply is stored in the inductor, and after the synchronous rectification is switched off, the energy is flyback at the main output end of the inductor to conduct the main body diode, so that the soft switch is switched on. Specifically, in the conventional BUCK-BOOST circuit, during the switching process, the current change and the voltage change occurring at the same time in the main power switch Q1 will generate a switching loss, which is not obvious at the low-voltage input, but is large at the high-voltage input, which easily causes the switch to be damaged, and thus, the conventional BUCK-BOOST circuit is difficult to be applied to the high-voltage scene. In the scheme, the voltage change at two ends of the main power switch Q1 and the passing current change process are staggered through the arrangement of the first soft start control unit, namely, the current passing through the main power switch Q1 in the voltage change process at two ends of the main power switch Q1 is extremely low, and the voltage at two ends of the main power switch Q1 is extremely low in the change process of the current passing through the main power switch Q1, so that the switching loss is greatly reduced compared with that of a conventional BUCK-BOOST circuit, and the wide-range voltage regulation of a DC/DC module is conveniently realized.

Optionally, the first control terminal and the second control terminal periodically input a control signal, each period is divided into four stages, in the first stage T1, the first control terminal sends a control signal to turn off the main power switch Q1, the second control terminal sends a control signal to turn on the auxiliary switch Q2, in the second stage T2, the first control terminal sends a control signal to turn off the main power switch Q1, sends a control signal to turn off the auxiliary switch Q2, in the third stage T3, the first control terminal sends a control signal to turn on the main power switch Q1, sends a control signal to turn off the auxiliary switch Q2, in the fourth stage T4, the first control terminal sends a control signal to turn off the main power switch Q1, and sends a control signal to turn off the auxiliary switch Q2.

Optionally, in the first phase T1, the second capacitor C2 discharges in the on phase of the auxiliary switch Q2 to make the auxiliary winding L2 pass current, the main winding L1 generates an induced current and pulls up the potential of the main winding L1 close to the positive end of the main power input, and pulls down the potential of the main winding L1 close to the negative end of the main power switch Q1, so as to reduce the potential difference across the main power switch Q1 before the main winding L1 charges; the first capacitor C1 discharges to supply power to the output end of the booster circuit, and the main diode D1 blocks the main winding L1 from supplying power to the output end of the booster circuit;

in the second stage T2, the second capacitor C2 discharges to other loads in the off-phase of the auxiliary switch Q2, the main winding L1 discharges and keeps pulling up the potential of the end of the main winding L1 close to the positive pole of the main power input, the potential of the end of the main winding L1 close to the negative pole of the main power switch Q1 is pulled down, and the main diode D1 blocks the main winding L1 from supplying power to the output end of the boost circuit;

in the third phase T3, the main winding L1 charges in the on phase of the main power switch Q1; the first capacitor C1 discharges to supply power to the output end of the booster circuit, the main diode D1 blocks the main power output to supply power to the output end of the booster circuit before the main winding L1 discharges, and the auxiliary winding L2 charges in the conduction process of the main power switch Q1;

in a fourth phase T4, the main winding L1 discharges during the off phase of the main power switch Q1, the main diode D1 turns on to charge the main winding L1 to charge the first capacitor C1 and supply power to the output of the boost circuit, and the auxiliary winding L2 induces inductance and charges the second capacitor C2.

By adopting the technical scheme, in the first stage T1, the main winding L1 generates induced electromotive force under the action of the auxiliary winding L2, in the second stage T2, the main winding L1 discharges, induction current is generated, the potential of the main winding L1 close to the positive end of the main power input is pulled high, the potential of the main winding L1 close to the negative end of the main power switch Q1 is pulled low, and therefore the potential difference between the two ends of the main power switch Q1 is reduced before the main winding L1 charges. That is, the high potential across the main power switch Q1 caused after the discharge of the fourth stage T4L1 is over will be removed during the first stage T1 and the second stage T2 to ensure that the main power switch Q1 remains low across the third stage T3 when the main power switch Q1 is turned on to generate a gradually increasing current.

Optionally, the first capacitor C1 is an electrolytic capacitor, and has a positive electrode coupled to the negative electrode of the main power input and a negative electrode coupled to the positive electrode of the main power input;

optionally, the second capacitor C2 is an electrolytic capacitor and the negative electrode of the second capacitor C2 is coupled to a first connection terminal, which is a same-name terminal of the auxiliary winding L2 coupled to one terminal of the main power input positive electrode with respect to the main winding L1.

Optionally, the main power switch Q1 is an NMOS transistor, the gate of the main power switch Q1 is the first control terminal, the source is connected to the negative pole of the main power input, and the drain is connected to the main winding L1.

Optionally, the main power switch Q1 is an NMOS transistor, the gate of the main power switch Q1 is the first control terminal, the drain is connected to the positive pole of the main power input, and the source is connected to the main winding L1.

Optionally, the main power switch Q1 is a PMOS transistor, the gate of the main power switch Q1 is the first control terminal, the drain is connected to the negative pole of the main power input, and the source is connected to the main winding L1.

Optionally, the main power switch Q1 is a PMOS transistor, the gate of the main power switch Q1 is the first control terminal, the source is connected to the positive electrode of the main power input, and the drain is connected to the main winding L1.

Optionally, the main power switch Q1 is an NPN transistor, and the main power switch Q1 has a base terminal as the first control terminal, an emitter terminal connected to the negative terminal of the main power input, and a collector terminal connected to the main winding L1.

Optionally, the main power switch Q1 is an NPN transistor, the base of the main power switch Q1 is the first control terminal, the collector is connected to the positive terminal of the main power input, and the emitter is connected to the main winding L1.

Optionally, the main power switch Q1 is a PNP transistor, the base of the main power switch Q1 is the first control terminal, the collector is connected to the negative terminal of the main power input, and the emitter is connected to the main winding L1.

Optionally, the main power switch Q1 is a PNP transistor, the base of the main power switch Q1 is the first control terminal, the emitter is connected to the positive terminal of the main power input, and the collector is connected to the main winding L1.

Optionally, the auxiliary switch Q2 is an NMOS transistor, the gate of the auxiliary switch Q2 is the second control terminal, the drain is connected to the second capacitor C2, the source is connected to a second connection terminal, and the second connection terminal is a same name terminal of the auxiliary winding L2 coupled to one terminal of the negative pole of the main power input with respect to the main winding L1.

Optionally, the auxiliary switch Q2 is a PMOS transistor, the gate of the auxiliary switch Q2 is the second control terminal, the source is connected to the second capacitor C2, and the drain is connected to the second connection terminal;

optionally, the auxiliary switch Q2 is an NMOS transistor, the gate of the auxiliary switch Q2 is the second control terminal, the source is connected to the second capacitor C2, and the drain is connected to a first connection terminal, which is the same name terminal of the end of the auxiliary winding L2 coupled to the positive pole of the main power input with respect to the main winding L1.

Optionally, the auxiliary switch Q2 is a PMOS transistor, the gate of the auxiliary switch Q2 is the second control terminal, the drain is connected to the second capacitor C2, and the source is connected to the first connection terminal.

Optionally, the auxiliary switch Q2 is an NPN transistor, the base of the auxiliary switch Q2 is the second control terminal, the collector is connected to the second capacitor C2, and the emitter is connected to the second input terminal.

Optionally, the auxiliary switch Q2 is a PNP transistor, the base of the auxiliary switch Q2 is the second control terminal, the emitter is connected to the second capacitor C2, and the collector is connected to the second access terminal.

Optionally, the auxiliary switch Q2 is an NPN transistor, and the base of the auxiliary switch Q2 is the second control terminal, the emitter is connected to the second capacitor C2, and the collector is connected to the first connection terminal.

Optionally, the auxiliary switch Q2 is a PNP transistor, the base of the auxiliary switch Q2 is the second control terminal, the collector is connected to the second capacitor C2, and the emitter is connected to the first input terminal.

In a second aspect, the present application provides a soft switching DC/DC circuit with high voltage and wide input range, which adopts the following technical solution:

the soft switch circuit comprises the booster circuit with high voltage and wide range input and further comprises a rear-stage circuit connected to the output end of the booster circuit, wherein the rear-stage circuit is a half-bridge isolation circuit, a full-bridge isolation circuit or an LLC isolation circuit.

By adopting the technical scheme, the wide-range input voltage can be well adapted by adopting the two-stage topology, and the adaptability is wider. The front stage adopts a duty ratio adjusting mode to realize closed-loop output, and the rear stage adopts an isolating circuit with a fixed duty ratio, so that the stress of components is low, and the conversion efficiency is high.

In a third aspect, the present application provides a high-voltage wide-range input voltage boost circuit, which adopts the following technical scheme:

a high-voltage wide-range input boost circuit comprises a third switch Q3, a third winding L3, a third capacitor C3, a second diode D2 and a second soft start control unit, wherein the third switch Q3, the third capacitor C3 and the second diode D2 are located in the same loop and connected in pairs, the cathode of the second diode D2 is connected to the anode of the third capacitor C3 or the anode of the second diode D2 is connected to the cathode of the first capacitor C1, two ends of the third winding L3 are respectively coupled to the anode of a main power input and the anode of the third capacitor C3 or two ends of the third winding L3 are coupled to the cathode of the main power input and the cathode of the boost circuit third capacitor C3, two ends of the third capacitor C3 are used as output ends, and a third control end for receiving a control signal to control the on-off of the third switch Q3 is arranged on the third switch Q3;

the second soft start control unit comprises a fourth switch Q4, a fourth winding L4 and a fourth capacitor C4 which are located in the same loop and connected in pairs, the fourth winding L4 is magnetically coupled to the third winding L3, and a fourth control end for receiving a control signal to control the on-off of the fourth switch Q4 is arranged on the fourth switch Q4.

Optionally, the third control terminal and the fourth control terminal periodically input a control signal, each period is divided into four stages, in the first stage S1, the control signal is sent to the third control terminal to turn off the third switch Q3, the control signal is sent to the fourth control terminal to turn on the fourth switch Q4, in the fourth stage T2, the control signal is sent to the third control terminal to turn off the third switch Q3, the control signal is sent to the fourth control terminal to turn off the fourth switch Q4, in the third stage T3, the control signal is sent to the third control terminal to turn on the third switch Q3, the control signal is sent to the fourth control terminal to turn off the fourth switch Q4, in the fourth stage T4, the control signal is sent to the third control terminal to turn off the third switch Q3, and the control signal is sent to the fourth control terminal to turn off the fourth switch Q4.

Drawings

FIG. 1 is a schematic diagram of a BUCK-BOOST circuit in the related art;

FIG. 2 is a schematic diagram of a BOOST circuit in the related art;

FIG. 3 is a schematic diagram of current change and voltage change during turn-on and turn-off of a switch in a hard switching circuit of the related art;

fig. 4a to fig. 4h are schematic diagrams of a preceding stage circuit of a soft switching circuit with high voltage and wide input range according to different embodiments of the present application;

FIG. 5 is a schematic diagram of states of input control signals of a first control terminal and a second control terminal at four phases of each cycle and a schematic diagram of a current passing through a main power switch in an embodiment of the present application;

FIG. 6 is a schematic diagram of a half-bridge isolation circuit as a post-stage circuit in the embodiment of the present application;

FIG. 7 is a schematic diagram of a rear-stage circuit in the embodiment of the present application being a full-bridge isolation circuit;

FIG. 8 is a schematic diagram of an LLC isolation circuit as a subsequent stage circuit in the embodiment of the present application;

fig. 9 is a schematic diagram of a front stage circuit of another high-voltage wide-range input soft switching circuit in the embodiment of the present application.

Detailed Description

The present application will be described in further detail below with reference to the accompanying drawings.

At present, in the related art, the classic BUCK-BOOST circuit usually adopts the circuit structure as shown in fig. 2, and as shown in fig. 3, the voltage and the current in the switching process of the circuit structure are not zero, and the overlapping occurs. The voltage and current change rapidly, and the waveform appears apparent overshoot, thereby generating switching loss, namely switching noise. When the BUCK-BOOST circuit is applied to high-voltage input, the switching noise is large, and the efficiency is low.

The embodiment of the application discloses soft switch circuit of high pressure wide range input, including preceding stage circuit and back stage circuit, the preceding stage circuit adopts the mode of adjusting the duty cycle, realizes closed loop output, and the back stage adopts the buffer circuit of fixed duty cycle, and the components and parts stress is low, and conversion efficiency is high. The wide-range input voltage can be well adapted by adopting the two-stage topology, and the adaptability is wider.

Referring to fig. 4, the front stage circuit is a high-voltage wide-range input DC/DC boost circuit, and includes a main power switch Q1, a main winding L1, a first capacitor C1, a main diode D1, and a first soft start control unit, where the main winding L1, the first capacitor C1, and the main diode D1 are located in the same loop and connected two by two. The topological connection of the main winding L1, the first capacitor C1 and the main diode D1 is diversified, and only the two ends of the main winding L1 are respectively coupled to the positive pole and the negative pole of the main power input. It is emphasized that "coupled" herein includes both direct and indirect connections, where indirect connection means that other electrical components may be connected between the connection point of the main winding L1 and the connection point of the main power input. In order to increase the capacity and discharge time of the first capacitor C1, the first capacitor C1 is an electrolytic capacitor, and the positive electrode of the first capacitor C1 is coupled to the negative electrode of the main power input, and the negative electrode of the first capacitor C1 is coupled to the positive electrode of the main power input.

Accordingly, the main diode D1 may be varied, in some embodiments, the anode of the main diode D1 is connected to the anode of the first capacitor C1, in other embodiments, the cathode of the main diode D1 is connected to the cathode of the first capacitor C1, as long as the first capacitor C1 is prevented from charging the main winding L1, or as long as the first capacitor C1 is prevented from reverse charging the main power input.

The main power switch Q1 is provided with a first control terminal for receiving a control signal to control the on/off of the main power switch Q1. the main power switch Q1 may be different types of electronic components in different embodiments. In some embodiments, the main power switch Q1 may be a bipolar junction-induced transistor (BJT), in other embodiments, a Field Effect Transistor (FET), or other switching device, but may be any electronic device capable of receiving an external signal to turn on and off and having a small leakage current. The main power switch Q1 may also be placed at a different location, and in different embodiments, it may be connected in series with the positive or negative pole of the main power output, but it is sufficient that the positive and negative poles of the main power input are prevented from conducting directly through the main winding L1.

Specifically, in some embodiments and referring to fig. 4a, the main power switch Q1 is an NMOS transistor, the gate of the main power switch Q1 is a first control terminal, the source is connected to the negative terminal of the main power input, and the drain is connected to the main winding L1.

In some embodiments, referring to fig. 4b, the main power switch Q1 is an NMOS transistor, the gate of the main power switch Q1 is a first control terminal, the drain is connected to the positive input power, and the source is connected to the main winding L1.

In some embodiments, referring to fig. 4c, the main power switch Q1 is a PMOS transistor, the gate of the main power switch Q1 is a first control terminal, the drain is connected to the negative terminal of the main power input, and the source is connected to the main winding L1.

In some embodiments, referring to fig. 4d, the main power switch Q1 is a PMOS transistor, the gate of the main power switch Q1 is a first control terminal, the source is connected to the positive terminal of the main power input, and the drain is connected to the main winding L1.

In some embodiments, the main power switch Q1 is an NPN transistor, the base of the main power switch Q1 is a first control terminal, the emitter is connected to the negative terminal of the main power input, and the collector is connected to the main winding L1.

In some embodiments, the main power switch Q1 is an NPN transistor, the base of the main power switch Q1 is a first control terminal, the collector is connected to the positive terminal of the main power input, and the emitter is connected to the main winding L1.

In some embodiments, the main power switch Q1 is a PNP transistor, the base of the main power switch Q1 is the first control terminal, the collector is connected to the negative terminal of the main power input, and the emitter is connected to the main winding L1.

In some embodiments, the main power switch Q1 is a PNP transistor, the base of the main power switch Q1 is a first control terminal, the emitter is connected to the positive terminal of the main power input, and the collector is connected to the main winding L1.

Referring to fig. 4e to 4h, the first soft-start control unit includes an auxiliary switch Q2, an auxiliary winding L2, and a second capacitor C2 in the same loop and connected two by two, and the auxiliary winding L2 is magnetically coupled to the main winding L1. The topological connection modes of the auxiliary switch Q2, the auxiliary winding L2 and the second capacitor C2 are various, and only the auxiliary winding L2 needs to be coupled with the main winding L1, and it should be noted that the main winding L1 and the auxiliary winding L2 are arranged on the same magnetic core to realize mutual inductance coupling. In order to increase the capacity and the discharge time of the second capacitor C2, the second capacitor C2 is an electrolytic capacitor and the negative electrode of the second capacitor C2 is coupled to the first terminal and the positive electrode is coupled to the second terminal. The first terminal is a dotted terminal of the auxiliary winding L2 coupled to the positive terminal of the main power input with respect to the main winding L1, and the second terminal is a dotted terminal of the auxiliary winding L2 coupled to the negative terminal of the main power input with respect to the main winding L1.

The auxiliary switch Q2 is provided with a second control terminal for receiving a control signal to control the auxiliary switch Q2 to be turned on or off, and the auxiliary switch Q2 may be different types of electronic components in different embodiments. In some embodiments, the auxiliary switch Q2 may be a bipolar junction-induced transistor (BJT), in other embodiments, a Field Effect Transistor (FET), or other switching device, but may be any electronic device that can receive an external signal to turn on and off and has a small leakage current. The auxiliary switch Q2 may be disposed at different positions, and in different embodiments, it may be connected in series with the first or second input terminal, but it is sufficient that the second capacitor C2 is prevented from directly discharging the auxiliary winding L2.

Specifically, in some embodiments, referring to fig. 4e, the auxiliary switch Q2 is an NMOS transistor, the gate of the auxiliary switch Q2 is a second control terminal, the drain is connected to the second capacitor C2, and the source is connected to the second connection terminal.

In some embodiments, referring to fig. 4f, the auxiliary switch Q2 is a PMOS transistor, the gate of the auxiliary switch Q2 is a second control terminal, the source is connected to the second capacitor C2, and the drain is connected to the second input terminal.

In some embodiments, referring to fig. 4g, the auxiliary switch Q2 is an NMOS transistor, the gate of the auxiliary switch Q2 is a second control terminal, the source is connected to the second capacitor C2, and the drain is connected to the first connection terminal.

In some embodiments, referring to fig. 4h, the auxiliary switch Q2 is a PMOS transistor, the gate of the auxiliary switch Q2 is a second control terminal, the drain is connected to the second capacitor C2, and the source is connected to the first input terminal.

In some embodiments, the auxiliary switch Q2 is an NPN transistor, the base of the auxiliary switch Q2 is a second control terminal, the collector is connected to the second capacitor C2, and the emitter is connected to the second input terminal.

In some embodiments, the auxiliary switch Q2 is a PNP transistor, the base of the auxiliary switch Q2 is a second control terminal, the emitter is connected to the second capacitor C2, and the collector is connected to the second input terminal.

In some embodiments, the auxiliary switch Q2 is an NPN transistor, the auxiliary switch Q2 has a base terminal that is a second control terminal, an emitter terminal that is coupled to the second capacitor C2, and a collector terminal that is coupled to the first input terminal.

In some embodiments, the auxiliary switch Q2 is a PNP transistor, the base of the auxiliary switch Q2 is a second control terminal, the collector is connected to the second capacitor C2, and the emitter is connected to the first input terminal.

In order to reduce the switching loss, the first control terminal and the second control terminal periodically input the control signal, as shown in fig. 5, each period is divided into four stages, in which the first stage T1 sends the control signal to the first control terminal to turn off the main power switch Q1, the second control terminal sends the control signal to turn on the auxiliary switch Q2, in the second stage T2 the first control terminal sends the control signal to turn off the main power switch Q1, sends the control signal to the second control terminal to turn off the auxiliary switch Q2, in the third stage T3 sends the control signal to the first control terminal to turn on the main power switch Q1, sends the control signal to the second control terminal to turn off the auxiliary switch Q2, in the fourth stage T4 the first control terminal sends the control signal to turn off the main power switch Q1, and sends the control signal to the second control terminal to turn off the auxiliary switch Q2.

The change in state of each electronic component in each stage is shown in the following table:

in the first phase T1, the second capacitor C2 discharges in the on phase of the auxiliary switch Q2 to make the auxiliary winding L2 pass current, the main winding L1 generates an induced current and pulls up the potential of the main winding L1 close to the positive end of the main power input, and pulls down the potential of the main winding L1 close to the negative end of the main power switch Q1, so as to reduce the potential difference across the main power switch Q1 before the main winding L1 charges; the first capacitor C1 discharges to supply the output of the boost circuit, and the main diode D1 blocks the main winding L1 from supplying the output of the boost circuit.

In the second stage T2, the second capacitor C2 discharges to other loads during the off-phase of the auxiliary switch Q2, the main winding L1 discharges and keeps pulling up the potential of the main winding L1 near the positive terminal of the main power input, the main winding L1 pulls down the potential of the main winding L1 near the negative terminal of the main power switch Q1, and the main diode D1 blocks the main winding L1 from supplying power to the output terminal of the boost circuit.

In the third phase T3, the main winding L1 charges in the on phase of the main power switch Q1; the first capacitor C1 discharges to supply power to the output of the boost circuit, the main diode D1 blocks the main power output from supplying power to the output of the boost circuit before the main winding L1 discharges, and the auxiliary winding L2 charges during conduction of the main power switch Q1.

In a fourth phase T4, the main winding L1 discharges during the off phase of the main power switch Q1, the main diode D1 turns on to charge the main winding L1 to charge the first capacitor C1 and supply power to the output of the boost circuit, and the auxiliary winding L2 induces inductance and charges the second capacitor C2.

The main power switch Q1 and the auxiliary switch Q2 are controlled by control signals to reduce the switching loss according to the following principle: in the first stage T1, the main winding L1 generates induced electromotive force under the action of the auxiliary winding L2, and in the second stage T2, the main winding L1 discharges, both generating induced current and pulling up the potential of the main winding L1 close to the positive end of the main power input, and pulling down the potential of the main winding L1 close to the negative end of the main power switch Q1, so as to reduce the potential difference across the main power switch Q1 before the main winding L1 charges. That is, the high potential across the main power switch Q1 caused after the discharge of the fourth stage T4L1 is over will be removed during the first stage T1 and the second stage T2 to ensure that the main power switch Q1 remains low across the third stage T3 when the main power switch Q1 is turned on to generate a gradually increasing current.

The latter circuit is connected to the output of the former circuit, i.e. the booster circuit. The rear stage adopts an isolation circuit with a fixed duty ratio, so that the stress of components is low, and the conversion efficiency is high. In some embodiments, as shown in fig. 6, the subsequent stage circuit is a half bridge isolation circuit. In some embodiments, as shown in fig. 7, the post-stage circuit is a full bridge isolation circuit. In some embodiments, as shown in FIG. 8, the later stage circuit is an LLC isolation circuit.

Based on the same soft start principle as the above, the application also discloses another soft switch boost circuit with high voltage and wide input range, which comprises another front-stage circuit and a rear-stage circuit, wherein the front-stage circuit adopts a duty ratio adjusting mode to realize closed-loop output, the rear-stage circuit adopts an isolating circuit with fixed duty ratio, the stress of components is low, and the conversion efficiency is high. The wide-range input voltage can be well adapted by adopting the two-stage topology, and the adaptability is wider.

Referring to fig. 9, another pre-stage circuit includes a third switch Q3, a third winding L3, a third capacitor C3, a second diode D2 and a second soft start control unit, where the third switch Q3, the third capacitor C3 and the second diode D2 are located in the same loop and connected in pairs, a cathode of the second diode D2 is connected to an anode of the third capacitor C3 or an anode of the second diode D2 is connected to a cathode of the first capacitor C1, two ends of the third winding L3 are respectively coupled to an anode of the main power input and an anode of the third capacitor C3 or two ends of the third winding L3 are coupled to a cathode of the main power input and a cathode of the third capacitor C3 of the boost circuit, two ends of the third capacitor C3 serve as output ends, and a third control end for receiving a control signal to control the on and off of the third switch Q3 is disposed on the third switch Q3; the second soft start control unit comprises a fourth switch Q4, a fourth winding L4 and a fourth capacitor C4 which are positioned in the same loop and connected in pairs, the fourth winding L4 is magnetically coupled to the third winding L3, and a fourth control end used for receiving a control signal to control the on-off of the fourth switch Q4 is arranged on the fourth switch Q4.

Similar to the first pre-stage circuit disclosed in this application, the position of the second diode D2 can be adjusted adaptively, and the type of the third switch Q3 can be adjusted adaptively. The type and position of the fourth switch Q4 can be adjusted adaptively, and the connection mode of the positive electrode and the negative electrode of the fourth capacitor C4 can also be adjusted adaptively for the fourth switch Q4.

The third control terminal and the fourth control terminal periodically input a control signal, each cycle is divided into four stages, and a control signal is transmitted to the third control terminal to turn off the third switch Q3 in the first stage S1, to the fourth control terminal to turn on the fourth switch Q4, to the third control terminal to turn off the third switch Q3 in the fourth stage T2, to the fourth control terminal to turn off the fourth switch Q4, to the third control terminal to turn on the third switch Q3 in the third stage T3, to the fourth control terminal to turn off the fourth switch Q4, to the third control terminal to turn off the third switch Q3 in the fourth stage T4, and to the fourth control terminal to turn off the fourth switch Q4.

The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.