Switching circuit and operation method thereof
阅读说明:本技术 开关电路及其操作方法 (Switching circuit and operation method thereof ) 是由 孫士宸 于 2018-10-25 设计创作,主要内容包括:本申请涉及开关电路及其操作方法。该开关电路包含:经配置以从连接件的第一插脚接收第一信号的第一导电端子,经配置以从所述连接件的第二插脚接收第二信号的第二导电端子,电连接到所述连接件的第三插脚的第三导电端子,及电连接到所述连接件的第四插脚的第四导电端子。所述第三导电端子在接收到所述第一信号之后,将具有第一电压电平的第一电力信号输出到所述连接件的所述第三插脚,且所述第四导电端子在接收到所述第二信号之后,将具有第二电压电平的第二电力信号输出到所述连接件的所述第四插脚。(The present application relates to a switching circuit and a method of operating the same. The switching circuit includes: a first conductive terminal configured to receive a first signal from a first pin of a connector, a second conductive terminal configured to receive a second signal from a second pin of the connector, a third conductive terminal electrically connected to a third pin of the connector, and a fourth conductive terminal electrically connected to a fourth pin of the connector. The third conductive terminal outputs a first power signal having a first voltage level to the third pin of the connector after receiving the first signal, and the fourth conductive terminal outputs a second power signal having a second voltage level to the fourth pin of the connector after receiving the second signal.)
1. A switching circuit, comprising:
a first conductive terminal configured to receive a first signal from a first pin of a connector;
a second conductive terminal configured to receive a second signal from a second pin of the connector;
a third conductive terminal electrically connected to the third pin of the connector; and
a fourth conductive terminal electrically connected to the fourth pin of the connector,
wherein the third conductive terminal outputs a first power signal having a first voltage level to the third pin of the connector after receiving the first signal, and wherein the fourth conductive terminal outputs a second power signal having a second voltage level to the fourth pin of the connector after receiving the second signal, wherein the second voltage level is different from the first voltage level.
2. The switching circuit of claim 1, further comprising:
a fifth conductive terminal electrically connected to a fifth pin of the connector to provide for transmission of a third signal between the fifth conductive terminal and the fifth pin of the connector; and
a sixth conductive terminal electrically connected to the processing unit to provide a fourth signal to be transmitted between the sixth conductive terminal and the processing unit,
wherein a voltage level of the third signal is changed after receiving the second signal.
3. The switching circuit of claim 1, wherein when the switching circuit receives the second signal, the third pin of the connector receives the first power signal and the fourth pin of the connector receives the second power signal.
4. The switch circuit of claim 2, further comprising a seventh conductive terminal electrically connected to a power supply unit, wherein the power supply unit is configured to provide power signals of various voltage levels.
5. The switching circuit of claim 4, further comprising:
a first switch circuit electrically connected to the first, second, third, fourth, and seventh conductive terminals, wherein
The first switching circuit outputs the first power signal to the third pin of the connector after receiving the first signal, and outputs the second power signal to the fourth pin of the connector after receiving the second signal.
6. The switching circuit of claim 4, further comprising:
a first switch module electrically connected to the first, third, and seventh conductive terminals; and
a second switch module electrically connected to the second, fourth, and seventh conductive terminals.
7. The switch circuit of claim 6, wherein the first switch module receives the first power signal from the seventh conductive terminal and outputs the first power signal to the third pin of the connector after receiving the first signal, and wherein the second switch module receives the first power signal and the second power signal from the seventh conductive terminal and outputs the second power signal to the fourth pin of the connector after receiving the second signal.
8. The switching circuit of claim 6, wherein the first switching module includes a first capacitor electrically connected to the third conductive terminal to control a rise time of the first power signal.
9. The switch circuit of claim 6, wherein the second switch module is further electrically connected to the third conductive terminal, wherein the second switch module is enabled after receiving the first power signal from the third conductive terminal.
10. The switch circuit of claim 6, wherein the second switch module comprises an inverter circuit configured to change a voltage level of the second signal received from the second conductive terminal.
11. The switch circuit of claim 4, further comprising a second switch circuit electrically connected to the second, fifth, sixth, and seventh conductive terminals.
12. The switch circuit of claim 11, wherein the second switch circuit changes the voltage level of the third signal after receiving the second signal from the second conductive terminal.
13. The switching circuit of claim 11, wherein the second switching circuit comprises:
control logic electrically connected to the fifth, sixth, and seventh conductive terminals; and
a pull-up circuit electrically connected to the second, fifth, and seventh conductive terminals; wherein
The control logic provides the third signal for transmission between the fifth conductive terminal and the fifth pin of the connector; and is
The pull-up circuit changes a voltage level of the third signal after receiving the second signal.
14. The switch circuit of claim 13, wherein the pull-up circuit further comprises a first circuit and a second circuit, the first circuit turning on and the second circuit turning off after receiving the second signal.
15. The switching circuit of claim 14, wherein the first circuit comprises a p-type metal-oxide-semiconductor field-effect transistor (MOSFET) and a diode electrically connected between a drain and a source of the p-type MOSFET, and wherein the second circuit comprises an n-type MOSFET and a diode electrically connected between a drain and a source of the n-type MOSFET.
16. The switching circuit of claim 2, wherein the third signal comprises information about an electronic device electrically connected to the connector, the information comprising at least one of: a model name, a serial number, a temperature, a power consumption, or a performance of the electronic device.
17. The switching circuit of claim 6 wherein the first switching module is Efuse and the second switching module is Efuse.
18. The switch circuit of claim 1, wherein the third conductive terminal outputs the first power signal having the first voltage level to the third pin of the connection in response to the first signal being a ground level signal, and wherein the fourth conductive terminal outputs the second power signal having the second voltage level to the fourth pin of the connection in response to the second signal being a ground level signal.
19. The switching circuit of claim 11, wherein the second switching circuit changes the voltage level of the third signal when the second signal is a ground level signal.
20. A method of operating a switching circuit, comprising:
receiving a first signal at a first conductive terminal of the switching circuit from a first pin of a connector;
receiving a second signal at a second conductive terminal of the switching circuit from a second pin of the connector;
outputting a first power signal having a first voltage level to a third pin of the connector at a third conductive terminal of the switching circuit after receiving the first signal, and outputting a second power signal having a second voltage level to a fourth pin of the connector at a fourth conductive terminal of the switching circuit after receiving the second signal, wherein the second voltage level is different from the first voltage level.
21. The method of claim 20, further comprising:
providing transmission of a third signal between the fifth pin of the connector and the processing unit, an
Changing a voltage level of the third signal after receiving the second signal at the second conductive terminal from the second pin of the connector.
22. The method of claim 20, further comprising providing both the first power signal and the second power signal after receiving the second signal.
23. The method of claim 20, further comprising outputting the first power signal having the first voltage level in response to the first signal being a ground level signal, and outputting the second power signal having the second voltage level in response to the second signal being a ground level signal.
Technical Field
The present disclosure relates generally to switching circuits, and in particular, to switching circuits for electronic devices and methods of operating the same.
Background
With the development of technology, new products are entering the market every day. Sometimes, such developments take the form of constantly changing products over time. Newer models may differ from previous models in certain parameters (e.g., power consumption). The performance of the device may be adversely affected if the new specifications resulting from the new parameters are not met.
Disclosure of Invention
According to some embodiments of the present invention, a switch circuit includes a first conductive terminal, a second conductive terminal, a third conductive terminal, and a fourth conductive terminal. The first conductive terminal is configured to receive a first signal from a first pin of the connector. The second conductive terminal is configured to receive a second signal from the second pin of the connector. The third conductive terminal is electrically connected to the third pin of the connector. The fourth conductive terminal is electrically connected to the fourth pin of the connector. The third conductive terminal outputs a first power signal having a first voltage level to the third pin of the connection member after receiving the first signal, and the fourth conductive terminal outputs a second power signal having a second voltage level to the fourth pin of the connection member after receiving the second signal. The second voltage level is different from the first voltage level.
According to some embodiments of the invention, a method of operating a switching circuit. The method comprises the following steps: receiving a first signal at a first conductive terminal of a switching circuit from a first pin of a connector; receiving a second signal at a second conductive terminal of the switching circuit from a second pin of the connector; the first power signal having the first voltage level is output to the third pin of the connector at a third conductive terminal of the switching circuit after receiving the first signal, and the second power signal having the second voltage level is output to the fourth pin of the connector at a fourth conductive terminal of the switching circuit after receiving the second signal. The second voltage level is different from the first voltage level.
Drawings
Aspects of the present invention are readily understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that the various features may not be drawn to scale and that the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion.
Fig. 1A is a schematic diagram illustrating a system according to some embodiments of the inventions.
FIG. 1B is a schematic diagram illustrating another system according to some embodiments of the invention.
Fig. 2 is a schematic diagram illustrating a connector according to some embodiments of the present invention.
Fig. 3 is a schematic diagram illustrating a switching circuit according to some embodiments of the invention.
Fig. 3A is a schematic diagram illustrating a switch module according to some embodiments of the invention.
Fig. 3B is a schematic diagram illustrating another switch module according to some embodiments of the invention.
Fig. 4A is a schematic diagram illustrating a switching circuit according to some embodiments of the invention.
Fig. 4B is a schematic diagram illustrating another switching circuit, according to some embodiments of the invention.
Fig. 5 is a flow chart illustrating some operations according to some embodiments of the present invention.
Fig. 6 is a flow chart illustrating some operations according to some embodiments of the present invention.
Detailed Description
Embodiments of the invention and uses thereof are discussed in detail below. It should be appreciated, however, that the embodiments describe many applicable concepts that can be implemented in a wide variety of specific contexts. It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of various embodiments. Specific examples of components and arrangements are described below for discussion purposes. Of course, such components and arrangements are merely examples and are not intended to be limiting.
Unless otherwise specified, spatial descriptions including terms such as "above," "below," "upward," "left," "right," "downward," "top," "bottom," "vertical," "horizontal," "side," "upper," "lower," "upper," "above," "below," and the like are used herein with respect to the orientations shown in the corresponding figures. It is to be understood that the spatial descriptions used herein are for purposes of illustration and that actual implementations of the structures described herein may be spatially arranged in any orientation or manner, provided that the advantages of the embodiments of the invention are not so arranged.
The embodiments or examples illustrated in the figures are disclosed below using specific language. It will be understood, however, that the embodiments and examples are not intended to be limiting. Any alterations and modifications in the described embodiments, and any further applications of the principles disclosed herein are contemplated as would normally occur to one skilled in the relevant art to which the invention relates.
Additionally, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed herein.
Accordingly, there is a need to develop mechanisms to address the incompatibility between different models of devices (e.g., between legacy models and next generation models).
Fig. 1A is a schematic diagram illustrating a system according to some embodiments of the inventions. As shown in fig. 1A, the system 1A includes a power supply unit or
The
The
The connector 8 may include, but is not limited to, for example, a socket, a slot, an engagement mechanism, and the like. The connector 8 may comprise a memory card connector comprising an insulative housing defining a conductive terminal recess and two positioning recesses at its sidewalls. The protective shell is coupled with the insulative housing to form a (card) cavity. The connector 8 may include one or more anti-mismatch portions. The anti-mismatch portions have different widths and vertical lengths. The connector 8 may include conductive terminals that are secured in conductive terminal grooves and soldered to a circuit board (e.g., PCB) to electrically engage corresponding contacts of an electronic device (e.g., memory (card)) inserted into the cavity. The connector 8 is electrically connected to the
The
The conductive terminal T1 is electrically connected to the
The conducting terminal T2 of the
The conductive terminal T1 of the
The signal s2 is transmitted between the conducting terminal T2 of the
The signal s3 is transmitted between the conductive terminal T3 of the
The signal s5 is transmitted between the conductive terminal T5 of the
The conductive terminal T4 of the
The conductive terminal T6 of the
The signal s7 is transmitted between the conducting terminal T7 of the
The conductive terminal T4 of the
The
When the signal s3 received from the pin P1 of the connector 8 is a signal of a ground level or a relatively low voltage level, the conductive terminal T4 of the
When the signal s5 received from the pin P3 of the connector 8 is a signal of a ground level or a relatively low voltage level, the conductive terminal T6 of the
When the signal s5 received from the pin P3 of the connector 8 is a signal of a ground level or a relatively low voltage level, the
The power signal s4 has a voltage level that is different from the voltage level of the
FIG. 1B is a schematic diagram illustrating a system according to some embodiments of the inventions. The system 1B shown in fig. 1B is the same or similar to the system 1A as described and illustrated with reference to fig. 1A. In some embodiments, the system 1B shown in fig. 1B is different from the system 1A as described and illustrated with reference to fig. 1A.
The switching circuit 6B shown in fig. 1B is the same or similar to the
Referring to fig. 1B, the switch circuit 6B includes a switch circuit 62a and a switch circuit 64 a.
The switch circuit 62a includes conductive terminals VCC _1, VCC _2, IN _1, OUT _1, IN _2, and OUT _ 2. Although not illustrated, it is contemplated that the switch circuit 62a may include more or fewer conductive terminals.
The conductive terminal VCC _1of the switch circuit 62a is electrically connected to the
The conductive terminal VCC _2 of the switch circuit 62a is electrically connected to the
Conductive terminal IN _1of switch circuit 62a is electrically connected to pin P1 of connector 8. The conduction terminal IN _1of the switch circuit 62a is electrically connected to the conduction terminal T3 of the switch circuit 6 b.
The conducting terminal OUT _1of the switch circuit 62a is electrically connected to pin P2 of the connector 8. Conductive terminal OUT _1of switch circuit 62a is electrically connected to conductive terminal T4 of switch circuit 6 b.
Conductive terminal IN _2 of switch circuit 62a is electrically connected to pin P3 of connector 8. The conduction terminal IN _2 of the switch circuit 62a is electrically connected to the conduction terminal T5 of the switch circuit 6 b.
The conducting terminal OUT _2 of the switch circuit 62a is electrically connected to pin P4 of the connector 8. Conductive terminal OUT _2 of switch circuit 62a is electrically connected to conductive terminal T6 of switch circuit 6 b.
The conducting terminal VCC _1of the switch circuit 62a receives the power signal s1_ a from the
When the signal s3 received from the pin P1 of the connector 8 is a signal of a ground voltage level or a relatively low voltage level, the conductive terminal OUT _1of the switch circuit 62a outputs the power signal s1_ a to the pin P2 of the connector. When the signal s5 received from the pin P3 of the connector 8 is a signal of a ground voltage level or a relatively low voltage level, the conductive terminal OUT _2 of the switch circuit 62a outputs the power signal s1_ b to the pin P4 of the connector 8.
The power signal s1_ a has a voltage level different from that of the power signal s1_ b. The power signal s1_ a has a voltage level lower than that of the power signal s1_ b. The power signal s1_ a may have a voltage level of approximately 3.3V. The power signal s1_ b may have a voltage level of approximately 12V.
The switch circuit 64a includes conductive terminals VCC _1, VCC _3, D1, IN _1, and D2.
The conductive terminal VCC _1of the switch circuit 64a is electrically connected to the
The conductive terminal VCC _3 of the switch circuit 64a is electrically connected to the
Conductive terminal D1 of switch circuit 64a is electrically connected to
Conductive terminal D2 of switch circuit 64a is electrically connected to pin P5 of connector 8. Conductive terminal D2 of switch circuit 64a is electrically connected to conductive terminal T7 of switch circuit 6 b.
Conductive terminal IN _1of switch circuit 64a is electrically connected to pin P3 of connector 8. The conduction terminal IN _1of the switch circuit 64a is electrically connected to the conduction terminal T5 of the switch circuit 6 b.
The conducting terminal VCC _1of the switch circuit 64a receives the power signal s1_ a from the
The conducting terminal VCC _3 of the switch circuit 64a receives the power signal s1_ c from the
The power signal s1_ a has a voltage level different from that of the power signal s1_ c. The power signal s1_ a has a voltage level higher than that of the power signal s1_ c. The power signal s1_ a may have a voltage level of approximately 3.3V. The power signal s1_ c may have a voltage level of approximately 1.8V.
Switch circuit 64a is configured to provide transmission of signal s2 between
Fig. 2 is a schematic diagram illustrating a connector according to some embodiments of the present invention. The
Referring to fig. 2, the
When no electronic device is inserted into or engaged with the
Once the electronic device is inserted into or engaged with the
When no electronic device is inserted into or engaged with (or received by)
Pin P2 is configured to receive power signal s1_ a. The power signal s1_ a may have a voltage level of 3.3V.
Pin P4 is configured to receive power signal s1_ b. The power signal s1_ b may have a voltage level of 12V.
Power signals with relatively high voltage levels (e.g., 12V) can damage m.2ssd. Sideband signals with relatively high voltage levels (e.g., 3.3V) can damage m.2ssd.
Pin P5 of
Fig. 3 is a schematic diagram illustrating a switching circuit according to some embodiments of the invention. The switch circuit 62B shown in fig. 3 is the same as or similar to the switch circuit 62a as described and illustrated with reference to fig. 1B. In some embodiments, the switch circuit 62B shown in fig. 3 is different from the switch circuit 62a as described and illustrated with reference to fig. 1B.
Referring to fig. 3, the
The
The
The
Fig. 3A is a schematic diagram illustrating a switch module according to some embodiments of the invention. The switch module 622b shown in fig. 3A is the same as or similar to the
Referring to fig. 3A, the switch module 622b includes a plurality of conductive terminals. The switch module 622b contains control logic 6221. The conductive terminal VCC _1of the switch module 622b is configured to receive the power signal s1_ a from the
Switch module 622b includes a capacitor C _1 electrically connected to the conductive terminal dddt of switch module 622 b. The capacitor C _1 is used to control the rise time of the power signal s1_ a output to the pin P2 of the connector 8.
The capacitance value of the capacitor C _1 is designed to meet the standards or specifications of the electronic device. The capacitance value of the capacitor C _1 is designed to be compatible with the rise time of different electronic devices. The capacitance value of capacitor C _1 is designed to be compatible with the different rise times defined in the specifications of NGSFF SSD and m.2ssd. For example, in m.2ssd, the rise time of a received power signal may be defined as greater than 1 millisecond (ms). For example, in an NGSFF SSD, the rise time of a received power signal may be defined to be greater than 1 millisecond. In some embodiments of the present application, capacitor C _1 has a capacitance value of approximately 1.5 nanofarads (nF). In some embodiments of the present application, capacitor C _1 has a capacitance value that controls/facilitates power signal s1_ a to have a rise time of approximately 1.5 milliseconds. Capacitor C _1 has a capacitance value that controls/facilitates power signal s1_ a to have a rise time that meets the criteria or standards defined in the specifications of the NGSFFSSD. Capacitor C _1 has a capacitance value that controls/facilitates power signal s1_ a to have a rise time that meets the criteria or standards defined in the specification of m.2ssd. In some embodiments, control logic 6221 is an eFuse component that may provide over voltage protection and/or over current protection.
Fig. 3B is a schematic diagram illustrating a switch module according to some embodiments of the invention. The switch module 624B shown in fig. 3B is the same as or similar to the
Referring to fig. 3B, the switch module 624B includes an
The conductive terminal VCC _1 is configured to receive the power signal s1_ a from the
The conductive terminal VCC _2 is configured to receive the power signal s1_ b from the
An enable conductive terminal EN of the
Conducting terminal OUT _2 is configured to output power signal s1_ b upon or after receiving signal s5 at conducting terminal IN _ 2.
The
Referring to FIG. 3B, capacitor C _2 is electrically connected to conductive terminal dV/dT of
For example, in m.2ssd, the rise time of a received power signal may be defined to be greater than 1 millisecond (ms). For example, in an NGSFF SSD, the rise time of a received power signal may be defined to be greater than 1 millisecond. In some embodiments of the present application, capacitor C _2 has a capacitance value of approximately 0.1 microfarads (μ F). In some embodiments of the present application, capacitor C _2 has a capacitance value that controls/facilitates a rise time of power signal s1_ b to be approximately 1.2 milliseconds. Capacitor C _2 has a capacitance value that controls/facilitates power signal s1_ b to have a rise time that meets a criterion or criteria defined in the specification of the NGSFF SSD. Capacitor C _2 has a capacitance value that controls/facilitates power signal s1_ b to have a rise time that meets the criteria or standards defined in the specification of m.2ssd.
Referring to fig. 3B, the switch module 624B includes a resistor R _1 connected in series with a resistor R _ 2. Resistors R _1 and R _2 can act as voltage dividers to provide suitable bias voltages to control
Fig. 4A is a schematic diagram illustrating a switching circuit according to some embodiments of the invention. In some embodiments, the switch circuit 64B shown in fig. 4A is the same as or similar to the switch circuit 64A as described and illustrated with reference to fig. 1B. In some embodiments, the switch circuit 64B shown in fig. 4A is different from the switch circuit 64A as described and illustrated with reference to fig. 1B.
Referring to fig. 4A,
The
Pull-
Although conductive terminals D1 and D2 are illustrated in fig. 4A as single connections, respectively, for simplicity, it is contemplated that conductive terminal D1 may include multiple connections to
Pull-
Pull-
Fig. 4B is a schematic diagram illustrating a switching circuit according to some embodiments of the invention. The
Referring to fig. 4B,
The
Each of the conductive terminals D1 and D2 provides two or more connecting channels. Each of the conductive terminals D1 and D2 provides two or less than two connecting channels. Each of the connection channels of the conductive terminal D1 is configured to provide transmission of a different signal. Each of the connection channels of the conductive terminal D2 is configured to provide transmission of a different signal. Each of the connection channels of the conductive terminal D1 is configured to provide for the transmission of signals carrying different data or information. Each of the connection channels of the conductive terminal D2 is configured to provide for the transmission of signals carrying different data or information.
Referring to fig. 4B, pull-up circuit 644B includes, for example, two
IN one operation, when a signal of a relatively low voltage level (e.g., ground voltage level or logic low) is received from conductive terminal IN _1, terminals M2 and M4 of pull-up
IN another operation, when a signal of a relatively high voltage level (e.g., logic high) is received at the conductive terminal IN _1, the terminals M2 and M4 are opened or closed and the terminals M5 and M6 are electrically connected or turned on. The voltage level of the signal s7 transmitted between the conductive terminal D2 and the pin P5 of the connector 8 is changed according to the power signal received from the conductive terminal VCC _ 3. The signal s7 transmitted between the conductive terminal D2 and the pin P5 of the connector 8 may have a voltage level substantially the same as the voltage level of the power signal s1_ c received from the conductive terminal VCC _ 3.
Fig. 5 is a flow chart illustrating some operations according to some embodiments of the present invention. In
In some embodiments, when an electronic device (e.g., m.2ssd) is inserted into or engaged with a connector (e.g., a connector as shown in fig. 1A, 1B, 2), the voltage level of the conductive terminals of the connector is pulled down to a relatively low voltage level (e.g., a ground voltage level). For example, when the m.2ssd is inserted into or engaged with the connector 8 of fig. 1A or 1B, the voltage level of pin P1 of the connector 8 is pulled down to a relatively low voltage level. For example, when the m.2ssd is inserted into or engaged with
The switching circuit may receive a first signal at a relatively low voltage level from the connector when or after the voltage level of the conductive terminal of the connector is pulled down to the relatively low voltage level. For example, the
The switching circuit may output a power signal having a first voltage level to the connection upon or after receiving a first signal having a relatively low voltage level from the connection. For example, upon or after receiving signal s3 from connection 8 of fig. 1A, switching
In some embodiments, the voltage level of the conductive terminals of the connector will remain unchanged when the m.2ssd is inserted into or engaged with the connector. For example, when the m.2ssd is inserted into or engaged with the connector 8 of fig. 1A or 1B, the voltage level of pin P3 will remain unchanged. For example, when the m.2ssd is inserted into or engaged with
In some embodiments, the switching circuit does not change the voltage level of the signal provided to the connection when the m.2ssd is inserted into or engaged with the connection. By maintaining the signal provided to the connection at a relatively low voltage level, the switching circuit may protect the m.2ssd from damage. For example, when the m.2ssd is inserted into or engaged with the connection 8 of fig. 1A, the
In another embodiment, when the NGSFF SSD is inserted into or engaged with a connector, the voltage level of the conductive terminals of the connector will be pulled down to a relatively low voltage level (e.g., ground voltage level). For example, when an NGSFF SSD is inserted into or engaged with connector 8 of fig. 1A or 1B, the voltage level of pin P1 will be pulled down to a relatively low voltage level. For example, when an NGSFF SSD is inserted into or engaged with
The switching circuit will receive a signal having a relatively low voltage level from the connector when or after the voltage level of the conductive terminals of the connector is pulled down to the relatively low voltage level. For example, the
The switching circuit outputs a power signal having a relatively low voltage level to the connection upon or after receiving a signal having a relatively low voltage level from the connection. For example, upon or after receiving signal s3 from connection 8 of fig. 1A,
When the NGSFF SSD is inserted into or engaged with the connector, the voltage level of the conductive terminals of the connector will be pulled down to a relatively low voltage level (e.g., ground voltage level). For example, when an NGSFF SSD is inserted into or engaged with connector 8 of fig. 1A or 1B, the voltage level of pin P3 will be pulled down to a relatively low voltage level. For example, when the NGSFF SSD is inserted into or engaged with
The switching circuit outputs a power signal having a relatively high voltage level to the connection upon or after receiving a signal having a relatively low voltage level from the connection. For example, upon or after receiving signal s5 from connection 8 of fig. 1A, switching
The switching circuit will change the voltage level of the signal supplied to the connection upon or after receiving a signal having a relatively low voltage level from the connection. For example, upon or after receiving signal s5 from connection 8 of fig. 1A, switching
Fig. 6 is a flow chart illustrating some operations according to some embodiments of the present invention. The flowchart as shown in fig. 6 is similar to the flowchart as described and illustrated with reference to fig. 5, except that
As used herein, the singular terms "a," "an," and "the" may include plural referents unless the context clearly dictates otherwise. In the description of some embodiments, an element provided "on," "over," or "above" another element may encompass the case where the preceding element is directly on (e.g., in physical contact with) the succeeding element, as well as the case where one or more intervening elements are located between the preceding and succeeding elements.
As used herein, the terms "substantially," "approximately," and "about" are used to describe and explain minor variations. When used in conjunction with an event or circumstance, the terms can refer to the case in which the event or circumstance occurs specifically, as well as the case in which the event or circumstance occurs in close approximation. For example, when used in conjunction with numerical values, the term can refer to a variation of less than or equal to ± 10% of the numerical value, such as a variation of less than or equal to ± 5%, less than or equal to ± 4%, less than or equal to ± 3%, less than or equal to ± 2%, less than or equal to ± 1%, less than or equal to ± 0.5%, less than or equal to ± 0.1%, or less than or equal to ± 0.05%. For example, the term "about" or "substantially" with equal reference to two values may mean that the ratio of the two values is in a range between 0.9 and 1.1 (including 0.9 and 1.1).
Additionally, amounts, ratios, and other numerical values are sometimes presented herein in a range format. It is to be understood that such range format is used for convenience and brevity, and should be interpreted flexibly to include not only the numerical values explicitly recited as the limits of the range, but also to include all the individual numerical values or sub-ranges encompassed within that range as if each numerical value and sub-range is explicitly recited.
While the invention has been described and illustrated with reference to specific embodiments thereof, such descriptions and illustrations do not limit the invention. It will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the true spirit and scope of the invention as defined by the appended claims. The description may not necessarily be to scale. Due to manufacturing processes and tolerances, there may be differences between the present technology presentation and actual equipment. Other embodiments of the invention may exist that are not specifically illustrated. The specification and drawings are to be regarded in an illustrative rather than a restrictive sense. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit and scope of the present invention. All such modifications are intended to be within the scope of the claims appended hereto. Although the methods disclosed herein have been described with reference to particular operations performed in a particular order, it should be understood that such operations may be combined, sub-divided, or reordered to form equivalent methods without departing from the teachings of the present disclosure. Accordingly, unless specifically indicated herein, the order and grouping of the operations is not a limitation of the present invention.
Drawing translation
FIG. 2
Reserved MFG _ DATA
Reserved MFG _ CLOCK
FIG. 3B
OUT _1of 622a 622a
FIG. 5
501 receiving a first signal?
No. No
End
Yes is
502 output a first power signal
504 output a second power signal
503 receiving a second signal?
Yes is
End
No. No
End
505 change the voltage level of the signal
End
FIG. 6
501 receiving a first signal?
No. No
End
Yes is
502 output a first power signal
503 receiving a second signal?
Yes is
504 output a second power signal
No. No
End
505 change the voltage level of the signal
End
- 上一篇:一种医用注射器针头装配设备
- 下一篇:信号传输设备和驱动设备