阅读说明：本技术 用于防止短路或过电流保护的不期望触发的方法和设备 (Method and apparatus for preventing undesired triggering of short-circuit or overcurrent protection ) 是由 S·罗伊 A·乔汉 V·古普塔 于 2019-07-18 设计创作，主要内容包括：本申请涉及用于防止短路或过电流保护的不期望触发的方法和设备。公开用于防止短路或过电流保护的不期望触发的方法、设备、系统和制品。示例设备(500)包括输出端子(108)；电压检测装置(506),其耦连到电压检测输入端子和输出端子(108)并且包括耦连到逻辑门(508)第一输入端子的电压检测输出(520)；脉冲扩展器(510),其耦连在逻辑门(508)输出(526)和选择节点(528)之间；多路复用器(522),其耦连到选择节点(528)并且被配置为耦连到第一保护电路(512)、第二保护电路(514)和驱动器(540)；以及开关(530),其耦连在输入端子(524)和输出端子(108)之间并且包括耦连到驱动器(540)的开关栅极端子。(An example apparatus (500) includes an output terminal (108), a voltage detection device (506) coupled to the voltage detection input and output terminals (108) and including a voltage detection output (520) coupled to a th input terminal of logic (508), a pulse extender (510) coupled between a logic (508) output (526) and a select node (528), a multiplexer (522) coupled to the select node (528) and configured to be coupled to a th protection circuit (512), a second protection circuit (514), and a driver (540), and a switch (530) coupled between the input terminal (524) and the output terminal (108) and including a switch gate terminal coupled to the driver (540).)

An apparatus of the type , comprising:

an output terminal;

a voltage detection device coupled to the voltage detection input terminal and the output terminal and including a voltage detection output coupled to the th input terminal of logic ;

a pulse expander coupled between the logic output and the select node;

a multiplexer coupled to the selection node and configured to be coupled to the th protection circuit, the second protection circuit and the driver, and

a switch coupled between an input terminal and the output terminal and including a switch gate terminal coupled to the driver.

2. The apparatus of claim 1, further comprising a current sensor coupled to the input terminal and the output terminal.

3. The apparatus of claim 1, further comprising a current increase detector coupled to the logic input.

4. The apparatus of claim 1, wherein logic includes the logic output coupled to the pulse stretcher.

5. The apparatus of claim 1, wherein the th protection circuit is coupled to a multiplexer th input and the second protection circuit is coupled to a multiplexer second input.

6. The apparatus of claim 1, wherein the voltage detection device comprises a voltage detection output coupled to an inverting input terminal of the logic .

7. The apparatus of claim 1, wherein the voltage detection device comprises a voltage detection output coupled to a non-inverting input terminal of logic .

An apparatus of the type , comprising:

a current increase detection circuit for comparing an input current and an output current and generating a current detection signal when the output current is increasing;

a voltage detection device coupled to receive a supply voltage and an output voltage, wherein the voltage detection device generates a voltage detection signal when the output voltage increases;

logic coupled to receive the current detection signal and the voltage detection signal and to generate a selection signal based on the current detection signal and the voltage detection signal, and

a pulse expander for extending the select signal for a predetermined time to block an output of an th protection device, wherein the output of the th protection device will shut off the output voltage provided to a load.

9. The apparatus of claim 8, further comprising a multiplexer coupled to the pulse stretcher to output an information signal based on the selection signal.

10. The apparatus of claim 9, wherein the information signal is based on the -th or second protection device.

11. The apparatus of claim 8, wherein the th protection device is enabled when the output current satisfies an th threshold indicative of a user-defined value, and a second protection device is enabled when the output current satisfies a second threshold indicative of a maximum defined value.

12. The apparatus of claim 8, wherein the voltage detection device receives a high voltage and converts to a low voltage.

13. The apparatus of claim 8, wherein the voltage detection device comprises a sensitivity large enough to detect small movements of the output voltage.

14. The apparatus of claim 8, wherein the voltage detection device receives an input voltage to detect when the input voltage is increasing.

15, , a system comprising:

an th server configured to be coupled to an input power source, the th server comprising:

a load receiving power from the input power source; and

power path means for avoiding generation of an unwanted interruption of supply voltage when no fault is present on the load; and

a second server coupled in parallel to the th server and configured to be coupled to the input power source, wherein the second server generates an input transient at the th server.

16. The system of claim 15, wherein the power path device does not remove the voltage provided to the load during the input transient.

17. The system of claim 15, wherein the second server comprises a power path device and a load.

18. The system of claim 15, wherein the power path device removes the supply voltage to the load when the load draws excessive current.

19. The system of claim 18, wherein the power path device includes a fast response time with respect to sensing when the load is drawing current excessively and removing the supply voltage.

20. The system of claim 15, wherein the power path device is programmable to remove the supply voltage when a user-defined current value is drawn by the load.

Technical Field

The present disclosure relates generally to circuit protection and more particularly to preventing undesired triggering of short circuit or overcurrent protection.

Background

Short circuits are unintended connections between the supply network and another grid (such as ground).

Disclosure of Invention

Drawings

Fig. 1 is a timing diagram illustrating signals associated with the operation of a protection device that triggers short-circuit protection.

Fig. 2A and 2B are block diagrams illustrating example implementations of example power paths.

Fig. 3 is a block diagram illustrating an example power supply circuit that provides power to multiple loads.

Fig. 4 is a signal graph illustrating the response of the example power circuit of fig. 2 when loads are removed.

Fig. 5A and 5B are block diagrams illustrating additional details of the example power path of fig. 2.

Fig. 6 is a flow chart showing the functions of the block diagram of fig. 5A.

Fig. 7 is a schematic diagram illustrating additional details of an example implementation of the current increase detector of fig. 5A and 5B.

FIG. 8 is a schematic diagram illustrating additional details of an example implementation of the output voltage drop detector of FIG. 5A.

Fig. 9 is a signal graph illustrating the response of the elements of the example block diagram of fig. 5A when a short circuit occurs.

FIG. 10 is a signal graph illustrating the response of the elements of the example block diagram of FIG. 5A when a transient occurs at the input.

As used in this application, it is stated that any portion (e.g., layer, film, region, area, or plate) is above another portion (e.g., positioned above … …, above … …, disposed above … … or formed above … …, etc.) in any way, indicating that the referenced portion is in contact with another portion, or indicating that the referenced portion is above another portion with or more intermediate portions therebetween.

In examples, the descriptor "" may be used to refer to elements in the detailed description, while the same elements may be referred to in the claims with different descriptors such as "second" or "third".

Detailed Description

As used herein, the term "over" is used with respect to the bulk of a base semiconductor substrate (e.g., a semiconductor wafer) on which components of an integrated circuit are formed, in particular, as used herein, a th component of the integrated circuit is "over" a second component when a th component is remote from the bulk of the semiconductor substrate.

A power path protection device is a circuit that provides power to a load while also regulating the amount of power the load is receiving in order to protect the load from transients, short circuits in the circuit, etc. for example, short circuit protection (also referred to as SCP) is a feature of the power path protection device.

In examples, the SCP threshold is scalable (e.g., the SCP threshold may be varied) to effectively protect the system based on current limit values provided by the input power source and/or the load manufacturer.

Triggering the SCP due to the power transient is undesirable in examples when the SCP is triggered due to an increase in current through the switch due to the power transient (supply transient), for example, a sudden change in the electrical device may result in a power transient (e.g., a high voltage surge lasting for a fixed period of time) due to stored energy contained in any circuit inductance and/or capacitance.

For example, a plurality of servers in a rack are connected to a Power Distribution Unit (PDU) that distributes sufficient power to each server in the rack.

L × di/dt (equation 1)

Wherein the surge voltage (V) is equal to the inductance (L) multiplied by the change in current turn-off (shutdown) over time (di/dt). The surge voltage (V) increases the current through the power protection device. If the current meets (e.g., exceeds) a threshold (e.g., set by a current limit), the SCP may be triggered and thus the power to the remainder of the servers connected in the rack is turned off. The surge voltage (V) may not damage the PDU or the server, and thus, turning off power to the server causes user inconvenience, system downtime, and the like, which are undesirable.

FIG. 1 illustrates a timing diagram 100 illustrating signals associated with the operation of a protection device when an input voltage 102 provides a supply transient to a load via the protection device the input voltage 102 increases at time t1 indicating a supply transient at time t1 the output voltage 108 of the protection device increases along with the output current 112 the output current 112 shows a spike and the spike in current at time t2 meets a threshold set by the manufacturer, but the output current 112 increase is not due to a short circuit and therefore should not remove power from the load due to the output current 112 spike.

The timing diagram 100 depicts the gate-source voltage (Vgs)114 of a power MOSFET located in a protection device, the power MOSFET provides current to a load and is turned on and off depending on the load condition, Vgs 114 is pulled down at time t2, which is the total short circuit response time after the output current 112 meets a threshold current of 36 amps.

The example methods and apparatus disclosed herein enable or disable a scalable SCP and enable a maximum SCP, for example, the methods and apparatus disclosed herein include an output voltage droop detector to determine whether an output current of the switch is increasing and an output voltage is increasing and disable the scalable SCP when the monitored current is increasing.

Example methods and apparatus disclosed herein utilize results between comparisons of a current increase detector and an output voltage drop detector to distinguish between a power supply transient event and a short circuit load event. For example, when the current increase detector determines that the current at the switch output is increasing and when the output voltage drop detector determines that the output voltage at the switch is dropping, then it is a short circuit load event. When the current increase detector determines that the output current is increasing and the output voltage drop detector determines that the output voltage is not dropping, then it is a power supply transient event. These results are discussed in detail below in conjunction with fig. 1-9.

As used herein, the term power path refers to a power path protection device that includes an SCP and a power converter, linear regulators, power multiplexers, fuses, load switches, etc. for example, a power path distributes power to a load ( or more) while also providing protection to the load.

As used herein, scalable short-circuit protection (SCP) refers to the ability of an SCP threshold to vary based on user demand.A power path may service a load between specific rated load currents, such as 1 to 5 amps, for example, and the SCP of the power path device may be set to include current thresholds from anywhere between 1 to 5 amps depending on the user.in examples, a user may define a steady state current at which they wish their load to operate, in which case the SCP may be designed to be percent higher than the steady state current.A current limit threshold is 3 amps, for example, if the steady state current of the load is 2 amps and the SCP threshold is 50% higher than the steady state current of 2 amps.

For example, a load operating at steady state of 2 amps as described above may be a 5 amp rated device, and 7.5 amps may be handled for amounts of time without damage.

As used herein, the term "steady state" refers to an equilibrium condition of a circuit that occurs when the effects of transients are no longer significant. For example, when the current at each point in the circuit is constant (e.g., does not change over time), the circuit is in a steady state.

Turning to the drawings, a block diagram of an example power path 106 for protecting a load 110 is illustrated in fig. 2A and 2B the example of fig. 2B illustrates a power supply transient in which the response of the power path 106 is not to trigger an SCP the example of fig. 2A illustrates a load 110 shorted to ground in which the response of the power path 106 is to trigger an SCP fig. 3 and 4 illustrate an example manner of implementing multiple power paths 106 for protecting multiple loads in schematic diagrams fig. 5A and 5B illustrate an example system 500 diagram for overcoming the above-described problems associated with unwanted triggering of an SCP fig. 2A and 2B are described in further detail below .

In FIG. 2A, an example input voltage (Vin)102 is provided to an example power path 106 where the voltage is distributed to example loads 110. the example power path 106 includes a number of functions, such as Short Circuit Protection (SCP), voltage conversion (e.g., converting a high input voltage 102 to a low output voltage 108), and/or voltage regulation (e.g., regulating the amount of output voltage 108 provided to the loads 110). The purpose of the example power path 106 is to provide a turn-off mechanism for the example loads 110 (e.g., to prevent the input voltage 102 from being provided to the loads 110) when the example loads 110 are shorted to ground or when the example loads 110 output a current greater than a threshold value. for example, when the loads 110 are shorted to ground, the voltage begins to drop due to a lack of resistance between the loads 110 and ground, so there is an excessive current conducted through the loads due to low impedance. in some examples of , the excessive current may damage the power source providing the input voltage 102 and/or the power path 106. the block diagram of FIG. 2A illustrates the example loads 110 shorted to ground.

In FIG. 2B, an example input is shownThe input current (I)_IN)104 is increasing for a short period of time, similar to a pulse, the input current 104 of fig. 2B is indicative of a power supply transient that may result in an increase in current conducted through the example load 110. additionally or alternatively, during the power supply transient, the input voltage 102 may also increase for a short period of time. in some examples, when the input current 104 is a transient, the current conducted across the load 110 increases beyond a threshold.

FIG. 3 illustrates an example power supply circuit 300 in which multiple power paths 106 have a common power supply (Vsupply) 302. The example power circuit 300 includes an example power supply 302, an example card a 304, an example card B306, an example input capacitor 310, an example power path 106, an example bulk (bulk) capacitor 312, and an example load 110. The example power supply circuit 300 also includes intrinsic or parasitic inductances Lsupply308 and Lcard 316 that are a result of power being conducted across the connecting wires in the example power supply circuit 300. Lsupply308A may be referred to as a distributed inductance across the example power supply circuit 300 from the positive side of the example power supply 302, and Lsupply 308B may be referred to as a distributed inductance on the negative power supply side (e.g., ground reference). The Lcard 316A can be referred to as a parasitic inductance between the example card a 304 and the example card B on the positive power side (e.g., an undesirable effect of routing an electrical connection on a printed circuit board), and the Lcard 316B can be referred to as a parasitic inductance on the negative power side (e.g., a ground reference).

In FIG. 3, an example power circuit 300 includes an example power supply 302 that supplies power to an example card A304 and an example card B306. example card A304 generally represents a system, e.g., a server, where the server includes a power path 106 coupled to a motherboard (e.g., a load 110). example card A304 also includes components such as an example input capacitor 310 and an example bulk capacitor 312. in some examples, the input capacitor 310 is an electrical component that provides filter characteristics for the example power path 106, such as reducing ripple voltage, regulating incoming DC voltage, reducing impedance imposed by the power supply 302, etc. in other examples, the input capacitor 310 may be a depicted parasitic capacitor that is concentrated at the input of the power path 106. example card A304 also includes an example bulk capacitor 312 that is intentionally coupled to the input of the example load 110 to provide voltage ripple filtering (e.g., to remove or reduce variations in voltage) for steps .

In FIG. 3, example card B306 is a replica of example card A304, where example card B306 is coupled in parallel to example card A and receives power from example power supply 302. in some examples, card B306 may be a server that is different from the card A server but is located in the same rack (e.g., a frame for housing multiple servers, hard drives, modems, and other electrical devices.) example input capacitor 310 of card B306 may be provided to determine input voltage Vinb 102 provided to example power path 106. in other examples, card B306 may be different from card A304, such as different loads 110, card B306 may include different capacitor sizes and input voltages.

FIG. 4 is an example signal graph 400 depicting the input voltage Vina 102 of example card A304, the input current Iin _ a 304 of example card A304, and the input voltage Vinb 102 of example card B306 when example card B306 is removed from the example power supply 302 of example power supply circuit 300. referring to FIG. 3, example card B306 is removed from the power supply 302 at time t1 and is open as indicated by the open example switch 320A and the open example second switch 320B. in some examples, when card B306 is removed, the current flowing into card B306 (i.e., Iin _ B318) is diverted to other cards connected to the chassis, such as card A304, resulting in a transient. turning to FIG. 4, at time t1, example card B306 is removed from the example power supply 302 and the card B306 input voltage is reduced to zero and the input current Iin _ a 304 is increased until time t2, where the increase in input current 304 is transient 2, the input current 304 is reduced until the load current is reduced by the load current value of example card 110, if the load current is maintained at time t2 and the load current is short circuit 104.

The time between time t1 and time t2 is a short period of time (e.g., nanoseconds) in which the signal of the example signal graph 400 illustrates a transient (e.g., an increase in the input current 304) and an increase in the input voltage of Vina 102 and a decrease in the input voltage of Vinb 102 in response to the example card B306 being removed. For example, at time t1, Vina 102 increases until time t2, and then returns to the initial value (e.g., decreases as input current 304 decreases). Further, at time t1, Vinb 102 decreases due to the cutting of the voltage from the example power supply 302.

In examples, a previous power path such as a fuse, regulator, etc. would have sensed the input current 304 transient and determined that there was too much current provided to the load 110 and thus removed the voltage provided to the load 110. in this manner, there was an undesirable interruption in the supply voltage when there was no fault on the load 110. the examples illustrated in FIGS. 5A and 5B did not remove the voltage provided to the load 110 during the input current 304 transient.

FIG. 5A illustrates an example system 500 diagram for determining whether current at an example load 110 is increasing and voltage at the load is decreasing to enable a scalable SCP 512. in FIG. 5A, the example system 500 diagram determines whether current at the example load 110 is increasing and an output voltage 108 at the example load 110 is increasing to enable a maximum SCP 514. the example system 500 diagram is coupled to a power MOSFET (powerFET)530 via a gate driver 540 and includes an example current sensor 501, an example current monitor 502, and an example current increase detector 504, an example output voltage (vout) droop detector 506, an example logic 508, an example pulse extender 510, a scalable example SCP 512, an example maximum SCP514, and an example multiplexer 522.

In FIG. 5A, the example system 500 illustrates an example current sensor 501 for measuring current to a load, the example current sensor 501 is a two-port network (e.g., two inputs Vin 102 and Vout108 and two outputs) including a sensing element, the sensing element is any type of electronic component ( or more) that may be used to measure current across the outputs.

In FIG. 5A, the example system 500 illustrates an example current monitor 502 to equalize two outputs of the example current sensor 501 to determine a current provided to the example load 110 at the output voltage 108 node and to differentiate between voltages to determine whether the voltage is negative or positive.

In FIG. 5A, the example system 500 illustrates an example current increase detector 504 to determine when the current monitor output 516 is increasing or decreasing. for example, the current increase detector 504 includes a zero-crossing detector to determine when a differential (differential) of 516 crosses a positive threshold or a negative threshold the example current increase detector 504 generates a current detect signal on an output 518 to indicate when the current at the load 110 is increasing or decreasing. for example, the current increase detector 504 may output a digital 1 to indicate that the current at the load 110 is increasing and a digital 0 to indicate that the current at the load 110 is decreasing the example current increase detector 504 is coupled to a non-inverting input of the example logic 508 the example current increase detector 504 is described in detail below in connection with FIG. 7, step .

In fig. 5A, the example system 500 illustrates an example Vout droop detector 506 to determine whether the output voltage 108 is dropping (e.g., the voltage is dropping). For example, the Vout droop detector 506 senses the output voltage 108, the output voltage 108 may be a high voltage (e.g., greater than a voltage used for digital processing, or greater than 1-3 volts, depending on the semiconductor process used to implement the circuit) that provides power to the load and the Vout droop detector 506 converts the high voltage to a low voltage domain (e.g., a voltage used for digital processing, depending on the semiconductor process used to implement the circuit) logic signal. The example Vout droop detector 506 includes a sensitivity large enough to detect small movements of the output voltage 108, where the sensitivity is defined as the minimum amplitude of the input signal (e.g., the output voltage 108) required to produce a specified output signal (e.g., the second output signal 520). For example, the input voltage Vina 102 illustrated in the example signal graph 400 in fig. 4 depicts a voltage increase, and the example output voltage droop detector 506 detects the voltage increase and outputs a logic 1 or a logic 0 on the second output 520.

The example Vout droop detector 506 includes an example inverter 830 (FIG. 8) coupled to the second output 520. in examples, the Vout droop detector 506 will output a logic 1 (e.g., a logic HIGH (HIGH)) at the second output 520 when the Vout droop detector 506 detects that the output voltage 108 is dropping (e.g., is decreasing). The inverter 830 receives a logic 0 and inverts it to a logic 1, for example, when the output voltage 108 is dropping (e.g., is decreasing). The example Vout droop detector 506 is coupled to the inverting input pin of the example logic 508 via the example second output 520. in examples, the second output 520 is inverted a second time by the logic 508. for example, when the inverter 830 outputs a logic 1, the inverting input of the logic 508 inverts the logic 1 to a logic 0. additionally or alternatively, the logic 508 may not include the inverting input 520, but instead includes a second non-inverting input from which the digital signal is received Vout droop detector 506 is described in detail below in connection with FIG. 8 to .

In fig. 5A, the system 500 diagram includes example logic 508 to receive two inputs (e.g., output 518 and second output 520) and provide a single output (e.g., determine output 526) that determines when scp should be enabled or disabled in some examples, logic 0508 is and that outputs a logic 1 only when both inputs are 1. for example, when output 518 is a logic 1 and second output 520 is a logic 0, logic 508 may output a 1 because the second output is coupled to an inverting input of logic 508, where logic 0 is inverted to logic 1. in other examples, if second output 520 is coupled to a second non-inverting input of logic 508, logic 508 will output a logic 1 when output 518 and second output 520 are both logic 1.

In some examples , a logic 1 at the determination output 526 determines to block the scalable SCP 512. for example, when the current increase detector 504 determines that the load current 314 is increasing, it outputs a logic 1, and when the Vout drop detector 506 determines that the output voltage 108 is not decreasing (e.g., it is stable OR increasing), it outputs a logic 0, which is inverted to a logic 1 by the inverting input of the logic 508. if the load current 314 is increasing and the output voltage 108 is increasing, a transient may have occurred in the power path 106. in some examples , a logic 0 at the determination output 526 determines to select the scalable SCP 512. for example, when the current increase detector 504 determines that the load current 110 is increasing, it outputs a logic 1, and when the Vout drop detector 506 determines that the output voltage 108 is decreasing, it outputs a logic 1, which is inverted to a logic 0 by the inverting input of the logic . if the load current is increasing and the output voltage 108 is decreasing, the load 110 is shorted and selects to protect the power supply against the strict inputs of the XOR 302, the XOR 6335, the scalable SCP 512, the XOR 2, the XOR inputs of the examples may alternatively be non-inverting inputs of the XOR 639, 632, the XOR 2, the XOR 2, and the like.

In fig. 5A, an example system 500 diagram includes an example pulse extender 510 to apply a time extension to a determination output 526 when the determination output 526 is high (e.g., logic 1). the pulse extender 510 may cause a high pulse to persist for a specified time period set by an example timer T1544. in examples, the timer T1544 is determined by the intrinsic parasitic inductance of Lsupply308A in the supply path, the input capacitance of Cin 310, and/or the output capacitance of Cbulk 312 of fig. 3. the extended time period depends on the components of the example power circuit 300 for the purpose of determining the amount of time it takes for the electrical energy stored in each component to return to steady state after a transient in order to determine the amount of time it takes during a transient state.in this way, the example pulse extender 510 ensures that the SCP 512 is not enabled during a transient (e.g., to ensure that power to the load 110 is not erroneously removed) in this way, the pulse extender 510 is included in the system 500 diagram because the example logic may output a transient signal indicating a high transient state, but may still reduce the high load current input voltage sense output at SCP terminal 514, if the scalable load extension fet 120 may be selected to provide a high load current extension ("high") and the high load voltage extension fet extension current extension ("high load voltage". 2 "may be output" (e.g., a high load voltage sense voltage) when the SCP terminal may be selected to indicate that the SCP 510 may be returned to a high load voltage is not to indicate that the example, thus the example, the example load extension fet 120 may be output ("high load voltage sense a high load fet 120, the SCP terminal may be increased), and the example, the example load may be increased, the SCP 110 may be increased, the example, the load may be increased, the example load terminal may be increased, the load terminal may be selected to provide a high load may be increased, and the load terminal may be.

In examples, the pulse stretcher 510 may be bypassed, for example, the pulse stretcher 510 may not stretch the signal if the output 526 is determined to be LOW (e.g., a logic 0). The example pulse stretcher 510 is coupled to the example multiplexer 522 via a select input 528, where the select input 528 is a selector of the example multiplexer 522. the example pulse stretcher 510 may include a plurality of components that receive an input and produce an output that is longer than the input when the signal is high.

In FIG. 5A, an example system 500 illustrates an example scalable short-circuit protection (SCP)512 to sense a load current 314 and determine when the load current 314 exceeds a threshold current determined by a user, for example, the scalable SCP 512 is a current limit set by a user to protect the load 110 from operating at a potentially damaging level, the scalable SCP 512 includes a sense node 536 as an input, the sense node 536 also coupled to a source terminal of an example powerFET 530.

In FIG. 5A, the example system 500 illustrates an example maximum SCP514 to sense the load current 314 and determine when the load current 314 exceeds a maximum current threshold of the example load 110. for example, the maximum SCP514 receives a value from a sense node 536 that is indicative of the load current 314 and determines whether the load current 314 is greater than or equal to the maximum threshold current, in examples, if the maximum threshold current is 7 amps and the sense node 536 senses a value of 7 amps, the maximum SCP514 generates a logic 1 on the output 534 to provide to the multiplexer 522. in the event that the output 534 (e.g., the low input B of the example multiplexer 522) is selected by the select input 528, the logic 1 on the output 534 indicates a value to send to the output 524.

In FIG. 5A, the example system 500 illustrates an example multiplexer 522 to select of two outputs 532, 534 and output an information signal on the output 524 indicating of the two outputs 532, 534, where the output 524 is coupled to an example gate driver 540. for example, the multiplexer 522 includes a select input 528 (e.g., the select input 528 of the pulse expander 510), a scalable SCP output 532, and a maximum SCP output 534. the example scalable SCP output 532 is represented by the letter "A" and the example maximum SCP output 534 is represented by the letter "B". in examples, "A" and "B" may be digital or analog values and determined by the scalable SCP 512 or the maximum SCP 514. for example, "A" may be a logical 0 and "B" may be a logical 1, and the select input 528 may be a logical 0 (e.g., the select output 532 "A") or a logical 1 (e.g., the select output 534 "B."), the example multiplexer 522 forwards a logical 0 or a logical 1 on the outputs 532, 534 to the example gate driver output 524. the example gate driver control current fet 540 is coupled to the example power fet control terminal 530.

In examples, when the determination output 526 of logic 508 is a logic 0, the pulse expander 510 is not activated and a logic 0 is provided as the selection input 528 to the multiplexer 522 to select the output 532. for example, if the sense node 536 senses a current above the threshold current for the scalable SCP, the scalable SCP 512 is enabled and the output 532A is 1, and if the current increase detector 504 detects an increase in current through the load 110, but the Vout droop detector 506 detects that the output voltage is falling (e.g., and therefore does not increase), the selection input 528 is a logic 0 and the output 532A is selected to be forwarded to the output 524, with the gate driver 540 further stepping through to turn off the powerFET530 by providing a low voltage signal to the gate terminal.

In examples, when the determined output 526 of the logic 508 is a logic 1, the pulse expander 510 is enabled and extends the logic 1 signal by a specified amount of time set by the pulse expander 510. further, a logic high signal is provided to the select input 528 of the example multiplexer 522 to select the output 534 "B". The sense node 536 senses a current higher than the threshold current for the scalable SCP, but does not sense a current higher than the maximum threshold current set by the maximum SCP514, so the maximum SCP is not enabled, and a logic 0 is on "B" output at 534. further, the example current increase detector 504 and the example Vout decrease detector 506 detect an increase in the voltage across the load current 314 and Vout108, so the example logic 508 outputs a logic 1 that is extended (e.g., until the load current 314 and output voltage 108 decrease) to select the output of the maximum SCP "B" that is a logic 0, and the logic 0 is forwarded to the example gate driver 540, which generates a high voltage to keep the powerFET530 on.

Turning to fig. 5B, the example system 500 illustrates an example input voltage (Vin) rise detector 542 in place of the example Vout fall detector 506 of fig. 5A the example Vin rise detector 542 determines when the input voltage 102 is rising instead of determining when the output voltage 108 is falling the example Vin rise detector 542 receives the input voltage 102 and a detector voltage supply, where the input voltage 102 is monitored and the detector voltage supply provides sufficient voltage to circuitry for powering the example Vin rise detector 542. at in some examples, the current increase to the load 110 and the input voltage 102 increase indicate a power transient.

In FIG. 5B, the example system 500 illustrates example logic 508 having two non-inverting input pins, the example logic 508 is AND logic AND outputs high when both inputs are high AND further steps output low when either of the two inputs are low, for example, when the current increase detector 504 outputs a high voltage on the output 518 AND when the Vin rise detector 542 outputs a high voltage on the second output 520, the logic 508 outputs a high voltage on the determination output 526.

In other examples, the example logic 508 outputs a low voltage on the determination output 526 when the example current increase detector 504 outputs a high voltage on the output 518 and when the example Vin rise detector 542 outputs a low voltage on the second output 520 in this manner, the example pulse extender 510 bypasses the low voltage and provides it directly to the example multiplexer 522 to select the scalable SCP output 532, as described above in connection with FIG. 5A.

As with the example system 500 diagram illustrated in FIG. 5A, the example system 500 diagram illustrated in FIG. 5B provides similar functionality for the example power path 106. for example, the system 500 diagram is to trigger the scalable SCP 512 when the load 110 is shorted in order to protect the example power source 302 from damage due to excess current the example system 500 diagram is also to prevent triggering of the scalable SCP 512 for periods of time and to step-enable the maximum SCP514 when the power source 302 is producing a transient state the system 500 diagrams of FIGS. 5A and 5B both provide such functionality as described.

A flowchart representing the functionality of the example system 500 of fig. 5A is illustrated in fig. 6. The power down routine of fig. 6 begins at block 602, where the example system 500 illustrates activating the example current monitor 502 to monitor the current of the output current of the example powerFET 530. For example, the current monitor 502 receives the output voltage 108 and compares it to the input voltage 102 to provide a value to the example current increase detector 504. The example current increase detector 504 determines whether the current through the powerFET530 increases (block 604). For example, the current increase detector 504 receives the output of the current monitor 502 and compares it to a threshold current. If the current increase detector 504 determines that the current through the powerFET has not increased, the process returns to block 602. If the example current increase detector 504 determines that the current has increased, the process passes to block 606, where the example Vout drop detector 506 determines whether the output voltage 108 is dropping. For example, the Vout droop detector 506 monitors the output voltage 108 and detects when the output voltage 108 drops.

Alternatively, at block 606, a Vin rise detector may be used to indicate whether the input voltage Vin 102 is rising. For example, if detecting when the output voltage 108 drops indicates that a supply transient exists at the input, utilizing a Vin rise detector to determine when the input voltage Vin 102 increases also indicates when a supply transient exists at the input. In this way, neither the example Vout droop detector 506 nor the Vin rise detector is utilized, nor the conditions of block 606 change. Accordingly, control passes to block 608 or 610, as described below.

If the example Vout droop detector 506 determines that the output voltage 108 is decreasing (block 606), the example system 500 illustrates determining that the example load 110 has a valid fault and takes a corresponding action (block 608). for example, the logic 508 outputs a logic 0 to the example multiplexer 522, where the logic 0 is a selector and selects enabling the short-circuit protection 512 as a corresponding action.if the example Vout droop detector 506 determines that the output voltage is not decreasing, the example system 500 illustrates determining that a transient has occurred and starting the example pulse extender 510 and setting the timer T1544 (block 610). for example, the logic 508 outputs a logic 1 and provides it to the pulse extender 510, which pulse extender 510 extends the logic 1 signal by a particular amount of time n. the system 500 illustrates determining whether the timer T1544 is equal to n (block 612). for example, the pulse extender 510 continues to output a logic 1 until the timer T1544 is equal to n.

When the example pulse expander 510 determines that the timer T1544 is equal to n (block 612), the example system 500 illustrates determining whether the current through the example powerFET530 is still above a fault threshold, which may be a scalable SCP threshold (block 614). For example, after pulse expander 510 extends a logic 1 by a specified amount of time n, select input 528 will become 0. Further, the example multiplexer 522 selects the scalable SCP output 532, a. At this point if the load current 314 is still above the scalable SCP threshold, the scalable SCP output 532 will be 1 and the output 524 will be 1, which forces the example gate driver 540 to turn off the powerFET 530. In this manner, the process passes to block 608, where the example system 500 illustrates determining that a valid fault condition exists and taking a corresponding action. If the example system 500 does not determine that the current through the example powerFET530 is not greater than the scalable SCP threshold current, the process returns to block 602.

FIG. 7 illustrates the example current monitor 502 operating with the example current increase detector 504 to determine when the load current 314 is increasing the example current monitor 502 includes an example amplifier 70, an example resistor Rdom704, an example capacitor Ccom 710, an example β (beta)712, and an example second amplifier 714. the example current increase detector 504 includes an example current offset Ioffset 716 and an example comparator 618.

In FIG. 7, the example current monitor 502 includes an example amplifier 702 to distinguish between a output and a second output of the example current sensor 501 and output a current based on a differential input between the two voltages.for example, the amplifier 702 is a transconductance amplifier that includes a non-inverting input and an inverting input, and a difference between the voltage at the non-inverting input and the voltage at the inverting input creates a current as an output.the current produced by the example amplifier 702 may represent a differential current.A differential current is applied across a resistor Rdom704 and a capacitor Ccom 710 that produces a monitor voltage Vmon 706. the capacitor is a two-terminal assembly that stores electrical energy and then releases electrical energy when a positive voltage and/or an increasing voltage is applied to of the two terminals.A example capacitor Ccom 710 opposes a change in voltage (e.g., monitor voltage 706 on) and the current to voltage relationship of the capacitor is:

variable Icharge 708 indicates current through the capacitor, variable C is the capacitance (e.g., farad) of capacitor Ccom 710, and variable dV/dt indicates the rate of change of voltage Vmon 706. if the value of Icharge 708 is positive, the differential current is increasing, if the value of Icharge 708 is negative, the differential current is decreasing.

In FIG. 7, the example current monitor 502 has an example β to be a feedback factor of a closed loop of the example current monitor 502. for example, β 712 is the portion of the output that is provided to the input of the th amplifier 702. in some examples, β 0712 can include two resistors to form a voltage divider, a capacitor, and an inductor to form a filter, etc. example β 712 determines the amount of the monitor voltage 706 that is provided to the inverting input of the example th amplifier 702. in some examples, β 712 determines the amount of the monitor voltage 706 that is provided to the second amplifier 714.

In FIG. 7, the example current monitor 502 includes an example second amplifier 714 that is a replica of the example th amplifier 702 to replicate the differential current from the example th amplifier 702. the replicated current is provided to the example current increase detector 504 via a current monitor 516. in some examples, the second amplifier 714 is a transconductance amplifier that receives two input voltages (e.g., the input voltage 102 and the monitor voltage 706) and generates an output current on the current monitor output 516. the example second amplifier 714 generates a current that is indicative of whether the load current 314 is increasing or decreasing.

In FIG. 7, the example current increase detector 504 includes an example comparator 718 to determine when the output current of the example second amplifier 714 increases beyond the Ioffset current 716. in some examples, the comparator 718 is an analog comparator that compares two input currents (716 ) and outputs a digital signal indicating which is larger.for example, the output of the analog comparator 718 is a binary digital output and will output a logic 1 if the current at 516 is greater than the Ioffset current 716 or will output a logic 0 if the current at 516 is less than the Ioffset current 716. in some examples, the Ioffset current 716 should be zero to detect when the current at 516 is positive, however, the Ioffset current 716 is set to a minimum value in order to handle non-idealities such as mismatches. thus, if the example second amplifier 714 provides a current output greater than the Ioffset current 716, the example comparator 718 will output a logic 1 to the example logic 508 via the output 518. in this manner, the example logic 508 operates as described in detail above in connection with FIG. 5A and FIG. 5B.

Although an example implementation of the current monitor 502 and the current increase detector 504 of fig. 5A and 5B is illustrated in fig. 7, one or more of of the elements, processes and/or devices illustrated in fig. 7 may be combined, divided, rearranged, omitted, eliminated and/or implemented in any other way, furthermore, the example amplifier 702, the example 8712, the example second amplifier 714, the example comparator 618 and/or more may be implemented by any combination of hardware, software, firmware and/or hardware, software and/or firmware, further, for example, the example amplifier 702, the example β 712, the example second amplifier 714, the example comparator 618 and/or more , any of the example current monitor 502 and the current increase detector 504 may be implemented by a plurality of hardware, software, firmware or hardware, or software, including a plurality of programmable logic devices such as a programmable logic device or a plurality of logic devices such as a programmable logic device or a programmable logic device capable of processing or processing a plurality of programs or processing devices such as a programmable logic device or a programmable logic device capable of processing or processing of processing a plurality of signals (including a plurality of programmable logic devices) according to the various logic devices such as a programmable logic device or processing devices (including a programmable logic device or a programmable logic device capable of processing device or a programmable logic device capable of processing system including a plurality of processing device capable of processing or a programmable logic device capable of processing or processing system or a programmable logic device capable of processing system including a programmable logic device capable of processing or a programmable logic device capable of processing system or a programmable logic device capable of processing system including a plurality of processing system or a programmable logic device capable of processing system including a programmable logic or a plurality of processing system or a plurality of processing system including a programmable logic device capable of processing system including a plurality of processing system or a programmable logic (e.g, including a programmable logic or a programmable logic device capable of processing system or a plurality of processing system or a programmable logic device capable of processing system including a plurality of processing system or a programmable logic device capable of processing system or a plurality of processing system or a programmable logic device capable of processing system or a processing system including a processing system or a programmable logic device capable of processing system or a.

FIG. 8 is an example schematic diagram depicting the example Vout droop detector 506 of FIG. 5A. the example Vout droop detector 506 includes a detector voltage supply (e.g., a low voltage supply different from Vin 102 to achieve faster response time and lower area and quiescent current), the output voltage 108, a second output 520 to the Vout droop detector circuit 406 of the example logic 508, and a reference to ground. the example schematic diagram of the Vout droop detector 506 also includes a plurality of transistors, a capacitor C0832, an example inverter 830, an example resistor 812, and an example second resistor 872. in some examples, the output voltage 108 is a control voltage because the output voltage 108 enables the example schematic diagram to exit or enter a steady state of operation.

In FIG. 8, the example schematic includes a plurality of transistors 804, 818, 852, 854 that are N-channel metal-oxide-semiconductor field effect transistors (NMOSFETs) alternatively, transistors 804, 818, 852, 854 may be P-channel MOSFETs, PNP BJTs, NPN BJTs, etc. alternatively, transistors 804, 818, 852, 854 may be switches or any other type of power-switching device in FIG. 8, example transistor 804 includes example second drain terminal 806, example fourth gate terminal 808, and example first source terminal 810. example transistor 804 is biased by reference current source (IREF) 814. the example schematic includes IREF814 to provide MN 2804 with a fixed current independent of the detector Vsupply voltage.In example transistor 804 is in a diode-connected configuration with example resistor R2 , where the first gate terminal 808 is coupled to the reference current source (IREF)814 via example resistor R1812 drain terminal 806, VREF 814 and example resistor R1812 drain terminal 1812 is coupled to example resistor R1812 drain terminal 806 in a diode-connected configuration, where the first gate terminal 808 is coupled to the second drain terminal 1812 of the example resistor R1812, and the second drain terminal 806 is coupled to the second drain terminal 1812, and the second drain terminal 1812 is coupled to a voltage drop equal to the example resistor 1812, resulting in this way, where the example resistor R1812 is equal to the voltage drop across the example resistor 1812 voltage across the example resistor 1812, and the example resistor 1812 voltage drop resistor 1812 leads to the example resistor.

In fig. 8, the example schematic includes an example second transistor 818(MN 1818), example MN1818 includes a second drain terminal 820, a second gate terminal 822, and a second source terminal 824, the second drain terminal 820 is coupled to a second reference current source (IREF2)826 at GAIN2 node 828 in some examples IREF2826 produces a fixed amount of current equal to IREF814, second source terminal 824 is grounded, and second gate terminal 822 is coupled to a sixth drain terminal 862 of a sixth transistor (MN4)854 at node AMPOUT 816 in examples MN 1804 has the same dimensions as MN 2804 (e.g., two transistors have the same width to length (W/L) ratio of their respective gate terminals) in other examples MN1818 may have different sizes relative to MN 2804 if IREF 26 is not the same as IREF814, where the W/L ratio of MN1818 is proportional to the W/L ratio of MN 2804, e.g., if IREF 26 is not the same as IREF814 the current source terminal 282 is smaller than the current source terminal 2, where the current source ratio of MN 1812 is also smaller than the width of MN 2802 micron 804.

In FIG. 8, the example schematic includes example transistors 838, 836, 852, and 854, which may form an amplifier having an example current source I1874 that provides a bias current.e., third transistors (MP3)836 and MP 4838 are inputs to the amplifier, and a sixth drain terminal 862 of MN 4854 is an output of the amplifier.example MP 3836 includes an example third source terminal 840, an example third gate terminal 842, and an example third drain terminal 844. the third source terminal 840 is coupled to I1874, the third gate terminal is coupled to capacitor C0832 at node VFB834, and the third drain terminal 844 is coupled to the sixth drain terminal 862 at node AMPOUT 816 and to example second resistor R2872. resistor R2872 is also coupled to capacitor C0832. the third gate terminal 842 is of two inputs that receive voltage from capacitor C0832 via node VFB 834.

Example MP 4838 includes a fourth source terminal 846 coupled to I1874, a fourth gate terminal 848 coupled to the drain terminal of MN 2804 at node VREF802, and a fourth drain terminal 850 coupled to the fifth drain terminal 856 of a fifth transistor (MN3)852 at amp1 node 870 the fourth gate terminal 848 is of two inputs different from the third gate terminal 842 input, which receives a voltage from MN 2804 at node VREF 802.

In fig. 8, MN1818 is coupled to the output of the amplifier formed by MP 3836, MP 4838, MN3852, and MN 4854 (e.g., node AMPOUT 816). the output of the amplifier (node AMPOUT 816) is fed back to the input of the amplifier at node VFB834 through resistor R2872 the amplifier connected to feedback resistor R2872 forms a unity gain.

In FIG. 8, an example capacitor C0832 is a two terminal electrical component that stores potential energy in an electric field the example capacitor includes an th capacitor terminal and a second capacitor terminal, a th capacitor terminal is coupled to the output voltage 108 and a second capacitor terminal is coupled to the second resistor R2872 and the third gate terminal 842 capacitor C0832 is connected in parallel with the feedback resistor R2872 in this way, capacitor C0832 forms a high pass filter along with an amplifier (e.g., transistors MP3, MP4, MN3, and MN4) connected as unity gain by resistor feedback R2872.

In an example steady state operation of the Vout droop detector 506, the signal on the output voltage (Vout) node 108 is constant (e.g., voltage does not change with respect to time). in steady state operation, the voltage at node VREF802 is equal to the voltage on node VFB834, and I1874 is split between the two transistors MP 3836 and MP 4838 because the gate-source voltage of the transistors determines the amount of current to be conducted through it. for example, the current conducted through the third drain terminal 844 is half of I1874, and the current conducted through the fourth drain terminal 850 is half of I1874. when I1874 is conducted through the fourth drain terminal 850, current is provided to the drain terminal MN3856.MN3852 and the gate terminal is shorted at the Amp1 node 870 at . in this way, when current conducted through MP 4838 to the drain terminal of the transistor MN3852, the transistor MN3852 may modulate the voltage at the gate terminal to accept the current provided by the drain 4838, for example, the Ampere 4838, and the gate terminal of the transistor MN3852 is of sufficient size to accept the high current as well as the drain terminal MP 4838 is conducted between the drain terminal MP and the drain terminal of the transistor MN 856.

In examples, MN 4854 has the same dimensions as MN3852 therefore, the gate-to-source voltage of MN 4854 is the same as the gate-to-source voltage of MN3852 in this way, the drain terminal 862 of MN 4854 accepts the same amount of current as the drain terminal of MN 3852.

Further, in steady state operation, the voltage at node VREF802 is equal to the voltage at node AMPOUT 816. Equation 3 determines the voltage at node VREF 802:

Vref＝Vgs_(MN2)- (R1X Iref) (equation 3)

The variable VREF corresponds to the value of the voltage at node 802, the variable Vgs (mn2) corresponds to the voltage at gate terminal 808 to source terminal 810 of , the variable R1 corresponds to the resistance (ohms) of resistor 812 of , and the variable IREF corresponds to the current conducted at reference current source 814.

In this manner, since the voltage at node VREF802 is equal to the voltage at node AMPOUT 816 during steady-state operation (e.g., when Vout node 108 is constant with respect to time), the gate-source voltage of MN1818 is equal to the voltage at node VREF 802. For example, the voltage at node AMPOUT 816 is coupled to the second gate terminal 822 of MN 1818. The second source terminal 824 of MN1818 is coupled to a ground reference (e.g., 0 volts). Thus, when the Vout droop detector 506 is operating in steady-state mode, the gate-source voltage of MN1818 is the voltage value at node AMPOUT 816.

In FIG. 8, because example MN1818 has the same dimensions as example MN 2804, example MN1818 conducts less current than example MN transistor 804 conducts current.e., MN 2804 conducts IREF814 when the voltage across gate terminal 808 of is greater than the voltage across source terminal 810 of . further, MN1818 receives the voltage at second gate terminal 822, which is equal to the voltage at node VREF 802. the voltage at node VREF802 is less than the gate-source voltage of MN 2804 (e.g., see equation 3), thus, the gate-source voltage of second transistor 818 is less than the gate-source voltage of transistor 804. in this way, the drain current of MN1818 is lower than the drain current of MN 2804. IREF2826 is related to IREF 814. e.g., IREF2826 may be equal to IREF 814. thus, IREF2826 is greater than the drain current drawn by MN 1818. this results in GAIN2 node 828 becoming a high and the circuit output node 828 is low (e.g., the current is conducted through the gate of a fixed ratio of MOSFET, the gate voltage-N-for example, such as indicated by a MOSFET ).

In examples IREF814 conducts a different amount of current than IREF2826 in examples IREF2826 may have a fixed ratio of current IREF814 and the length and width of example MN1818 have the same ratio as example MN 2808 when the current conducted through second drain terminal 820 is less than the current value at IREF2826, the voltage at GAIN2 node 828 increases to match the detector Vsupply voltage (e.g., becomes high). node GAIN 2828 voltage is high because IREF 2826's current charges the GAIN 2828 node and this current is not shorted to ground by example second transistor 818 because example 1818 can conduct a lower current when MN1818 is less than MN 2804's voltage.example GAIN 1818 is able to conduct a higher current.in examples output voltage 108 drops and capacitor C0832 is used to maintain the change in voltage.g., if output voltage 108 drops from 12 volts to 11 volts, the voltage at node VFB834 (which is at VFB834 volts) and the voltage drops from the original VFB 38802 v 802 v + 802 + 1 + 802 + 1 + 2 + 1 + 802 + 1 + 2 + 802 + 1 + thus + 802 + 2 + 802 + 2 + 802 + 2.

In examples, when Vout108 decreases, the voltage value at node AMPOUT 816 is a different value than the voltage at node VREF802 the voltage value at node AMPOUT 816 increases as Vout108 decreases, and the increased voltage at node AMPOUT 816 is provided to the example second gate terminal 822 of example MN1818 in examples, the presence of the increased voltage at second gate terminal 822 turns on MN1818, and the current of IREF2826 is conducted through second drain terminal 820 to second source terminal 824, to ground reference in this way, as the current from MN1818 is greater than IREF2826, the voltage at the example GAIN2 node 828 decreases (e.g., becomes low). In example, the GAIN2 node 828 becomes low, a low voltage is provided to inverter 830, which inverts the low signal to a high signal (e.g., logic 1) and outputs the high signal to logic 50 via second output 520A logic 1 provided to example logic 508 indicates that the output voltage 108 is decreasing.

In FIG. 8, R1812 has been added to manage imperfections in the device, for example, transistor MN 2804 and transistor MN1818 are designed to be of the same type and have the same width and length, but there may still be some mismatches in their width, length and other electrical characteristics after fabrication, similarly MP 4838 and MP 3836, MN3852 and MN 4854 will have mismatches, causing the amplifiers to have limited input reference offsets (e.g., amplifiers with mismatches may be defined as voltages that when applied at the inputs of the amplifiers restore the output to the same value as the output of the intended amplifier), furthermore, current sources IREF814 and IREF2826 will have mismatches.

In examples, the schematic of FIG. 8 may detect an increase in the output voltage 108 by rearranging, removing, and/or adding transistors, logic , and other electrical components in examples, the second output 520 may indicate that the output voltage 108 is increasing by providing a logic 1 to the example logic 508, or that the output is decreasing by providing a logic 0 to the example logic 508 via the second output 520.

Fig. 9 illustrates an example timing diagram 900 depicting the response of the example system 500 diagram when a short circuit occurs at the example load 110. The example timing diagram 900 includes signals corresponding to current and voltage at the inputs and outputs of the example system 500 diagram. The example timing diagram 900 includes an example second diagram 902, an example third diagram 904, an example fourth diagram 906, an example fifth diagram 908, an example sixth diagram 910, an example seventh diagram 912, an example eighth diagram 914, an example ninth diagram 916, and an example tenth diagram 918.

In the example second graph 902, the input voltage 102 signal decreases at time t1 in some examples, the input voltage 102 may decrease due to a short in the load 110 because the load 110 may draw a higher level of current due to the short, and due to the finite impedance of the power supply, the Vin 102 may decrease the input voltage 102 decreases from a steady 12 volts to 11.9 volts (e.g., 100 millivolts). in the example third graph 904, the current Iload314 increases from time t1 (e.g., approximately 10 amps) to time t2 (e.g., approximately 90 amps). the time in nanoseconds between t1 and t2 is 40 nanoseconds.

In the example fourth graph 906, the scalable short circuit protection 512 is triggered when the current Iload314 reaches a threshold current set by the user and the scalable SCP output 532 goes high in the example fourth graph 906, the scalable SCP output 532 goes high at a time before t2 in the example fifth graph 908, the example current increase detector 504 outputs high on the example output 518 in response to the current Iload314 increasing.

In this manner, the example eighth graph 914 illustrates a determined output 526 of the example logic that is zero volts, the example logic 508 outputs zero volts because the second output 520 is inverted at the example logic 916. the example ninth graph 916 illustrates an output of the example pulse expander 510 that is a select input 528. the select input 528 is depicted as zero volts, which is provided to the example multiplexer 522.

The example multiplexer 522 receives a select input 528 of zero volts and selects a value of the output 532 of the scalable SCP 512 that is high.an example tenth graph 918 depicts the output 524 of the example multiplexer 522 that reflects an example signal on the output 532, where the signal on the output 532 goes high at time t2, and the output 524 of the multiplexer also goes high.A high signal on 524 is provided to an example gate driver 540 that turns off the example powerFET530 until time t3. at time t3, and the example output 518 goes low (e.g., indicated in a fourth graph 906), indicating that the load current 314 is no longer increasing.

Fig. 10 illustrates an example timing diagram 1000 depicting a response of an example system 500 diagram when a power supply transient occurs, the example timing diagram 1000 includes an example second graph 902, an example third graph 1004, an example fourth graph 1006, an example fifth graph 1008, an example sixth graph 1010, an example seventh graph 1012, an example eighth graph 1014, an example ninth graph 916, an example tenth graph 1018, and an example tenth graph 1020 the example second graph 1002 illustrates the example input voltage 102, the example third graph 1004 illustrates the example load current 314, the example fourth graph 1006 illustrates the example scalable SCP output 532, the example fifth graph 1008 illustrates the example fourth output 518 of the current increase detector 504, the example sixth graph 1010 illustrates the output voltage 108, the example seventh graph 1012 illustrates the second output 520 of the Vout droop detector 506, the example eighth graph 1014 illustrates the determined output 526 of the example logic 508, the example ninth graph 1016 illustrates the selected input 528 of the example pulse extender 510, the example tenth graph 1012 illustrates the maximum output , and the example tenth graph 1020 illustrates the example SCP output 524 of the multiplexer 524.

In the example second graph 1002, the input voltage 102 increases at time t 1. the input voltage 102 may increase due to the removal of the second power path 106 from the power circuit 300 and the resulting supply transient, in response to the supply transient, the load current depicted in the third graph 1004 increases at time t 1. when the load current 314 increases, the scalable SCP 512 is triggered and the scalable SCP output 532 becomes high at time t 1. the example current increase detector 504 also detects the increase in the load current 314 at time t1 and outputs a high on the th output 518, as illustrated by the example fifth graph 1008.

In this manner, the example system 500 illustrates the scalable SCP 512 to avoid undesirably removing power from the load 110 via the powerFET530, when the output voltage 108 increases, at time t1, as illustrated by the sixth graph 1010, the Vout droop detector 506 outputs a low on the second output 520 at time t1, as illustrated in the graph 1012, the low on the second output 520 is provided to the inverting input of the logic 508, which inverts the low to a high and also outputs a high on the determination output 526, as illustrated in the example eighth graph 1014, the determination output 526 becomes low at time t2 in response to a decrease in the output voltage 108. however, the short period of time between t1 and t2 (where the determination output 526 is high) is a time sufficient to provide a high pulse to the example pulse expander 510.

The example pulse expander 510 extends the high pulse on the select input 528 for a time n. The select input 528 remains high (e.g., logic 1) and is provided to the example multiplexer 522 to select the maximum SCP output 534. The maximum SCP output 534 is illustrated in the example tenth graph 1018 as zero volts. Zero volts on the maximum SCP output 534 indicates that the increase in load current 314 does not meet (e.g., exceed) a threshold set by the manufacturer (e.g., a maximum current limit). Thus, the multiplexer 522 provides an output 524 of zero volts to the example gate driver 540, where the gate driver 540 does not turn off the example powerFET 530. At time t3, pulse expander 510 outputs a low signal on select input 528, where load current 314 is at an initial amperage prior to the power supply transient and power to load 110 is not erroneously removed.

Whenever the claims employ any form of "including" or "containing" (e.g., including, containing, including, having, etc.) as a preface or in the description of any kind of claims, it is to be understood that there may be additional elements, terms, etc., without falling outside the scope of the corresponding claims or descriptions, whenever the phrase "at least" is used as a transitional term in, for example, the preamble of a claim, as used herein, it has an open-ended form in the same way as the terms "including" and "comprising," when used, for example, in a form such as A, B and/or C, the term "and/or" refers to any combination or subset of A, B, C, such as (1) a alone, (2) any B alone, (3) C alone, (4) a and B, (5) a and C, (6) B and C, and (7) a and B and C, and/or, as used in a/or B3 and/or B3, at least 3) a and B alone, (4) a and B, (5) a and C, (6) B and (7) a and B and C, and at least one of the phrase "and/or C, as used in at least one embodiment, at least 3, at least one or at least one of the processes, preferably, at least one or at least one, preferably, at least one, preferably at least one, three, or more, three, at least three, or more, three, or more, three, four.

As can be appreciated from the foregoing, example methods, apparatus, and articles of manufacture have been disclosed that detect a supply transient and an output short to implement short circuit protection when a valid fault condition occurs. Example methods, apparatus, and articles of manufacture also include a fast response time to increasing load current to protect the load from damaging currents.

Although certain example methods, apparatus, and articles of manufacture have been disclosed herein, the scope of coverage of this patent is not limited thereto. On the contrary, this patent covers all methods, apparatus, and articles of manufacture fairly falling within the scope of the claims of this patent.