阅读说明：本技术 压电微机械超声换能器、阵列芯片及制造方法 (Piezoelectric micromechanical ultrasonic transducer, array chip and manufacturing method ) 是由 李晖 尹峰 于 2021-08-27 设计创作，主要内容包括：本发明公开一种压电微机械超声换能器、阵列芯片及制造方法,所述压电微机械超声换能器采用三维结构设计,能显著降低芯片尺寸,同时减少因为金属布线引起的寄生电阻,电容相关的功耗,延迟,不均匀性,对提高产品性能、降低成本、改善良率等具有显著效益,能实现芯片小型化、高密度集成。本发明的压电微机械超声换能器的制造工艺流程与半导体主流工艺与设备兼容,垂直方向连线与现有芯片BGA封装工艺兼容,具有广泛的适应性。(The invention discloses a piezoelectric micro-mechanical ultrasonic transducer, an array chip and a manufacturing method, wherein the piezoelectric micro-mechanical ultrasonic transducer adopts a three-dimensional structure design, can obviously reduce the size of the chip, simultaneously reduces parasitic resistance caused by metal wiring and power consumption, delay and nonuniformity related to capacitance, has obvious benefits of improving product performance, reducing cost, improving yield and the like, and can realize miniaturization and high-density integration of the chip. The manufacturing process flow of the piezoelectric micromechanical ultrasonic transducer is compatible with a semiconductor mainstream process and equipment, and the vertical direction connecting line is compatible with the conventional chip BGA packaging process, so that the piezoelectric micromechanical ultrasonic transducer has wide adaptability.)

1. A piezoelectric micromachined ultrasonic transducer suitable for high-density integration, comprising from bottom to top: the piezoelectric transducer comprises a silicon substrate (161), a substrate material (160), an oxide layer (132), a mechanical layer (130), a lower metal layer (112), a piezoelectric material layer (115) and an upper metal layer (114), wherein the substrate material (160) is provided with at least one cavity (120), at least one first layer of metal wiring (201) and at least one second layer of metal wiring (202), the at least one first layer of metal wiring (201) is connected with the front surface of the silicon substrate (161), the at least one second layer of metal wiring (202) is positioned above the at least one first layer of metal wiring (201), and the at least one first layer of metal wiring (201) is vertically interconnected with the at least one second layer of metal wiring (202) through at least one metal lead hole (212); the silicon substrate (161) is provided with at least one through-silicon-via-front-side TSV (162) for vertically interconnecting the at least one first-layer metal wiring (201) and the back side of the silicon substrate (161); the ultrasonic transducer is provided with at least one upper-layer metal link hole ZTM (163-1) for vertically interconnecting the upper-layer metal layer (114) and the at least one second-layer metal wiring (202), or at least one lower-layer metal link hole ZBM (163-2) for vertically interconnecting the lower-layer metal layer (112) and the at least one second-layer metal wiring (202).

2. A piezoelectric micromachined ultrasonic transducer suitable for high-density integration, comprising from bottom to top: the piezoelectric device comprises a silicon substrate (161), a substrate material (160), an oxide layer (132), a mechanical layer (130), a lower metal layer (112), a piezoelectric material layer (115) and an upper metal layer (114), wherein the substrate material (160) is provided with two cavities (120), two first-layer metal wirings (201) and two second-layer metal wirings (202), the two first-layer metal wirings (201) are respectively connected with the front surface of the silicon substrate (161), the two second-layer metal wirings (202) are positioned above the two first-layer metal wirings (201), and the two first-layer metal wirings (201) are respectively vertically interconnected with the two second-layer metal wirings (202) positioned above the two first-layer metal wirings through two metal lead holes (212); the silicon substrate (161) is provided with two silicon front-back side through-hole TSVs for respectively realizing vertical interconnection of the two first-layer metal wirings (201) and the back side of the silicon substrate (161); the ultrasonic transducer is provided with an upper-layer metal link hole ZTM (163-1) which vertically interconnects the upper-layer metal layer (114) and one (202) of the two second-layer metal wirings (202), and a lower-layer metal link hole ZBM (163-2) which vertically interconnects the lower-layer metal layer (112) and the other (202) of the two second-layer metal wirings (202).

3. Piezoelectric micromachined ultrasonic transducer suitable for high density integration according to claim 1 or 2, characterized in that the mechanical layer (130) is of the same material as the silicon substrate (161).

4. A piezoelectric micromachined ultrasonic transducer array chip comprising a plurality of piezoelectric micromachined ultrasonic transducers suitable for high density integration according to claim 1, said piezoelectric micromachined ultrasonic transducers having their upper metal layer (114) or lower metal layer (112) vertically connected to said at least one second metal wiring (202) through said at least one upper metal link hole ZTM (163-1) or said at least one lower metal link hole ZBM (163-2), then vertically connected to said at least one first metal wiring (201) through said at least one metal via hole (212), and then led to the back of silicon chip through said at least one silicon front-to-back perforated TSV (162) to a printed circuit board.

5. A piezoelectric micromachined ultrasonic transducer array chip comprising a plurality of piezoelectric micromachined ultrasonic transducers suitable for high density integration according to claim 2, wherein the piezoelectric micromachined ultrasonic transducers vertically connect the upper metal layer (114) to the one second metal wiring (202) through the upper metal link holes ZTM (163-1), vertically connect the lower metal layer (112) to the other second metal wiring (202) through the lower metal link holes ZBM (163-2), vertically connect to the corresponding first metal wiring (201) through the two metal lead holes (212), and then respectively connect to a printed circuit board through the two silicon front-back side through-hole TSVs.

6. A method of manufacturing a piezoelectric micromachined ultrasonic transducer as claimed in claim 1 or 2, comprising the steps of:

step 1, preparing a first silicon wafer, growing silicon dioxide on the surface of the first silicon wafer, depositing a metal layer, photoetching and corroding a first layer of metal wiring, pressing and welding aluminum blocks, removing photoresist and cleaning;

step 2, depositing a substrate material at a low temperature, photoetching, corroding and filling metal deposition to form a metal lead hole between the first layer of metal wiring and the second layer of metal wiring;

step 3, depositing a metal layer, photoetching and corroding a second layer of metal wiring, removing the photoresist and cleaning;

step 4, depositing a substrate material at a low temperature, and performing chemical mechanical polishing to form a flat substrate material surface;

step 5, photoetching and corroding a cavity, removing the photoresist and cleaning;

step 6, preparing a second silicon wafer, growing silicon dioxide on the surface, depositing a substrate material at a low temperature, and finishing bonding with the first silicon wafer;

step 7, grinding the back of the second silicon wafer, corroding with chemical liquid, and polishing chemically and mechanically to reduce the thickness;

step 8, depositing a lower metal layer by metal;

9, depositing a piezoelectric material layer by using the piezoelectric material;

step 10, depositing top metal and photoetching to form an upper metal layer;

step 11, photoetching, etching, and filling metal deposition to form a metal link hole;

step 12, carrying out metal photoetching corrosion to form required wiring;

and step 13, photoetching, corroding and penetrating the front side and the back side of the silicon substrate, and depositing metal to form the through-hole TSV on the front side and the back side of the silicon.

7. The method of claim 6, wherein in step 6, after plasma treatment of the silicon dioxide surface by silicon dioxide Fusion Bond technology, the wafer substrate materials are aligned face to face, pressed, heated and annealed to complete bonding.

8. The manufacturing method according to claim 6, wherein the lower metal layer is a multilayer structure of a lower titanium layer and an upper platinum layer, the thicknesses of the titanium layer and the platinum layer are 20 nm and 100 nm, respectively, the titanium layer is formed by a sputtering method, and the platinum layer is formed by evaporation in vacuum using a high-current high-temperature electron gun.

9. The method of claim 6 wherein the metal pin holes and metal link holes are formed by titanium/titanium nitride sputtering, thermal substrate aluminum metal deposition.

10. The method according to claim 6, wherein in the step 5, a Cavity pattern is formed by photolithography, and then the substrate material is etched by plasma chemical vapor to form a Cavity, wherein the Cavity has a depth of 2 μm.

11. The method of manufacturing according to claim 6 wherein the second silicon wafer has a reduced thickness of 2 to 3 microns.

Technical Field

The present invention relates to a novel structure of Piezoelectric Micromachined Ultrasonic Transducers (PMUT) 3D (3 dimensional three dimensional) and to a novel semiconductor micromachining technique for manufacturing 3D PMUTs. Also, as a direct application of PMUTs, the present invention relates to electronic sensor arrays and associated displays for medical imaging, fingerprint recognition, touch screen or gesture recognition, all of which require the use of high performance, high resolution PMUTs.

Background

Ultrasonic diagnostic apparatus, through its ultrasonic probe, to the human body transmission ultrasonic wave, and utilize its in the human organ, tissue propagation process, because of the sound reflection, refraction, diffraction various information, receive, enlarge and carry on the information processing, form the image or blood flow Doppler, finally display on the display. A medical color ultrasonic diagnostic apparatus mainly comprises a probe, a host, a control panel, a display and other accessories.

Medical ultrasound applications are rapidly developing as human society enters a major medical age. Ultrasound scans have been spread worldwide from medical imaging, such as fetal B-ultrasound, to liver, kidney scans. Compared with other imaging technologies, the ultrasonic imaging technology has the advantages of no wound, no pain, good real-time performance, safety, low price and the like for patients, has high utilization rate in disease prevention, diagnosis and treatment of patients, is widely applied to various clinical examinations such as gastroenterology, gynecology, obstetrics, urology, thoracic department, small organs, pediatrics, cardiology, emergency treatment and the like, is gradually combined with other clinical departments to develop examination applications such as gastroenterology (ultrasonic endoscope), cardiac surgery (intravascular ultrasound) and the like, and is an indispensable examination method at present.

Ultrasound technology and products are rapidly entering people's daily lives. One of the important applications is a smartphone. The fingerprint identification of the mobile phone is quick and convenient, and the safety of the user is greatly improved. Because the ultrasonic sensor has a wide field of view, even if the ultrasonic sensor is installed at the top or the bottom of the mobile phone, accurate distance measurement can be still realized, so that an optical proximity sensor in front of the mobile phone can be omitted in the design of the mobile phone, and the full-screen design of the mobile phone is convenient to realize.

After the ultrasonic distance measuring sensor is installed in the automobile, the safe distance between driving and backing can be kept, and the automobile is very convenient. Further, MEMS ultrasonic sensors have been used in applications such as unmanned aerial vehicles and robots. In such applications, the micro ultrasonic sensor can accurately track the target, form an array space radar, monitor human body movement, position and motion changes in real time, and be seamlessly connected with the VR/AR.

Ultrasonic sensors are also widely used in industrial control. For example, changes in the shape of the surface of an aircraft wing are detected to detect icing, thereby affecting flight safety. The ultrasonic sensor is arranged on an aircraft engine, can detect whether the engine has cracks or not in real time, finds problems in time, and carries out maintenance and replacement.

The traditional ultrasonic probe is realized by using a method of mechanical cutting, arrangement and metal interconnection wiring of piezoelectric ceramic crystals. As shown in fig. 2. Firstly, a piece of piezoelectric ceramic crystal is taken and fixed on a supporting substrate, and mechanical cutting is carried out along the X and Y directions. The processing mode has low yield, is easy to cause mechanical damage, has difficult control of cost and is difficult to realize large-scale production. More importantly, the machining precision is low, the size of the smallest finished crystal is limited, and the requirement of high-resolution medical imaging on the increasingly reduced size of the PMUT cannot be met.

The ultrasonic probe manufactured by the method of mechanical cutting, arrangement and metal interconnection wiring of the piezoelectric ceramic crystal also can not meet the requirements of modern ultrasonic application. MEMS (micro electro mechanical systems) technology based on CMOS process is beginning to be regarded as a development direction of ultrasonic sensors. The semiconductor MEMS ultrasonic sensor benefits from the high precision and the high yield of a CMOS process, and is the most promising technology for realizing the high-resolution medical ultrasonic array sensor.

The most commonly used materials for PMUT thin film piezoelectric ultrasonic transducers are AlN (aluminum nitride) and PZT (lead zirconate titanate, pb (zrti) O3, abbreviated PZT). These materials and their process are also significantly different from standard CMOS processes. For example PZT materials, must have special, unlike CMOS processes, deposition equipment, etching and cleaning equipment, requiring a considerable investment. Meanwhile, the PZT material can cause metal contamination to the CMOS process, affecting the performance and reliability of the CMOS product. Thus, there are only a few PMUT process lines worldwide. The PMUT process is added on the basis of the CMOS process, and a device structure, a process flow, and a system design are continuously created and updated for manufacturing the ultrasonic transducer with high performance and low cost. AlN (aluminum nitride) piezoelectric material, like PZT, also requires special machinery and equipment, with additional investment requirements.

A typical PMUT piezoelectric ultrasound transducer arrangement 100 is shown in fig. 1 and includes:

the substrate material 160, which may be a silicon material or a silicon dioxide material, is typically deposited on the silicon substrate.

The cavity 120, which is typically a cavity etched into the substrate material, leaves room for the PMUT to mechanically vibrate up and down, emit, or receive ultrasound.

The mechanical layer 130, which serves as a mechanical support for the vibratable membrane of the PMUT, ensures the service life of the PMUT. The mechanical layer 130 material (thickness, specific gravity, Young's modulus, etc.) also affects the frequency of the PMUT vibrations.

The oxide layer 132 is typically a silicon dioxide layer that is created on the silicon surface during CMOS processing. In addition to protecting the silicon surface, the thickness of the oxide layer 132 also affects the PMUT vibration frequency.

The sandwich stack of piezoelectric layers comprises a layer 115 of piezoelectric material, associated electrode layers arranged below and above said piezoelectric layer 115, a lower electrode 112 and an upper electrode 114, respectively.

The most commonly used materials for the piezoelectric material layer 115 are PZT lead zirconate titanate ((pb (zrti) O3, abbreviated PZT) and aluminum nitride (AlN).

The lower electrode 112 and the upper electrode 114 are typically platinum-gold Pt material or a multilayer structure of platinum and titanium metal. The lower electrode 112 and the upper electrode 114 generate an electric field in the piezoelectric material, thereby generating expansion and compression of the material, and further generating mechanical vibration in a vertical direction, and transmitting ultrasonic waves. This is the well-known piezoelectric effect.

The frequency of the PMUT mechanical vibration is related to the materials of the layers in the sandwich, the mechanical layer 130, the oxide layer 132, the thickness of all materials, and the shape and size of the cavity 120. The mechanical stress of all materials also has an effect on the vibration frequency.

High resolution, high integration medical applications PMUT ultrasound probes require high frequencies of 10-50MHz megahertz. The requirements for the dimensions and the accuracy of different structures in the PMUT structure 100 are high, for example, the dimensions of the cavity 120 and the control of the variation range of the dimensions of the cavity 120 directly affect the working frequency, the working bandwidth and other key parameters of the ultrasonic probe. The currently common method of etching from the back side of the silicon wafer to form the cavity 120 structure may result in a variation of the size of the cavity 120 structure of 5-10 microns or even larger. The requirements of high frequency and high resolution cannot be met at all. Meanwhile, the method for forming the cavity 120 structure by etching from the back of the silicon wafer is difficult to form different cavity 120 structure sizes at the same time. This limits the possibilities of making a single-chip multi-frequency ultrasound probe, which is a great limitation in application.

Similar to the size of the cavity 120 dimensions, the control requirements for the range of variations in the cavity 120 dimensions, the film thickness and control thereof in the PMUT piezoelectric ultrasonic transducer structure 100 are also critical. For example, the piezoelectric material layer 115, the mechanical layer 130, the lower electrode 112, the upper electrode 114, etc., the film thickness and its control, the specific gravity of the material, the young's modulus, and even the mechanical stress inside the material directly affect the key parameters of the ultrasonic probe, such as the working frequency, the working bandwidth, the ultrasonic output power, the electromechanical coupling coefficient, etc.

In the prior PMUT array technology and product application, the electrical connection between the PMUT and peripheral circuits and a system is realized by using a crystal cutting method or a MEMS semiconductor IC method. Fig. 2 is a schematic top view of a typical PMUT array chip. The center of the chip is a two-dimensional array of PMUT 7X 12, and the periphery of the chip is provided with bonding pads for electrically connecting with pins of a circuit package. Since each PMUT cell in the array must be connected to a bond pad, the metal wiring to make the electrical connection has a lead width, a design rule for lead spacing requires, and as a result, a large portion of the chip area is actually used for metal wiring. The chip area occupied by metal wiring is much larger than that of PMUT array, which is very uneconomical. Meanwhile, the parasitic effect of resistance and capacitance is increased due to the longer metal wiring length, and the working frequency, the power consumption and the like of the PMUT array are adversely affected. The uniformity of the PMUT array operation is also directly affected by the uneven wiring length.

Disclosure of Invention

In order to overcome the defects of the conventional PMUT, the invention provides a PMUT with high-density integration, which adopts an innovative 3D architecture and can greatly reduce adverse effects on various performances and cost caused by the conventional PMUT metal wiring.

The invention specifically adopts the following technical scheme:

the embodiment of the invention provides a piezoelectric micro-mechanical ultrasonic transducer suitable for high-density integration, which is characterized by comprising the following components from bottom to top: the piezoelectric sensor comprises a silicon substrate, a substrate material, an oxide layer, a mechanical layer, a lower metal layer, a piezoelectric material layer and an upper metal layer, wherein the substrate material is provided with at least one cavity, at least one first layer of metal wiring and at least one second layer of metal wiring; the silicon substrate is provided with at least one silicon front-back perforated TSV for realizing the vertical interconnection of the at least one first layer of metal wiring and the back surface of the silicon substrate; the ultrasonic transducer is provided with at least one upper-layer metal link hole ZTM for realizing the vertical interconnection of the upper-layer metal layer and the at least one second-layer metal wiring, or at least one lower-layer metal link hole ZBM for realizing the vertical interconnection of the lower-layer metal layer and the at least one second-layer metal wiring.

The embodiment of the invention also provides a piezoelectric micromechanical ultrasonic transducer suitable for high-density integration, which is characterized by comprising the following components from bottom to top: the piezoelectric sensor comprises a silicon substrate, a substrate material, an oxide layer, a mechanical layer, a lower metal layer, a piezoelectric material layer and an upper metal layer, wherein two cavities, two first-layer metal wirings and two second-layer metal wirings are arranged on the substrate material, the two first-layer metal wirings are respectively connected with the front surface of the silicon substrate, the two second-layer metal wirings are positioned above the two first-layer metal wirings, and the two first-layer metal wirings are respectively vertically interconnected with the two second-layer metal wirings positioned above the two first-layer metal wirings through two metal lead holes; the silicon substrate is provided with two silicon front and back perforated TSVs which respectively realize vertical interconnection of the two first-layer metal wirings and the back of the silicon substrate; the ultrasonic transducer is also provided with an upper-layer metal link hole ZTM for vertically interconnecting the upper-layer metal layer and one of the two second-layer metal wirings, and a lower-layer metal link hole ZBM for vertically interconnecting the lower-layer metal layer and the other of the two second-layer metal wirings.

Preferably, the mechanical layer is made of the same material as the silicon substrate.

The embodiment of the invention also provides a piezoelectric micromechanical ultrasonic transducer array chip, which is characterized by comprising a plurality of piezoelectric micromechanical ultrasonic transducers suitable for high-density integration, wherein the piezoelectric micromechanical ultrasonic transducers vertically connect an upper metal layer or a lower metal layer to a second metal wiring of the piezoelectric micromechanical ultrasonic transducers through the at least one upper metal link hole ZTM or the at least one lower metal link hole ZBM, then vertically connect to the at least one first metal wiring through the at least one metal lead hole, and then lead to the back of a silicon chip through the at least one silicon front-back side through-hole TSV to be connected to a printed circuit board.

The embodiment of the invention also provides a piezoelectric micro-mechanical ultrasonic transducer array chip which is characterized by comprising a plurality of piezoelectric micro-mechanical ultrasonic transducers suitable for high-density integration, wherein the piezoelectric micro-mechanical ultrasonic transducers vertically connect the upper metal layer to one of the second metal wiring lines through the upper metal link holes ZTM respectively, vertically connect the lower metal layer to the other second metal wiring line through the lower metal link holes ZBM respectively, then vertically connect the lower metal layer to the corresponding first metal wiring line through the two metal lead holes respectively, and then respectively lead the lower metal layer to the back of a silicon chip through the two silicon front and back perforated TSVs to be connected to a printed circuit board.

The embodiment of the invention also provides a manufacturing method of the piezoelectric micromechanical ultrasonic transducer, which is characterized by comprising the following steps of:

step 1, preparing a first silicon wafer, growing silicon dioxide on the surface of the first silicon wafer, depositing a metal layer, photoetching and corroding a first layer of metal wiring, pressing and welding aluminum blocks, removing photoresist and cleaning;

step 2, depositing a substrate material at a low temperature, photoetching, corroding and filling metal deposition to form a metal lead hole between the first layer of metal wiring and the second layer of metal wiring;

step 3, depositing a metal layer, photoetching and corroding a second layer of metal wiring, removing the photoresist and cleaning;

step 4, depositing a substrate material at a low temperature, and performing chemical mechanical polishing to form a flat substrate material surface;

step 5, photoetching and corroding a cavity, removing the photoresist and cleaning;

step 6, preparing a second silicon wafer, growing silicon dioxide on the surface, depositing a substrate material at a low temperature, and finishing bonding with the first silicon wafer;

step 7, grinding the back of the second silicon wafer, corroding with chemical liquid, and polishing chemically and mechanically to reduce the thickness;

step 8, depositing a lower metal layer by metal;

9, depositing a piezoelectric material layer by using the piezoelectric material;

step 10, depositing top metal and photoetching to form an upper metal layer;

step 11, photoetching, etching, and filling metal deposition to form a metal link hole;

step 12, carrying out metal photoetching corrosion to form required wiring;

and step 13, photoetching, corroding and penetrating the front side and the back side of the silicon substrate, and depositing metal to form the through-hole TSV on the front side and the back side of the silicon.

Preferably, in step 6, after the silicon dioxide Fusion Bond technology is adopted to perform plasma treatment on the silicon dioxide surface, the wafer substrate materials are aligned face to face, and then are subjected to pressure heating and annealing to complete bonding.

Preferably, the lower metal layer is a multilayer structure of a lower titanium metal layer and an upper platinum material layer, the thicknesses of the titanium metal layer and the platinum material layer are respectively 20 nanometers and 100 nanometers, the titanium metal layer is formed by a sputtering method, and the platinum material layer is formed by evaporation of a high-current high-temperature electron gun in vacuum.

Preferably, the metal lead holes and the metal link holes are formed by metal titanium/titanium nitride sputtering and metal aluminum deposition on a hot substrate.

Preferably, in step 5, a Cavity pattern is formed by photolithography, and then a substrate material is etched by plasma chemical vapor to form a Cavity, wherein the depth of the Cavity is 2 microns.

Preferably, the thickness of the second silicon wafer after thinning is 2-3 microns.

Has the advantages that:

in the existing 2D planar PMUT array design and process, the chip area occupied by metal wiring is far larger than that occupied by the PMUT array, and the process is not economical. Meanwhile, the long wiring length has adverse effects on the important indexes of the PMUT, such as working frequency, power consumption and heat dissipation, and the uniformity of the PMUT array operation can be directly influenced due to the uneven wiring length. The three-dimensional PMUT structure design and the process flow provided by the invention can obviously reduce the wiring length by utilizing the wiring connection of the vertical space. The three-dimensional PMUT structure design and the process flow provided by the invention can obviously reduce the size of a chip, simultaneously reduce parasitic resistance caused by metal wiring and power consumption, delay and nonuniformity related to capacitance, have obvious benefits on improving the performance of the product, reducing the cost, improving the yield and the like, and can realize the miniaturization and high-density integration of the chip.

Drawings

FIG. 1 is a schematic diagram of a conventional PMUT 2D structure;

FIG. 2 is a schematic diagram of a PMUT structure according to a first embodiment of the present invention;

FIG. 3 is a schematic diagram of a PMUT structure according to a second embodiment of the present invention;

FIG. 4 is a schematic diagram of a PMUT structure according to a third embodiment of the present invention;

FIG. 5 is a schematic diagram of a conventional PMUT array chip structure;

FIG. 6 is a schematic structural diagram of a fifth embodiment of a PMUT array chip according to the present invention;

FIGS. 7-14 are schematic diagrams corresponding to six steps 1-8, respectively, according to embodiments of the present invention;

FIG. 15 is a schematic diagram of steps 9-11 according to an embodiment of the present invention;

fig. 16 is a schematic diagram corresponding to the sixth step 12 according to the embodiment of the present invention;

FIGS. 17-19 are schematic diagrams corresponding to step 13 according to an embodiment of the present invention;

fig. 20 is a schematic diagram of a sixth step 14 according to an embodiment of the present invention.

Detailed Description

The technical solution of the present invention is further described in detail with reference to the specific examples below.

Example one

As shown in fig. 2, the present embodiment provides a piezoelectric micromachined ultrasonic transducer suitable for high-density integration, including, from bottom to top, a silicon substrate 161, a substrate material 160, an oxide layer 132, a mechanical layer 130, a lower metal layer 112, a piezoelectric material layer 115, and an upper metal layer 114. The substrate material 160 is arranged with a cavity 120, a first layer metal wiring 201, a second layer metal wiring 202. Wherein the first layer metal wiring 201 is connected to the front surface of the silicon substrate 161. The second layer metal wiring 202 is positioned above the first layer metal wiring 201. The first-layer metal wiring 201 is vertically interconnected with the second-layer metal wiring 202 through the metal lead hole 212. The silicon substrate 161 is provided with a through-silicon-via TSV 162 penetrating through the entire silicon substrate 161, and the through-silicon-via TSV 162 realizes the vertical interconnection of the first-layer metal wiring 201 and the back surface of the silicon substrate 161. The ultrasonic transducer is further arranged with an upper layer metal link hole ZTM 163-1 penetrating through the piezoelectric material layer 115, the upper layer metal layer 114, the mechanical layer 130, the oxide layer 132 into the substrate material 160 to connect with the second layer metal wiring 202, the upper layer metal link hole ZTM 163-1 enabling the upper layer metal layer 114 to interconnect with the second layer metal wiring 202 vertically. The upper layer metal link hole ZTM 163-1 is called a Z-shaped hole because it passes through the top layer metal TM of the PMUT with different heights and the piezoelectric material PZT, and then is vertically connected, and the cross section shape is similar to a Z shape. The Z-shaped via may enable electrical connection of more than two junctions, for example, the upper metal link hole ZTM 163-1 may enable vertical interconnection of the upper metal layer 114 with the second metal routing 202 while other upper metals adjacent to the PMUT may be connected.

Example two

As shown in fig. 3, the present embodiment provides a piezoelectric micromachined ultrasonic transducer suitable for high-density integration, which is similar to the structure of the embodiment except that the vertical interconnection of the lower metal layer 112 and the second metal wiring 202 is implemented by using the lower metal link hole ZBM 163-2 in the present embodiment. The cross-sectional shape of the lower metal link hole ZBM 163-2 is also similar to a Z-shape, and is also a Z-shaped hole.

EXAMPLE III

As shown in fig. 4, the present embodiment provides a piezoelectric micromachined ultrasonic transducer suitable for high-density integration, which adopts a dual-cell structure and includes, from bottom to top: silicon substrate 161, substrate material 160, oxide layer 132, mechanical layer 130, lower metal layer 112, piezoelectric material layer 115, and upper metal layer 114. Two cavities 120, two first-layer metal wirings 201 and two second-layer metal wirings 202 are arranged on the substrate material 160, the two cavities 120, the two first-layer metal wirings 201 and the two second-layer metal wirings 202 are respectively at the same horizontal height, the two first-layer metal wirings 201 of the two PMUT units are respectively connected with the front surface of the silicon substrate 161, the two second-layer metal wirings 202 are respectively positioned above the two first-layer metal wirings 201, and the two first-layer metal wirings (201) are respectively vertically interconnected with the second-layer metal wirings 202 positioned above the two first-layer metal wirings through two metal lead holes 212. The silicon substrate 161 is provided with two through-silicon TSVs 162 penetrating through the entire silicon substrate 161, and two first-layer metal wirings 201 are respectively vertically interconnected with the back surface of the silicon substrate 161. The ultrasonic transducer is further arranged with an upper layer metal link hole ZTM 163-1 and a lower layer metal link hole ZBM 163-2, the two metal link holes penetrating through the piezoelectric material layer 115, the upper layer metal layer 114, the mechanical layer 130, the oxide layer 132 and the substrate material 160 are respectively connected with two second layer metal wirings 202, wherein the upper layer metal link hole ZTM 163-1 enables the second layer metal wiring 202 connected therewith to be vertically interconnected with the upper layer metal layer 114, and the lower layer metal link hole ZBM 163-2 enables the second layer metal wiring 202 connected therewith to be vertically interconnected with the lower layer metal layer 112.

The piezoelectric micromachined ultrasonic transducer of the first to third embodiments adopts a wiring design of the first and second layers of metal wiring, thereby providing a double-layer metal wiring density, significantly increasing the interconnectivity of the PMUT array, enabling parallel connection and series connection of a plurality of PMUT units, providing a great deal of flexibility for the PMUT array design, and simultaneously greatly reducing the length and the occupied area of the metal wiring, thereby significantly reducing the chip area.

The piezoelectric micromachined super-energy transducer of embodiments one-three, the metal electrodes in the piezoelectric layer sandwich structure are interconnected vertically to the second layer metal wiring through the vertically running metal link holes, then to the first layer metal wiring through the vertically running metal lead holes, and then to the back side of the silicon chip through the through-hole TSV in the front and back sides of the silicon. By adopting the vertical wiring design, most of the pressure welding blocks and metal leads in the plane PMUT can be omitted and led to the back of the silicon wafer from the vertical direction, so that the transition of metal connecting wires from 2D (two-dimensional) plane wiring to 3D (three-dimensional) is realized, and the chip and packaging volume can be obviously reduced.

Example four

The present embodiment provides a piezoelectric micromachined ultrasonic transducer array chip, which includes a plurality of piezoelectric micromachined ultrasonic transducers suitable for high-density integration according to the first embodiment and the second embodiment. The piezoelectric micromechanical ultrasonic transducer is characterized in that an upper metal layer 114 or a lower metal layer 112 of the piezoelectric micromechanical ultrasonic transducer is vertically connected to a second metal wiring 202 of the piezoelectric micromechanical ultrasonic transducer through an upper metal link hole ZTM 163-1 or a lower metal link hole ZBM 163-2, then is vertically connected to a first metal wiring 201 of the piezoelectric micromechanical ultrasonic transducer through a metal lead hole 212 of the piezoelectric micromechanical ultrasonic transducer, and then is led to the back of a silicon chip through a through hole TSV 162 of the front and back of the silicon to be connected to a printed circuit board.

EXAMPLE five

The present embodiment provides a piezoelectric micromachined ultrasonic transducer array chip, including a plurality of piezoelectric micromachined ultrasonic transducers suitable for high density integration as described in the third embodiment, where the piezoelectric micromachined ultrasonic transducers vertically connect the upper metal layer 114 to the corresponding second metal wiring 202 through the upper metal link holes ZTM 163-1, vertically connect the lower metal layer 112 to the corresponding second metal wiring 202 through the lower metal link holes ZBM 163-2, and then vertically connect to the corresponding first metal wiring 201 through the two metal lead holes 212, and then respectively lead to the back of the silicon chip through the two silicon front and back through-holes TSV 162 to connect to the printed circuit board.

As shown in fig. 5 and 6, the PMUT chip layout wiring of the "7X 12 array" is simulated for a cell size of 60X 60 μm, and compared with the 2D PMUT structure, the PMUT with the 3D structure of the present invention has the following major product parameters: the chip area is reduced by 400%, the power consumption is reduced by 20%, the array uniformity is improved by 30%, and the cost is reduced by 25%.

EXAMPLE six

As shown in fig. 7 to 20, the present embodiment provides a method for manufacturing a piezoelectric micromachined ultrasonic transducer, including the steps of:

step 1, as shown in fig. 7, a first silicon wafer is prepared, silicon dioxide with about 100 nanometers grows on the surface, a metal lamination (aluminum layer for short) of titanium/titanium nitride/aluminum is deposited, a first layer of metal wiring is etched by photoetching, an aluminum pressure welding block is pressed, then photoresist is removed, and cleaning is carried out.

And 2, depositing silicon dioxide at low temperature, photoetching to form a link hole Via between aluminum layers, forming a Via hole by plasma dry etching, removing photoresist, cleaning, sputtering metal titanium/titanium nitride, and depositing metal aluminum on a hot substrate to fill up the Via interconnection hole to form a metal lead hole between the first layer metal wiring and the second layer metal wiring, as shown in FIG. 8.

And 3, depositing an aluminum layer, photoetching, carrying out plasma chemical vapor etching to obtain a second layer of metal wiring, and removing the photoresist and cleaning, as shown in FIG. 9.

Step 4, as shown in fig. 10, silicon dioxide (plasma enhanced chemical vapor deposition, PECVD) is deposited at a low temperature of 250-300 ℃, the thickness of SiO2 is about 3 μm, and then a smooth silicon dioxide surface is formed by chemical mechanical polishing.

Step 5, as shown in fig. 11, etching the silicon dioxide cavity by photolithography: coating photoresist, photoetching to form a Cavity body Cavity pattern, carrying out plasma chemical vapor etching on SiO2 to form a Cavity with the depth of about 2 microns, removing the photoresist, and cleaning.

The method for forming the cavity 120 structure proposed in this embodiment is completely different from the conventional method for forming the cavity 120 structure by etching from the back side of the silicon wafer. With the method of this embodiment, the size of the cavity 120 can be 5 microns or less, and the size of the cavity 120 can be controlled to +/-0.25 microns.

Step 6, as shown in fig. 12, a second silicon wafer is prepared, and silicon dioxide of about 100 nm is grown on the surface.

And 7, depositing silicon dioxide at low temperature and completing bonding with the first silicon wafer as shown in FIG. 13. The specific method is that the silicon dioxide Fusion Bond technology which is mature in the industry is adopted, after the surface of SiO2 is subjected to plasma treatment, the SiO2 of the wafer is aligned in a face-to-face mode, pressurized and heated, and then the wafer is annealed, and bonding is completed.

And 8, as shown in fig. 14, after bonding is completed, grinding the back surface of the second silicon wafer, and reducing the thickness to be less than 100 microns. Then chemical liquid corrosion is carried out to further thin the silicon slice to 5-6 microns, and finally chemical Mechanical polishing CMP (chemical Mechanical polishing) is carried out, and the thickness of the residual silicon slice is 2-3 microns.

In the mechanical layer 130 structure, a commonly used material is silicon oxide, silicon nitride, polysilicon, or a multi-layer thin film combination thereof. All these materials are not single crystal materials, in other words, due to the heterosequence form of the molecular structure, the mechanical property parameters of these materials, and the mechanical stress in the thin film are affected by the process conditions, and the controllability and the manufacturing repeatability are problematic. According to the method for bonding and thinning the silicon wafer, the silicon single crystal is introduced into the mechanical layer, and the mechanical layer is high in quality and strength, so that the repeatability of mechanical parameters of the mechanical layer is optimal, the internal mechanical stress is reduced to the minimum, the uniformity is high, and the manufacturing repeatability is good.

Steps 9-11 are shown in fig. 15.

And 9, depositing a lower metal layer of the PMUT: the multilayer structure of Ti and Pt is adopted, and the thicknesses are respectively 20 nanometers and 100 nanometers. Titanium metal Ti increases the adhesion of the metal layer to silicon and silicon oxide, while platinum Pt is one of the best conductive layers to improve piezoelectric efficiency. Ti metal is formed by sputtering, while platinum Pt is formed by evaporation in vacuum using a high current, high temperature electron gun.

Step 10, piezoelectric material deposition: the piezoelectric material may be PZT or other piezoelectric material such as AlN. The PZT deposit is formed by a sputtering method, PZT (lead zirconate titanate, pb (zrti) O3, abbreviated PZT), which is a solid target material prepared in advance by mixing in a specific atomic ratio. Under high vacuum, the PZT target material is sputtered by the plasma generated by high voltage and is deposited on the surface of the silicon slice. And (3) applying a certain temperature to the silicon substrate to recrystallize the PZT during sputtering to form the required piezoelectric crystal. The thickness of the PZT deposit is around 1 micron. The AlN material is also formed by a sputtering method, the working temperature can be lower (less than 400 ℃ or even lower) during sputtering, and the influence of the temperature on the existing metal in the subsequent process integration is more favorably reduced.

Step 11, depositing PZT top layer metal: platinum Pt was also used, with a thickness of 100 nm, 0.1 μm.

Step 12, as shown in fig. 16, top layer metal is photoetched and etched: the top layer of platinum Pt must be formed into a certain shape according to the design of the whole product and connected with the wiring. Platinum Pt is an inert metal and is relatively difficult to form by a liquid etching method, and in this embodiment, a top metal layer is etched by a plasma dry gas phase etching method to form an upper metal layer.

Step 13, photoetching, corroding and filling metal deposition to form upper and lower metal link holes;

as the metal link hole adopts a Z-shaped hole, PZT etching is firstly carried out, and only PZT is etched, as shown in a region 13 in figure 17, the PZT etching adopts an international advanced hydrogen chloride fluoride hydrogen chloride plasma dry-method gas-phase etching method, the method has good etching uniformity, the edge of the PZT material after etching is neat, and a certain slope is formed, thereby facilitating the subsequent process steps. The etching of the AlN material can be performed by phosphoric acid or corresponding plasma dry etching, and the process needs to be relatively adjusted. The PZT and underlying metal are then etched, as in region 14 of fig. 17, which simultaneously etches the PZT and underlying metal using a plasma dry vapor etch. Referring to fig. 18, a Z-via vertical via Zia is etched by photolithography, one of the key structures for 3D vertical electrical connections is the formation of a Z-via vertical via Zia, which serves to connect the upper and lower metal layers of PMUT to the second metal wiring 202 in the vertical direction, and to other parts of the circuit, or to the backside TSV pad, to external circuitry via metal wire vias 201. After Zia photoetching holes are formed, the mechanical layer and the silicon dioxide layer are etched continuously, the second layer of metal wiring 202 is stopped, and photoresist is removed and cleaning is carried out. FIG. 19 is followed by a Ti/TiN/Al deposition wherein the Ti/TiN is formed by sputtering and the aluminum is deposited by thermal liner deposition to enhance aluminum metal fill into Zia holes. Finally, metal is etched and corroded to form required wiring;

and step 14, as shown in fig. 20, photoetching and penetrating the front side and the back side of the silicon substrate, and depositing metal to form the through-hole TSV on the front side and the back side of the silicon. The specific method comprises the following steps:

(a) coating adhesive on the front surface for protection, drying and hardening.

(b) Performing TSV on the backside (TSV process is performed by a process and equipment well-established in the industry, and is not described here)

(c) The invention prepares a structure in the PMUT 3D structure, and a first layer of metal wiring 201 is used as a stop layer (etch stop plating pad) for TSV corrosion.

Therefore, all process procedures of the PMUT three-dimensional structure are realized, the connection is realized in the vertical direction through the metal link holes, the wiring efficiency is increased through twice metal wiring, the metal interconnection is led from the front to the back of the wafer, the chip area occupied by the metal wiring is obviously reduced, and the chip size is greatly reduced.

The manufacturing process flow of the piezoelectric micromechanical ultrasonic transducer is compatible with a semiconductor mainstream process and equipment, and the vertical direction connecting line is compatible with the conventional chip BGA (ball Grid array) packaging process, so that the piezoelectric micromechanical ultrasonic transducer has wide adaptability.