阅读说明：本技术 一种用于抑制数字变换器的工频纹波的装置 (Device for inhibiting power frequency ripple of digital converter ) 是由 焦凌云 田永立 于 2019-11-07 设计创作，主要内容包括：本发明提供了一种用于抑制数字变换器的工频纹波的装置；包括工频纹波采样电路模块、电压采样电路模块、电压控制模块、纹波控制模块、PWM控制模块和隔离驱动模块。本发明通过改进工频纹波提取和数字控制器的方法对数字变换器工频纹波进行了有效抑制,避免了使用大量储能元件来滤除工频纹波的缺点,在降低设计成本的同时减小了数字变换器的体积；本发明通过改进采样电路对工频纹波进行准确的提取,并将工频纹波叠加到电压环主控制器的电压给定基准中,弥补PI控制器在跟踪正弦信号时会出现静态误差的缺点,增设了使用准谐振控制的纹波控制环；本发明装置结构设计巧妙,成本低,效果显著。(The invention provides a device for inhibiting power frequency ripples of a digital converter; the power frequency ripple control circuit comprises a power frequency ripple sampling circuit module, a voltage control module, a ripple control module, a PWM control module and an isolation driving module. The method effectively inhibits the power frequency ripple of the digital converter by improving the power frequency ripple extraction and the digital controller, avoids the defect of filtering the power frequency ripple by using a large number of energy storage elements, reduces the design cost and reduces the volume of the digital converter; according to the invention, the sampling circuit is improved to accurately extract the power frequency ripple, and the power frequency ripple is superposed to the voltage given reference of the voltage ring main controller, so that the defect that a static error occurs when a PI (proportional-integral) controller tracks a sinusoidal signal is made up, and a ripple control ring using quasi-resonance control is additionally arranged; the device has the advantages of ingenious structural design, low cost and remarkable effect.)

1. The utility model provides a device for restraining power frequency ripple of digital converter which characterized in that includes power frequency ripple sampling circuit module, voltage control module, ripple control module, PWM control module and keeps apart drive module.

2. The apparatus for suppressing power frequency ripple of a digital converter according to claim 1, wherein the ripple control module is a ripple loop control module.

3. The apparatus for suppressing power frequency ripple of a digital converter according to claim 1, wherein the power frequency ripple sampling circuit module and the voltage sampling circuit module are respectively connected to an output voltage terminal of the digital converter;

the voltage control module, the ripple control module, the PWM control module and the isolation driving module are arranged among the power frequency ripple sampling circuit module, the voltage sampling circuit module and the digital converter.

4. The apparatus according to claim 1, wherein the power frequency ripple sampling circuit module is connected with the ripple control module and the voltage control module, and is connected with the PWM control module and the isolation driving module after being connected in parallel with the ripple control module.

5. The apparatus for suppressing power frequency ripple of a digital converter according to claim 1, wherein the power frequency ripple sampling circuit module comprises capacitors C1, C2, C3 and resistors R1, R2, R3, R4, R5, R6.

6. The apparatus according to claim 5, wherein the capacitor C1 is connected to R1 and R3, the C2 and C3 are connected in parallel, and the C2 is connected to R5 and R6.

7. The apparatus for suppressing power frequency ripple of a digital converter according to claim 1, wherein the band pass filter consisting of R4, C2, C3 and R5 has a bandwidth of 10hz and a center frequency of 50 hz.

8. The apparatus according to claim 1, wherein in the power frequency ripple sampling circuit module, since the power frequency ripple is sampled as an ac signal and has positive and negative voltages, and the dsp can only collect a signal with a positive voltage, it is necessary to raise the voltage of the AD sampling port by 1.65v, and finally the voltage of the Vad port should be a voltage signal of 0-3.3 v.

9. The apparatus according to claim 1, wherein the voltage control uses PI control, and the power frequency ripple extracted by the power frequency ripple sampling circuit is superimposed on the set value of the output voltage during the control process, so as to correct the difference between the output voltage sampling and the set value.

10. The apparatus for suppressing power frequency ripple of a digital converter according to claim 1, wherein the function involved in the ripple control module is represented by the formula:

wherein K_RQuasi-resonant controller coefficient, ω_cQuasi-resonant controller bandwidth, ω₀At a resonance frequency

Discretizing by aligning resonance controller by bilinear transformation method

The discretized time domain difference equation of the ripple ring quasi-resonance controller is as follows:

u(k)＝b₀e(k)+b₁e(k-1)+b₂e(k-2)-a₁u(k-1)-a₂u(k-2)

wherein G is_v(s) is a transfer function of the main control voltage ring, G_R(s) transfer function for additional ripple quasi-resonant controller, H₁(s) is the transfer function of the existing voltage sampling circuit, H₂(s) is the transfer function of the power frequency ripple sampling circuit, V_OIs the actual output voltage of the converter, V_RippleFor line frequency ripple, V, of the converter_setIs the desired output voltage of the converter.

Technical Field

The invention relates to the field of electronic information; and more particularly, to an apparatus for suppressing power frequency ripple of a digital converter.

Background

At present, the used power frequency ripple suppression method mainly adopts the method that a filter circuit is added at an output end to filter out power frequency ripples mixed in the output, so that an extra energy storage element is inevitably introduced, and the hardware cost and the volume of the converter are increased. The purpose of the innovation is to provide a method and a device for effectively inhibiting the power frequency ripple of the converter on the premise of not increasing the design cost and the product volume.

The power frequency ripple contained in the output voltage of the digital converter only occupies a very small part relative to the actual output voltage, and the current output voltage sampling can reduce and smooth the voltage multiple on the sampling circuit in order to prevent the sampling overrun and the clutter interference, so that the power frequency ripple is greatly attenuated in the actual sampling circuit, and the phenomenon that the digital converter cannot well extract the power frequency ripple is caused.

Disclosure of Invention

The invention aims to provide a device for inhibiting power frequency ripples of a digital converter.

In a first aspect, the invention is realized by the following technical scheme:

the invention relates to a device for inhibiting power frequency ripples of a digital converter, which comprises a power frequency ripple sampling circuit module, a voltage control module, a ripple control module, a PWM control module and an isolation driving module.

Preferably, the ripple control module is a ripple loop control module.

Preferably, the power frequency ripple sampling circuit module and the voltage sampling circuit module are respectively connected with an output voltage end of the digital converter;

the voltage control module, the ripple control module, the PWM control module and the isolation driving module are arranged among the power frequency ripple sampling circuit module, the voltage sampling circuit module and the digital converter.

Preferably, the power frequency ripple sampling circuit module is connected with the ripple control module and is connected with the voltage control module to form a parallel connection, and then is connected with the PWM control module and the isolation driving module.

Preferably, the power frequency ripple sampling circuit module comprises capacitors C1, C2 and C3 and resistors R1, R2, R3, R4, R5 and R6.

Preferably, the capacitor C1 is connected with R1 and R3, the C2 and C3 are connected in parallel, and the C2 is connected with R5 and R6.

Preferably, the band-pass filter composed of R4, C2, C3 and R5 has a bandwidth of 10hz and a center frequency of 50 hz.

Preferably, in the power frequency ripple sampling circuit module, because the power frequency ripple is sampled as an alternating current signal, positive and negative voltages exist, and the dsp can only collect a signal with a positive voltage, a voltage rise of 1.65v needs to be performed on an AD sampling port signal, and finally, the voltage at the Vad port should be a voltage signal of 0-3.3 v.

Preferably, the voltage control adopts PI control, and the power frequency ripple extracted by the power frequency ripple sampling circuit is superposed on the set value of the output voltage in the control process to correct the difference between the sampled output voltage and the set value.

Preferably, the functional formula involved in the ripple control module is:

wherein K_RQuasi-resonant controller coefficient, ω_cQuasi-resonant controller bandwidth, ω₀At a resonance frequency

Discretizing by aligning resonance controller by bilinear transformation method

The discretized time domain difference equation of the ripple ring quasi-resonance controller is as follows:

u(k)＝b₀e(k)+b₁e(k-1)+b₂e(k-2)-a₁u(k-1)-a₂u(k-2)

wherein G is_v(s) is a transfer function of the main control voltage ring, G_R(s) transfer function for additional ripple quasi-resonant controller, H₁(s) is the transfer function of the existing voltage sampling circuit, H₂(s) is the transfer function of the power frequency ripple sampling circuit, V_OIs the actual output voltage of the converter, V_RippleFor line frequency ripple, V, of the converter_setIs the desired output voltage of the converter.

According to the invention, the sampling circuit is improved to accurately extract the power frequency ripple, and the power frequency ripple is superposed to the voltage given reference of the voltage loop main controller. In order to make up for the defect that a static error occurs when a PI controller tracks a sinusoidal signal, a ripple control loop using quasi-resonance control is additionally arranged.

Aiming at the problem that power frequency ripples contained in the output voltage of the digital converter in the prior art only account for a very small part of the actual output voltage, the existing output voltage sampling can reduce and smooth the voltage multiple on a sampling circuit in order to prevent sampling overrun and clutter interference, so that the power frequency ripples are greatly attenuated in the actual sampling circuit, and the phenomenon that the digital converter cannot well extract the power frequency ripples is caused.

In order to obtain power frequency ripple sampling well, the device firstly samples and amplifies an alternating current signal of the output voltage to obtain an alternating current content part in the output voltage, and secondly adds power frequency band-pass filtering on a sampling circuit in order to prevent high-frequency noise and load mutation from interfering the voltage, so that relatively pure power frequency ripple sampling can be obtained.

The method of the invention has the following advantages:

(1) the method effectively inhibits the power frequency ripple of the digital converter by improving the power frequency ripple extraction and the digital controller, avoids the defect of filtering the power frequency ripple by using a large number of energy storage elements, reduces the design cost and reduces the volume of the digital converter;

(2) in order to achieve the creativity of the invention, the invention accurately extracts the power frequency ripple wave by improving the sampling circuit, and superimposes the power frequency ripple wave on the voltage given reference of the voltage ring main controller;

(3) in order to further make up for the defect that a static error occurs when a PI controller tracks a sinusoidal signal, the invention is additionally provided with a ripple control loop using quasi-resonance control;

(4) the invention aims to provide a method and a device for effectively inhibiting power frequency ripples of a converter on the premise of not increasing the design cost and the product volume;

(5) the device has the advantages of ingenious structural design, low cost and remarkable effect.

Drawings

Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:

FIG. 1 is a block diagram of the present invention;

FIG. 2 is a power frequency ripple sampling circuit of the present invention;

fig. 3 is a control block diagram of the apparatus of the present invention.

Detailed Description

The present invention will be described in detail with reference to specific examples. It should be noted that the following examples are only illustrative of the present invention, but the scope of the present invention is not limited to the following examples.