阅读说明：本技术 降低非隔离型三相准单级逆变器共模电压的空间矢量调制方法 (Space vector modulation method for reducing common-mode voltage of non-isolated three-phase quasi-single-stage inverter ) 是由 张犁 张涛 马天睿 雷峥子 吴峰 王楚扬 于 2019-09-16 设计创作，主要内容包括：本发明公开了降低非隔离型三相准单级逆变器共模电压的空间矢量调制方法。在合成逆变器的输出电压空间矢量过程中,当输入电压小于电网线电压峰值时,使用零矢量、正小矢量、中矢量和大矢量合成参考矢量,其中将零矢量(0,0,0)替换为(l,l,l),并舍弃共模电压模长为V<Sub>L</Sub>/3的正小矢量(l,0,0)、(0,l,0)和(0,0,l)；当输入电压大于等于电网线电压峰值时,舍弃零矢量,只使用相邻的小矢量合成参考矢量；将参考矢量作为逆变器的输出电压空间矢量。本发明降低了共模电压变化量,并保证了共模电压频率不变,从而减小漏电流。(The invention discloses a space vector modulation method for reducing common-mode voltage of a non-isolated three-phase quasi-single-stage inverter. In the process of synthesizing the output voltage space vector of the inverter, when the input voltage is smaller than the voltage peak value of the power grid line, a zero vector, a positive small vector, a middle vector and a large vector are used for synthesizing a reference vector, wherein the zero vector (0,0,0) is replaced by (l, l, l), and the common-mode voltage mode length is abandoned to be V L Positive small vectors of (l,0,0), (0, l,0), and (0,0, l) of/3; when the input voltage is greater than or equal to the voltage peak value of the power grid line, discarding the zero vector and only using the adjacent small vectors to synthesize the reference vector; and taking the reference vector as an output voltage space vector of the inverter. The invention reduces the common mode voltage variation and ensures that the common mode voltage frequency is unchanged, thereby reducing the leakage current.)

1. The space vector modulation method for reducing the common-mode voltage of the non-isolated three-phase quasi-single-stage inverter is characterized by comprising the following steps of: voltage space vector adopted state quantity (St)_a,St_b,St_c) To show that the switching state quantity St of each phase is set_xThe expression of (a) is as follows:

wherein x is a, b, c, three phases of a, b and c, v_xnRepresenting bridge arm midpoint voltage V of each phase of the non-isolated three-phase quasi-single-stage inverter_HIndicating the high voltage DC port voltage, V, of a non-isolated three-phase quasi-single-stage inverter_LThe low-voltage direct-current port voltage of the non-isolated three-phase quasi-single-stage inverter is represented, E represents half of the bus voltage, and l represents V_LThe ratio to E;

first, voltage space vectors corresponding to voltage space vector classes are determined, wherein the voltage space vector classes comprise a zero vector, a negative small vector, a positive small vector, a middle vector and a large vector, the zero vector comprises (2,2,2), (l, l, l) and (0,0,0), the negative small vector comprises (2, l, l), (2,2, l), (l,2,2), (l, l,2) and (2, l,2), the positive small vector comprises (2, l, l), (2,2, l), (l,2,2), (l, l,2) and (2, l,2), the middle vector comprises (2, l,0), (l,2,0), (0,2, l), (0, l,2), (l,0,2) and (2,0, l), the large vector comprises (2,0,0), (2,2,0), (0,2,2), (0,0,2), and (2,0, 2);

in the process of synthesizing the output voltage space vector of the inverter, when the input voltage is smaller than the voltage peak value of the power grid line, a zero vector, a positive small vector, a middle vector and a large vector are used for synthesizing a reference vector, wherein the zero vector (0,0,0) is replaced by (l, l, l), and the common-mode voltage mode length is abandoned to be V_LPositive small vectors of (l,0,0), (0, l,0), and (0,0, l) of/3;

when the input voltage is greater than or equal to the voltage peak value of the power grid line, discarding the zero vector, and only using the adjacent positive small vectors to synthesize the reference vector;

and taking the reference vector as an output voltage space vector of the inverter.

2. The space vector modulation method for reducing the common-mode voltage of the non-isolated three-phase quasi-single-stage inverter according to claim 1, wherein: in the process of synthesizing the reference vector, the transmission order of the voltage space vectors is determined as follows:

and determining the size of the switching loss generated corresponding to different voltage space vector sending sequences, and selecting the corresponding voltage space vector sending sequence when the switching loss is minimum.

3. The space vector modulation method for reducing the common-mode voltage of the non-isolated three-phase quasi-single-stage inverter according to claim 1, wherein: determining the sector distribution position of the reference vector before synthesizing the reference vector; and then, in the sector to which the reference vector belongs, synthesizing the reference vector according to the magnitude relation between the input voltage and the peak value of the power grid line voltage.

4. The space vector modulation method for reducing the common-mode voltage of the non-isolated three-phase quasi-single-stage inverter according to claim 3, wherein: before determining the sector distribution position of the reference vector, the vector space corresponding to the voltage space vector needs to be sectorized.

5. The space vector modulation method for reducing the common-mode voltage of the non-isolated three-phase quasi-single-stage inverter according to claim 4, wherein: the process of sector division of the vector space corresponding to the voltage space vector is as follows:

the voltage space vector diagram is divided into 6 large sectors, and the expressions of three curves for dividing the 6 large sectors are as follows:

wherein, V_αIs the component of the voltage space vector on the alpha coordinate axis, V_βThe component of the voltage space vector on a beta coordinate axis;

dividing each large sector corresponding to the voltage space vector into 5 small sectors by using four curves respectively: the expression of the four curves dividing the first large sector into 5 small sectors is as follows:

the expression of the four curves dividing the second large sector into 5 small sectors is as follows:

the expression of the four curves dividing the third large sector into 5 small sectors is as follows:

the expression of the four curves dividing the fourth large sector into 5 small sectors is as follows:

the expression of the four curves dividing the fifth large sector into 5 small sectors is as follows:

the expression of the four curves dividing the sixth large sector into 5 small sectors is as follows:

wherein s represents V_HAnd V_LThe ratio of (a) to (b).

Technical Field

The invention belongs to the technical field of inverters, and particularly relates to a space vector modulation method for common-mode voltage of a three-phase inverter.

Background

An inverter is a device that converts dc electrical energy into ac electrical energy using a power transistor device for use by an ac load. In a photovoltaic power generation grid-connected system, a three-phase three-level inverter is widely used due to the advantages of small current harmonic, small filter size, low device voltage stress and the like. The output voltage of the photovoltaic panel is usually between 200 and 1000V, so a booster circuit is usually added at the front stage of the inverter. In a conventional two-stage three-phase inverter, power is converted and transmitted in two stages. In order to reduce the Power Conversion stage number, a non-isolated Three-Phase quasi-single-stage inverter topological structure is proposed in a document 'Modified SVPWM-Controlled Three-Port Three-Phase AC-DCconverters With Reduced Power Conversion Stages for Wide Range applications', as shown in FIG. 1, and a corresponding space vector modulation strategy is proposed, and a part of Power is fed into a Power grid in a single stage by constructing a new Power transmission branch, so that the Conversion efficiency of the inverter is improved.

The non-isolated three-phase quasi-single-stage inverter has higher direct-current voltage utilization rate, but has the problem of leakage current during operation. For a traditional three-phase three-level inverter, domestic and foreign scholars propose various methods for reducing common-mode voltage change amplitude and frequency, so that leakage current is reduced. The document Common-Mode Voltage Suppression based on inductance-Level NPC Inverters adds an auxiliary circuit to the circuit to completely eliminate the Common-Mode Voltage, and the maximum modulation ratio remains unchanged, but increases the hardware cost of the system. The carrier forward laminated modulation method and the carrier reverse laminated modulation method are respectively researched in a novel non-isolated three-phase three-level photovoltaic grid-connected inverter and leakage current suppression research thereof and a flying capacitor multi-level photovoltaic inverter common-mode current suppression technology, and a novel single-carrier modulation strategy is provided on the basis, so that the common-mode voltage is constant at half of the direct-current voltage, but the novel single-carrier modulation strategy is not suitable for a three-phase quasi-single-stage inverter. Therefore, it is necessary to develop a space vector modulation method for reducing the common-mode voltage of the non-isolated three-phase quasi-single-stage inverter.

Disclosure of Invention

In order to solve the technical problems mentioned in the background art, the invention provides a space vector modulation method for reducing the common-mode voltage of a non-isolated three-phase quasi-single-stage inverter.

In order to achieve the technical purpose, the technical scheme of the invention is as follows:

space vector modulation method for reducing common-mode voltage of non-isolated three-phase quasi-single-stage inverter, wherein voltage space vector adopts state quantity (St)_a,St_b,St_c) To show that the switching state quantity St of each phase is set_xThe expression of (a) is as follows:

wherein x is a, b, c, three phases of a, b and c, v_xnRepresenting bridge arm midpoint voltage V of each phase of the non-isolated three-phase quasi-single-stage inverter_HIndicating the high voltage DC port voltage, V, of a non-isolated three-phase quasi-single-stage inverter_LThe low-voltage direct-current port voltage of the non-isolated three-phase quasi-single-stage inverter is represented, E represents half of the bus voltage, and l represents V_LThe ratio to E;

first, voltage space vectors corresponding to voltage space vector classes are determined, wherein the voltage space vector classes comprise a zero vector, a negative small vector, a positive small vector, a middle vector and a large vector, the zero vector comprises (2,2,2), (l, l, l) and (0,0,0), the negative small vector comprises (2, l, l), (2,2, l), (l,2,2), (l, l,2) and (2, l,2), the positive small vector comprises (2, l, l), (2,2, l), (l,2,2), (l, l,2) and (2, l,2), the middle vector comprises (2, l,0), (l,2,0), (0,2, l), (0, l,2), (l,0,2) and (2,0, l), the large vector comprises (2,0,0), (2,2,0), (0,2,2), (0,0,2), and (2,0, 2);

in synthesizing an output voltage space vector of an inverter, when an input voltage is less than a grid line voltage peak value, a zero vector, a positive small vector, a medium vector and a large vector are used to synthesize a reference vector, wherein a zero vector (0,0,0) is replaced by (l, l, l), and a common-mode voltage mode length is discardedIs a V_LPositive small vectors of (l,0,0), (0, l,0), and (0,0, l) of/3;

when the input voltage is greater than or equal to the voltage peak value of the power grid line, discarding the zero vector, and only using the adjacent positive small vectors to synthesize the reference vector;

and taking the reference vector as an output voltage space vector of the inverter.

Further, in the process of synthesizing the reference vector, the transmission order of the voltage space vectors is determined as follows:

and determining the size of the switching loss generated corresponding to different voltage space vector sending sequences, and selecting the corresponding voltage space vector sending sequence when the switching loss is minimum.

Further, the sector distribution position of the reference vector needs to be determined before synthesizing the reference vector; and then, in the sector to which the reference vector belongs, synthesizing the reference vector according to the magnitude relation between the input voltage and the peak value of the power grid line voltage.

Further, before determining the sector distribution position of the reference vector, the vector space corresponding to the voltage space vector needs to be sector-divided.

Further, the process of dividing the vector space corresponding to the voltage space vector into sectors is as follows:

the voltage space vector diagram is divided into 6 large sectors, and the expressions of three curves for dividing the 6 large sectors are as follows:

wherein, V_αIs the component of the voltage space vector on the alpha coordinate axis, V_βThe component of the voltage space vector on a beta coordinate axis;

dividing each large sector corresponding to the voltage space vector into 5 small sectors by using four curves respectively:

the expression of the four curves dividing the first large sector into 5 small sectors is as follows:

the expression of the four curves dividing the second large sector into 5 small sectors is as follows:

the expression of the four curves dividing the third large sector into 5 small sectors is as follows:

the expression of the four curves dividing the fourth large sector into 5 small sectors is as follows:

the expression of the four curves dividing the fifth large sector into 5 small sectors is as follows:

the expression of the four curves dividing the sixth large sector into 5 small sectors is as follows:

wherein s represents V_HAnd V_LThe ratio of (a) to (b).

Adopt the beneficial effect that above-mentioned technical scheme brought:

according to the invention, the synthesis mode of different reference vectors is selected according to the magnitude relation between the input voltage and the peak value of the line voltage of the power grid, so that the common-mode voltage variation is reduced, the common-mode voltage frequency is ensured to be unchanged, and the leakage current is reduced.

Drawings

FIG. 1 is a non-isolated three-phase quasi-single-stage inverter topology;

FIG. 2 is a basic flow diagram of the present invention;

FIG. 3 is a sectorized illustration of the vector space corresponding to the voltage space vector of the present invention;

FIGS. 4-7 are graphs of experimental results of common mode voltages for conventional quasi-single stage space vector modulation and space vector modulation according to embodiments of the present invention;

FIG. 8 is a graph of common mode voltage variation versus conventional quasi-single stage space vector modulation and space vector modulation of the present invention;

fig. 9 is a graph of efficiency versus efficiency for a conventional quasi-single stage space vector modulation and the space vector modulation of the present invention.

Detailed Description

The technical scheme of the invention is explained in detail in the following with the accompanying drawings.

The present embodiment is directed to a non-isolated three-phase quasi-single-stage inverter topology as shown in fig. 1. In the figure, S₁、S₂、S_La1、S_La2、S_Lb1、S_Lb2、S_Lc1、S_Lc2、S_Ha、S_Hb、S_Hc、S_Za、S_ZbAnd S_ZcIs a power switch tube, L₁、L_a、L_bAnd L_cIs an inductor, C_LAnd C_HIs a capacitor.

Voltage space vector available state quantity (St)_a,St_b,St_c) To show that the switching state quantity St of each phase is set_xThe expression of (a) is as follows:

wherein x is a, b, c, three phases of a, b and c, v_xnRepresenting bridge arm midpoint voltage V of each phase of the non-isolated three-phase quasi-single-stage inverter_HIndicating the high voltage DC port voltage, V, of a non-isolated three-phase quasi-single-stage inverter_LThe low-voltage direct-current port voltage of the non-isolated three-phase quasi-single-stage inverter is represented, E represents half of the bus voltage, and l represents V_LRatio to E。

In the present invention, the classification of voltage space vectors is shown in the following table:

voltage space vector class	Corresponding voltage space vector
		Zero vector	(2,2,2)(l,l,l)(0,0,0)
Negative small vector	(2,l,l)(2,2,l)(l,2,l)(l,2,2)(l,l,2)(2,l,2)
		Positive small vector	(l,0,0)(l,l,0)(0,l,0)(0,l,l)(0,0,l)(l,0,l)
Middle vector	(2,l,0)(l,2,0)(0,2,l)(0,l,2)(l,0,2)(2,0,l)
		Big vector	(2,0,0)(2,2,0)(0,2,0)(0,2,2)(0,0,2)(2,0,2)

Fig. 2 shows a basic flow chart of the present invention, which comprises the following steps:

in the process of synthesizing the output voltage space vector of the inverter, when the input voltage is smaller than the voltage peak value of the power grid line, a zero vector, a positive small vector, a middle vector and a large vector are used for synthesizing a reference vector, wherein the zero vector (0,0,0) is replaced by (l, l, l), and the common-mode voltage mode length is abandoned to be V_LA positive small vector of/3, i.e., (l,0,0), (0, l,0), (0,0, l); when the input voltage is largeWhen the peak value of the power grid line voltage is equal to the peak value of the power grid line voltage, the zero vector is abandoned, and only the adjacent positive small vectors are used for synthesizing the reference vector; and taking the reference vector as an output voltage space vector of the inverter.

In this embodiment, preferably, in the synthesis process of the reference vector, the transmission order of the voltage space vectors is determined in the following manner:

and determining the size of the switching loss generated corresponding to different voltage space vector sending sequences, and selecting the corresponding voltage space vector sending sequence when the switching loss is minimum.

In this embodiment, it is preferable that the sector distribution position of the reference vector needs to be determined before synthesizing the reference vector; and then, in the sector to which the reference vector belongs, synthesizing the reference vector according to the magnitude relation between the input voltage and the peak value of the power grid line voltage.

In this embodiment, preferably, before determining the sector distribution position of the reference vector, the vector space corresponding to the voltage space vector needs to be sectorized.

Fig. 3 is an exemplary diagram of sector division of a vector space corresponding to a voltage space vector in the present embodiment, and expressions of three curves for dividing the voltage space vector diagram into 6 large sectors are as follows:

as shown in FIG. 3, the 6 large sectors are sequentially sectors I to VI, and the 6 large sectors are divided into areas 1 to 24. And dividing each large sector corresponding to the voltage space vector into 5 small sectors by using four curves respectively.

The expression of the four curves dividing sector i into 5 small sectors is as follows:

the expression of the four curves dividing sector ii into 5 small sectors is as follows:

the expression of the four curves dividing sector III into 5 small sectors is as follows:

the expression of the four curves dividing the sector iv into 5 small sectors is as follows:

the expression for the four curves dividing sector v into 5 small sectors is as follows:

the expression of the four curves dividing the sector vi into 5 small sectors is as follows:

wherein, V_αIs the component of the voltage space vector on the alpha coordinate axis, V_βIs the component of voltage space vector on the coordinate axis of beta, s represents V_HAnd V_LThe ratio of (a) to (b).

Fig. 4-7 are graphs showing experimental results of common mode voltages for conventional quasi-single stage space vector modulation and space vector modulation according to embodiments of the present invention. In the experiment, V_HThe value is 700V, and V is respectively corresponding to V in figures 4-7_LThe values are 250V, 350V, 500V and 600V, wherein (a) in fig. 4-7 corresponds to conventional modulation and (b) in fig. 4-7 corresponds to embodiment modulation. Wherein v is_an、v_bn、v_cnRespectively representing bridge arm midpoint voltages, v, of three phases abc_CMVRepresenting the common mode voltage. The comparison of the experimental results shows that the common-mode voltage variation of the embodiment is smaller than that of the traditional modulation under different input voltagesThe invention can effectively improve the common mode voltage.

Fig. 8 is a graph showing the common mode voltage variation of the conventional quasi-single-stage space vector modulation and the space vector modulation according to the embodiment of the present invention, and fig. 9 is a graph showing the efficiency. From the graph, it can be found that, since the common mode voltage space vector improvement method provided by the invention adopts the corresponding voltage space vector transmission sequence when the switching loss is minimum, the common mode voltage variation can be improved while the system efficiency is kept high.