阅读说明：本技术 冲击电流抑制电路及其抑制冲击电流的方法 (Impulse current suppression circuit and method for suppressing impulse current thereof ) 是由 李貌 马少军 于 2019-11-04 设计创作，主要内容包括：一种冲击电流抑制电路,包括第一开关、预充电支路、第三开关以及控制装置。第一开关连接在输入电压与母线电容之间；预充电支路与第一开关并联连接,预充电支路包括串联连接的第二开关和电阻；第三开关连接在所述母线电容与负载之间,负载与母线电容并联连接。控制装置的输出端分别与第一开关、第二开关和第三开关的控制端连接。本发明还公开了冲击电流抑制电路抑制冲击电流的方法。本发明能够有效抑制开关导通时所产生的冲击电流,通用性好,成本低。(A surge current suppression circuit comprises a first switch, a pre-charging branch circuit, a third switch and a control device. The first switch is connected between the input voltage and the bus capacitor; the pre-charging branch circuit is connected with the first switch in parallel and comprises a second switch and a resistor which are connected in series; the third switch is connected between the bus capacitor and the load, and the load is connected with the bus capacitor in parallel. The output end of the control device is respectively connected with the control ends of the first switch, the second switch and the third switch. The invention also discloses a method for inhibiting the impact current by the impact current inhibiting circuit. The invention can effectively inhibit the impact current generated when the switch is conducted, and has good universality and low cost.)

1. A rush current suppression circuit, comprising;

a first switch connected between the input voltage and the bus capacitor;

a pre-charge branch connected in parallel with the first switch, the pre-charge branch comprising a second switch and a resistor connected in series;

a third switch connected between the bus capacitor and a load, the load being connected in parallel with the bus capacitor;

the output end of the control device is respectively connected with the control end of the first switch, the control end of the second switch and the control end of the third switch; the control device is used for controlling the second switch to be connected and controlling the first switch and the third switch to be disconnected so as to enable the input voltage to charge the bus capacitor through the pre-charging branch, when the voltage difference value between the input voltage and the voltage of the bus capacitor is smaller than or equal to a preset first voltage difference threshold value, the first switch is firstly controlled to be connected, and after the first switch is normally connected, the second switch and the third switch are sequentially controlled to be disconnected.

2. The inrush current suppression circuit of claim 1, wherein: the control device is used for judging that the voltage difference value between the input voltage and the bus capacitor voltage is less than or equal to a preset first voltage difference threshold value after first preset time from the time of controlling the second switch to be switched on and controlling the first switch and the third switch to be switched off.

3. The inrush current suppression circuit of claim 1, further comprising:

the first voltage detection circuit is used for detecting the magnitude of the input voltage;

the second voltage detection circuit is used for detecting the voltage of the bus capacitor;

the input end of the control device is respectively connected with the output end of the first voltage detection circuit and the output end of the second voltage detection circuit; the control device is used for judging whether the voltage difference value between the input voltage and the bus capacitor voltage is smaller than or equal to a preset first voltage difference threshold value or not in real time.

4. The inrush current suppression circuit of claim 3, wherein the control means is configured to control the first switch and the third switch to be turned off when a first predetermined time elapses since the second switch is controlled to be turned on and the first switch and the third switch are controlled to be turned off, if the voltage difference between the input voltage and the bus capacitor voltage is greater than a predetermined first voltage difference threshold.

5. The inrush current suppression circuit of claim 3, wherein the control means is configured to determine in real time from when the first switch is controlled to be turned on whether a voltage difference between the input voltage and the voltage of the bus capacitor is less than or equal to a preset second voltage difference threshold, and determine that the first switch has been turned on normally when the voltage difference between the input voltage and the voltage of the bus capacitor is less than or equal to the preset second voltage difference threshold, where the second voltage difference threshold is less than the first voltage difference threshold.

6. The inrush current suppression circuit according to claim 2 or 3, wherein the control means is configured to determine that the first switch has been normally turned on when a second preset time elapses from when the first switch is controlled to be turned on.

7. A method of suppressing a rush current by a rush current suppression circuit as claimed in claim 1, including the steps of:

the control device controls the second switch to be connected and controls the first switch and the third switch to be disconnected, so that the input voltage charges the bus capacitor through the pre-charging branch circuit;

the control device judges whether a voltage difference value between the input voltage and the bus capacitor voltage is smaller than or equal to a preset first voltage difference threshold value or not, when the voltage difference value between the input voltage and the bus capacitor voltage is smaller than or equal to the preset first voltage difference threshold value, the first switch is controlled to be switched on, and after the first switch is normally switched on, the second switch is controlled to be switched off and the third switch is controlled to be switched on in sequence.

8. A rush current suppression circuit, comprising:

a first switch connected between an input voltage and a bus capacitor, the bus capacitor being connected in parallel with a load;

a pre-charge branch connected in parallel with the first switch, the pre-charge branch comprising a second switch and a resistor connected in series;

the output end of the control device is respectively connected with the control end of the first switch, the control end of the second switch and the enabling end of the load; the control device is used for controlling the second switch to be switched on and controlling the first switch to be switched off and the load to be disabled so as to enable the input voltage to charge the bus capacitor through the pre-charging branch, when the voltage difference value between the input voltage and the voltage of the bus capacitor is smaller than or equal to a preset first voltage difference threshold value, the first switch is controlled to be switched on first, and after the first switch is normally switched on, the second switch is sequentially controlled to be switched off and enabled to enable the load.

9. The inrush current suppression circuit of claim 8, wherein: the control device is used for judging that the voltage difference value between the input voltage and the bus capacitor voltage is less than or equal to a preset first voltage difference threshold value after a first preset time from the time of controlling the second switch to be switched on and controlling the first switch to be switched off and the load to be disabled.

10. The inrush current suppression circuit of claim 8, further comprising:

the first voltage detection circuit is used for detecting the magnitude of the input voltage;

the second voltage detection circuit is used for detecting the voltage of the bus capacitor;

the input end of the control device is respectively connected with the output end of the first voltage detection circuit and the output end of the second voltage detection circuit; the control device is used for judging whether the voltage difference value between the input voltage and the bus capacitor voltage is smaller than or equal to a preset first voltage difference threshold value or not in real time.

11. The inrush current suppression circuit of claim 10, wherein the control device is configured to control the first switch to turn off and disable the load if a voltage difference between the input voltage and the bus capacitor voltage is greater than a preset first voltage difference threshold after a first preset time elapses from when the second switch is controlled to turn on and the first switch is controlled to turn off and disable the load.

12. The inrush current suppression circuit of claim 10, wherein the control means is configured to determine in real time from when the first switch is controlled to be turned on whether a voltage difference between the input voltage and the voltage of the bus capacitor is less than or equal to a preset second voltage difference threshold, and determine that the first switch has been turned on normally when the voltage difference between the input voltage and the voltage of the bus capacitor is less than or equal to the preset second voltage difference threshold, and the second voltage difference threshold is less than the first voltage difference threshold.

13. The inrush current suppression circuit according to claim 9 or 10, wherein the control means is configured to determine that the first switch has been normally turned on when a second preset time elapses from when the first switch is controlled to be turned on.

14. The method of suppressing a rush current by a rush current suppression circuit as claimed in claim 8, including the steps of:

the control device controls the second switch to be switched on and controls the first switch to be switched off and the load to be disabled, so that the input voltage charges the bus capacitor through the pre-charging branch circuit;

the control device judges whether a voltage difference value between the input voltage and the bus capacitor voltage is smaller than or equal to a preset first voltage difference threshold value or not, when the voltage difference value between the input voltage and the bus capacitor voltage is smaller than or equal to the preset first voltage difference threshold value, the first switch is controlled to be switched on, and after the first switch is normally switched on, the second switch is sequentially controlled to be switched off and enable the load.