阅读说明：本技术 逐次逼近式模拟数字转换器和其校正方法 (Successive approximation analog-to-digital converter and correction method thereof ) 是由 曾华俊 王笃修 于 2018-11-15 设计创作，主要内容包括：本发明提供了一种逐次逼近式模拟数字转换器。此逐次逼近式模拟数字转换器包括模拟电路和数字控制电路。数字控制电路会耦接模拟电路。数字控制电路包括校正电路、存储器装置,以及非同步控制电路。校正电路可用以执行校正操作。存储器装置会耦接校正电路,以及储存校正电路执行校正操作产生的校正信息。非同步控制电路会耦接存储器装置,以及从存储器装置读取校正信息。当逐次逼近式模拟数字转换器藉由非同步控制电路进行操作前,非同步控制电路根据校正信息,消除逐次逼近式模拟数字转换器中的非理想效应。(The invention provides a successive approximation type analog-digital converter. The successive approximation analog-to-digital converter comprises an analog circuit and a digital control circuit. The digital control circuit is coupled to the analog circuit. The digital control circuit includes a correction circuit, a memory device, and an asynchronous control circuit. The correction circuit may be configured to perform a correction operation. The memory device is coupled with the correction circuit and stores correction information generated by the correction circuit executing the correction operation. The asynchronous control circuit is coupled to the memory device and reads the calibration information from the memory device. Before the successive approximation type analog-digital converter is operated by the asynchronous control circuit, the asynchronous control circuit eliminates the non-ideal effect in the successive approximation type analog-digital converter according to the correction information.)

1. A successive approximation analog-to-digital converter, comprising:

an analog circuit; and

a digital control circuit coupled to the analog circuit, wherein the digital control circuit comprises:

a calibration circuit for performing a calibration operation;

a memory device coupled to the calibration circuit and storing calibration information generated by the calibration circuit executing the calibration operation; and

an asynchronous control circuit coupled to the memory device and reading the calibration information from the memory device;

before the said asynchronous control circuit operates the said successive approximation type analog-digital converter, the said asynchronous control circuit eliminates the non-ideal effect in the said successive approximation type analog-digital converter according to the said correction information.

2. The successive approximation analog-to-digital converter of claim 1, wherein said digital control circuit further comprises:

a selection circuit coupled to the calibration circuit and the asynchronous control circuit, and selectively activating the calibration circuit or the asynchronous control circuit to perform the operation of the successive approximation analog-to-digital converter according to a control signal.

3. The successive approximation analog-to-digital converter of claim 2 wherein said selection circuit receives said control signal from a control node.

4. The successive approximation analog-to-digital converter according to claim 2, wherein before performing the calibration operation, a selection circuit selects the calibration circuit to calibrate the successive approximation analog-to-digital converter to generate the calibration information.

5. The successive approximation analog-to-digital converter of claim 2 wherein said correction circuit is a synchronous control circuit.

6. The successive approximation analog-to-digital converter of claim 1, wherein said analog circuit comprises:

a sample-and-hold circuit coupled to the digital control circuit;

a digital-to-analog converter coupled to the digital control circuit; and

and a comparator coupled to the sample-and-hold circuit and the digital-to-analog converter.

7. A calibration method for a successive approximation analog-to-digital converter, comprising:

executing a calibration operation by a calibration circuit of the successive approximation type analog-digital converter;

storing the correction information generated by executing the correction operation;

selecting an asynchronous control circuit of the successive approximation type analog-digital converter to operate the successive approximation type analog-digital converter;

according to the correction information, eliminating the non-ideal effect in the successive approximation type analog-digital converter; and

by means of the asynchronous control circuit, the successive approximation type analog-digital converter is operated in an asynchronous mode.

8. The calibration method of claim 7, further comprising:

a selection circuit selects and starts the calibration circuit or the asynchronous control circuit to operate the successive approximation analog-to-digital converter according to a control signal.

9. The calibration method of claim 8, further comprising:

before executing the calibration operation, the calibration circuit is selected to calibrate the SAR ADC to generate the calibration information.

10. The calibration method of claim 8, wherein said calibration circuit is a synchronous control circuit.

Technical Field

The present disclosure relates generally to calibration of a successive approximation adc, and more particularly to calibration of a successive approximation adc that integrates a synchronous control circuit and an asynchronous control circuit into a successive approximation adc.

Background

In the circuit design of a conventional Synchronous (SAR) Successive Approximation Register (ADC), before the Synchronous ADC is formally operated, correction may be performed to avoid an error caused by an undesired effect of the ADC. However, with the demands for High speed (High speed), High performance (High performance), and low power consumption (low power) for the application of the successive approximation analog-to-digital converter, a non-synchronous (Asynchronous) successive approximation analog-to-digital converter has been developed.

However, although the asynchronous successive approximation adc has the above advantages, it cannot be corrected, so that when the asynchronous successive approximation adc is used, the error caused by the non-ideal effect may cause bad product characteristics or bad yield in mass production during normal operation.

Disclosure of Invention

In view of the foregoing problems, the present invention provides a calibration technique for a successive approximation adc, and more particularly, to a successive approximation adc and a calibration method by integrating a synchronous control circuit and an asynchronous control circuit into the successive approximation adc.

According to one embodiment of the invention, a successive approximation analog-to-digital converter is provided. The successive approximation type analog-digital converter comprises an analog circuit and a digital control circuit. The digital control circuit is coupled to the analog circuit. The digital control circuit includes a calibration circuit, a memory device, and an asynchronous control circuit. The calibration circuit is used for executing a calibration operation. The memory device is coupled to the calibration circuit and stores calibration information generated by the calibration circuit executing the calibration operation. The asynchronous control circuit is coupled to the memory device and reads the calibration information from the memory device. Before the successive approximation type analog-digital converter is operated by the asynchronous control circuit, the asynchronous control circuit eliminates the non-ideal effect in the successive approximation type analog-digital converter according to the correction information.

According to some embodiments of the present invention, the digital control circuit further comprises a selection circuit. The selection circuit is coupled to the calibration circuit and the asynchronous control circuit, and selectively activates the calibration circuit or the asynchronous control circuit to perform the operation of the successive approximation analog-to-digital converter according to a control signal. According to some embodiments of the present invention, the selection circuit receives the control signal from a control node. According to some embodiments of the present invention, before the calibration operation is performed, the selection circuit selects the calibration circuit to calibrate the SAR ADC to generate the calibration information.

According to some embodiments of the invention, the correction circuit may be a synchronization control circuit. When the synchronous control circuit is selected, the successive approximation type analog-digital converter operates in a synchronous mode. When the asynchronous control circuit is selected, the successive approximation analog-digital converter operates in an asynchronous mode.

According to some embodiments of the present invention, the analog circuit includes a sample-and-hold circuit, a digital-to-analog converter, and a comparator. The sample-and-hold circuit is coupled to the digital control circuit. The digital-to-analog converter is coupled to the digital control circuit. The comparator is coupled to the sample-and-hold circuit and the digital-to-analog converter.

A calibration method is provided according to an embodiment of the invention. The calibration method is suitable for a successive approximation type analog-digital converter. The correction method comprises the following steps: executing a calibration operation by a calibration circuit of the successive approximation type analog-digital converter under a mode of selecting synchronous control; storing the correction information generated by executing the correction operation; selecting an asynchronous control circuit of the successive approximation type analog-digital converter to operate the successive approximation type analog-digital converter; according to the correction information, eliminating the non-ideal effect in the successive approximation type analog-digital converter; and operating the successive approximation analog-to-digital converter in an asynchronous mode by the asynchronous control circuit.

Other additional features and advantages of the present invention will be apparent to those skilled in the art, and it is understood that various changes and modifications can be made in the successive approximation analog-to-digital converter and its calibration method without departing from the spirit and scope of the invention.

Drawings

Fig. 1 is a block diagram of a successive approximation adc 100 according to an embodiment of the invention;

FIG. 2 is a block diagram of the digital control circuit 120 according to an embodiment of the present invention;

fig. 3 is a flowchart 300 of a calibration method according to an embodiment of the invention.

Reference numerals:

100 successive approximation analog-to-digital converter;

110 analog circuitry;

111 a sample and hold circuit;

112 a digital-to-analog converter;

113 a comparator;

120 digital control circuitry;

121 a correction circuit;

122 a memory device;

123 an asynchronous control circuit;

124 selecting a circuit;

300 a flow chart;

vin input data;

vref reference data;

vout outputs data.

Detailed Description

The best mode for carrying out the invention is set forth in this section for the purpose of illustrating the spirit of the invention and not for the purpose of limiting the scope of the invention as defined by the appended claims.

Fig. 1 is a block diagram of a Successive Approximation Register (SAR) analog-to-digital converter (ADC) 100 according to an embodiment of the invention. As shown in fig. 1, the successive approximation adc 100 may include an analog circuit 110 and a digital control circuit 120. It should be noted that the block diagram in fig. 1 is only for convenience of describing the embodiment of the present invention, but the present invention is not limited thereto. The successive approximation adc 100 may also include other components.

As shown in fig. 1, the analog circuit 110 may include a sample and hold (S/H) circuit 111, a digital-to-analog converter (DAC) 112, and a comparator (comparator) 113. The sample-and-hold circuit 111 is coupled to the digital control circuit 120 and receives the input data Vin. The digital-to-analog converter 112 is coupled to the digital control circuit 120 and receives the reference data Vref. The comparator 113 is coupled to the sample-and-hold circuit 111 and the digital-to-analog converter 112. In addition, the digital control circuit 120 generates the output data Vout.

Fig. 2 is a block diagram of the digital control circuit 120 according to an embodiment of the invention. As shown in fig. 2, the digital control circuit 120 may include a calibration circuit 121, a memory device 122, an asynchronous control circuit 123, and a selection circuit 124. The memory device 122 is coupled to the calibration circuit 121 and the asynchronous control circuit 123. The selection circuit 124 is coupled to the calibration circuit 121 and the asynchronous control circuit 123.

According to an embodiment of the present invention, the correction circuit 121 may be a synchronization control circuit. Specifically, the calibration circuit 121 according to the embodiment of the present invention can be applied to any synchronous control circuit applied to the successive approximation analog-to-digital converter 100. For example, the calibration circuit 121 may include a synchronous Successive Approximation (SAR) control circuit and a Successive Approximation (SAR) register.

In addition, the asynchronous control circuit 123 according to the embodiment of the present invention can also be applied to any asynchronous control circuit applied to the successive approximation analog-to-digital converter 100. For example, the asynchronous control circuit 123 may include an asynchronous Successive Approximation (SAR) control circuit and a SAR register.

According to an embodiment of the present invention, the memory device 123 may be a volatile memory device (volatile memory device), such as: a Dynamic Random Access Memory (DRAM), but the invention is not limited thereto. According to another embodiment of the present invention, the memory device 123 may be a non-volatile memory device (non-volatile memory device), such as: a Read Only Memory (ROM), or a flash Memory (flash Memory), but the invention is not limited thereto.

According to an embodiment of the present invention, the selecting circuit 124 may be a Multiplexer (MUX) circuit, but the invention is not limited thereto.

According to an embodiment of the present invention, before the successive approximation adc 100 operates, the successive approximation adc 100 enters a calibration mode. In the calibration mode, the SAR ADC 100 generates a calibration message by the calibration circuit 121 and stores the calibration message in the memory device 122. More specifically, in the process of generating the calibration information, a predefined signal is first inputted into the successive approximation adc 100. Then, the selecting circuit 124 selects the calibration circuit 121 (e.g., a synchronous control circuit) for calibration. When the successive approximation analog-to-digital converter 100 enters a calibration mode, the calibration circuit 121 (synchronous control circuit) calibrates the successive approximation analog-to-digital converter 100 to generate calibration information, and stores the calibration information in the memory device 122. When the successive approximation adc 100 is actually operating, the correction information stored in the memory device 122 can be used to eliminate the non-ideal effects in the successive approximation adc 100, such as: mismatch of the digital-to-analog converter 112 (mismatch), and offset voltage of the comparator 113 (offset voltage).

According to an embodiment of the present invention, the calibration information may be generated before the successive approximation adc 100 is shipped. That is, before the sar adc 100 is shipped, the sar adc 100 enters the calibration mode to generate calibration information, and stores the calibration information in the memory device 122. After the successive approximation adc 100 leaves the factory and before the actual operation, the successive approximation adc 100 can read the correction information from the memory device 122 and eliminate the non-ideal effect in the successive approximation adc 100 according to the correction information.

According to an embodiment of the present invention, the selection circuit 124 selects the synchronous control circuit (i.e. the calibration circuit 121) or the asynchronous control circuit 123 according to an external control signal to perform the operation of the successive approximation analog-to-digital converter 100. According to an embodiment of the present invention, the selection circuit 124 is coupled to a control pin (not shown) and receives an external control signal from the control pin.

When the selection circuit 124 selects the synchronous control circuit (i.e., the correction circuit 121) according to the external control signal, the successive approximation analog-to-digital converter 100 operates in a synchronous mode. That is, when the selection circuit 124 selects the synchronous control circuit (i.e., the correction circuit 121) according to the external control signal, the successive approximation analog-to-digital converter 100 can be regarded as a synchronous successive approximation analog-to-digital converter. Before the successive approximation adc 100 operates in the synchronous mode, the synchronous control circuit (i.e. the calibration circuit 121) reads the calibration information stored in the memory device 122, and eliminates the non-ideal effect in the successive approximation adc 100 according to the calibration information. After the calibration of the successive approximation adc 100 is completed, the successive approximation adc 100 can be operated in the synchronous mode by the synchronous control circuit (i.e. the calibration circuit 121).

When the selection circuit 124 selects the asynchronous control circuit 123 according to the external control signal, the successive approximation analog-to-digital converter 100 operates in an asynchronous mode. That is, when the selection circuit 124 selects the asynchronous control circuit 123 according to the external control signal, the successive approximation analog-to-digital converter 100 can be regarded as an asynchronous successive approximation analog-to-digital converter. Before the successive approximation adc 100 operates in the asynchronous mode, the asynchronous control circuit 123 reads the calibration information stored in the memory device 122, and eliminates the non-ideal effect in the successive approximation adc 100 according to the calibration information. After the calibration of the successive approximation adc 100 is completed, the successive approximation adc 100 can be operated in the asynchronous mode by the asynchronous control circuit 123.

Fig. 3 is a flow chart 300 of a calibration method according to an embodiment of the invention. The calibration method can be applied to the successive approximation adc 100 of the present invention. In step S310, a calibration operation is performed by a calibration circuit (in a mode of selecting synchronous control) of the successive approximation analog-to-digital converter 100. In step S320, the correction information generated by performing the above-mentioned correction operation is stored. In step S330, an asynchronous control circuit of the successive approximation adc 100 is selected for the successive approximation adc operation. In step S340, the non-ideal effect in the successive approximation analog-to-digital converter 100 is eliminated according to the correction information. In step S350, the successive approximation adc 100 is operated in an asynchronous mode by the asynchronous control circuit.

According to an embodiment of the present invention, the calibration method further includes selectively activating the calibration circuit or the asynchronous control circuit by a selection circuit according to a control signal to perform the operation of the successive approximation analog-to-digital converter 100. According to an embodiment of the present invention, before performing the calibration operation, a calibration circuit is selected to calibrate the successive approximation analog-to-digital converter 100 to generate calibration information.

According to an embodiment of the present invention, the calibration circuit of the successive approximation adc 100 may be a synchronous control circuit. When the synchronization control circuit is selected, the successive approximation adc 100 is operated in a synchronization mode. When the asynchronous control circuit is selected, the successive approximation analog-to-digital converter 100 is operated in the asynchronous mode.

According to the successive approximation type analog-digital converter provided by the invention, the successive approximation type analog-digital converter can firstly carry out the correction of the successive approximation type analog-digital converter in a synchronous mode, and the correction information is stored in advance. Therefore, when the successive approximation type analog-digital converter is switched to operate under the asynchronous mode, the non-ideal effect in the successive approximation type analog-digital converter can be eliminated through the stored correction information. Therefore, the successive approximation type analog-digital converter provided by the invention can reduce the problem that the product characteristics are poor or the yield of mass production is poor when the asynchronous successive approximation type analog-digital converter is used.

The numerical references in the specification and claims, such as "first" and "second", are for convenience only and do not necessarily have any chronological order.

The above paragraphs use various levels of description. It should be apparent that the teachings herein may be implemented in a wide variety of ways, and that any specific architecture or functionality of the invention in an example is merely representative. Any person skilled in the art will appreciate, in light of the teachings herein, that the various aspects of the invention herein may be practiced independently or that more than two aspects may be combined.

Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.