阅读说明：本技术 水务聚集终端用流量控制电路 (Flow control circuit for water affair gathering terminal ) 是由 王冰 薛帆 王晗 邓晓斐 宋瑶 于 2019-09-30 设计创作，主要内容包括：本发明的水务聚集终端用流量控制电路,所述吞吐量可控放大电路将实时检测的水务聚集终端服务器的网络吞吐量信号由反应网络拥堵的程度的偏差值改变T型反馈网络的电阻,实现放大电路可控放大,使网络拥堵信号有效的放大后向级电路传输,其作控制电压进入压控震荡电路,经运算放大器AR3倒相、运算放大器AR4积分、运算放大器AR5比较产生成反比的、一定频率的方波,方波信号最后进入消抖电路,通过滤波、上拉后进入运算放大器AR6、电阻R20、R22组成的迟滞比较电路比较,进一步消除方波抖动后连接到水务聚集终端服务器上通讯接口的RTS、CTS端,以改变通讯接口的RTS、CTS的工作间隔时间,从硬件上实现了对水务聚集终端服务器数据存入、访问的流量控制。(The flow control circuit for the water affair gathering terminal of the invention is characterized in that the throughput controllable amplifying circuit changes the network throughput signal of the water affair gathering terminal server detected in real time from the deviation value reflecting the degree of network congestion to the resistance of a T-shaped feedback network, realizes the controllable amplification of the amplifying circuit, enables the network congestion signal to be effectively amplified and transmitted to a backward stage circuit, the network congestion signal is used as a control voltage to enter a voltage-controlled oscillating circuit, is subjected to phase inversion by an operational amplifier AR3, is subjected to integration by an operational amplifier AR4 and is compared by an operational amplifier AR5 to generate square waves with certain frequency in inverse proportion, the square wave signal finally enters a jitter elimination circuit, is subjected to filtering and pull-up and then enters a hysteresis comparison circuit consisting of the operational amplifier AR6, a resistor R20 and a resistor R22 for comparison, is further subjected to the square wave jitter elimination and then is connected to RTS and CTS ends of a communication interface on the water affair gathering, the flow control of data storage and access of the water service aggregation terminal server is realized from hardware.)

1. The flow control circuit for the water service gathering terminal comprises a throughput controllable amplifying circuit, a voltage-controlled oscillating circuit and a jitter elimination circuit, and is characterized in that the throughput controllable amplifying circuit amplifies a network throughput signal of a water service gathering terminal server detected in real time through an amplifying circuit consisting of an operational amplifier AR1, a resistor R1-a resistor R4 and a MOS tube T1, the amplification factor is controlled by a deviation value calculated by the detected network throughput signal and a normal network throughput signal through an operational amplifier AR2, the deviation value enters the voltage-controlled oscillating circuit, a square wave with a certain frequency and an inverse proportion is generated by phase inversion of the operational amplifier AR3, integral of the operational amplifier AR4 and comparison of the operational amplifier AR5, the square wave signal finally enters the jitter elimination circuit, the square wave signal is compared through a hysteresis comparison circuit taking the operational amplifier AR6 as a core, RTS connected to a communication interface on the water service gathering terminal server after square wave jitter elimination is further eliminated, and the RTS, the square wave, And the CTS end realizes the flow control of data storage and access of the water affair gathering terminal server from hardware, and prevents the data storage access from causing impact on a network and influencing the high-efficiency and stable operation of the water affair gathering terminal server.

2. The flow control circuit for the water service aggregation terminal as claimed in claim 1, wherein the throughput-controllable amplifying circuit comprises a diode D1, an inductor L1 and an inductor L2, wherein one end of an anode of the diode D1 and one end of an inductor L1 are both connected to the network throughput signal of the resource sharing server detected in real time, a cathode of the diode D1 is connected to one end of a resistor R1, the other end of the resistor R1 is respectively connected to the non-inverting input terminal of an operational amplifier AR1 and one end of a resistor R4, the other end of the resistor R4 is respectively connected to one end of a resistor R2 and one end of a resistor R3, the inverting input terminal of the operational amplifier AR1 is connected to ground, an output terminal of the operational amplifier AR1 is connected to the other end of a resistor R2, an anode of a diode D2 and a cathode of a diode D3, an anode of the diode D3 is connected to ground, a cathode of a diode D2V, and the other end of the inductor L1, One end of the resistor R5, the other end of the resistor R5 is connected to the inverting input terminal of the operational amplifier AR2 and one end of the resistor R6, one end of the inductor L1 is connected to the normal network throughput signal, the other end of the inductor L1 is connected to the other end of the capacitor C1 and one end of the resistor R7, the other end of the resistor R7 is connected to the non-inverting input terminal of the operational amplifier AR2 and one end of the ground resistor R8, the output end of the operational amplifier AR2 is connected to the other end of the resistor R6 and the gate of the MOS transistor T1, the drain of the MOS transistor T1 is connected to the other end of the resistor R3, and the source of the MOS transistor T1.

3. The flow control circuit for the water service gathering terminal as claimed in claim 1, wherein the voltage-controlled oscillating circuit includes a resistor R9 and a resistor R10, one end of the resistor R9 and one end of the resistor R10 are both connected to the output terminal of the operational amplifier AR1, the other end of the resistor R10 is respectively connected to the inverting input terminal of the operational amplifier AR3 and one end of the resistor R11, the non-inverting input terminal of the operational amplifier AR3 is connected to ground through a resistor R12, the output terminal of the operational amplifier AR3 is respectively connected to the other end of the resistor R11 and one end of the resistor R14, the other end of the resistor R14 is respectively connected to one end of the ground resistor R13 and the drain of the MOS transistor T2, the other end of the resistor R9 is respectively connected to the inverting input terminal of the operational amplifier AR4, one end of the capacitor C2, one end of the resistor R15 and the source of the MOS transistor T2, the non-inverting input terminal of the operational amplifier AR4 is connected to the power supply +, The other end of the resistor R15 and one end of the resistor R16, the other end of the resistor R16 is connected with the non-inverting input end of the operational amplifier AR5, the inverting input end of the operational amplifier AR5, one end of the grounded capacitor C3, one end of the grounded capacitor C4 and one end of the resistor R17 are connected with +2.5V of a power supply, the ground end of the operational amplifier AR5 is connected with the ground, the output end of the operational amplifier AR5 is respectively connected with the other end of the resistor R17 and one end of the resistor R18, and the other end of the resistor R18 is connected with the gate of the MOS transistor T2.

4. The flow control circuit for the water service aggregation terminal as claimed in claim 1, wherein the jitter eliminating circuit comprises a resistor R19, one end of the resistor R19 is connected to the output terminal of the operational amplifier AR5, the other end of the resistor R19 is connected to one end of a ground capacitor C5, one end of a resistor R21 and the non-inverting input terminal of an operational amplifier AR6, the inverting input terminal of the operational amplifier AR6 is connected to one end of a ground resistor R20, one end of a resistor R22 and the emitter of a transistor Q3, the other end of the resistor R22 and the collector of the transistor Q3 are connected to +5V, the other end of the resistor R21 is connected to +2.5V, and the output terminal of the operational amplifier AR6 and the base of the transistor Q3 are connected to the RTS and CTS terminals of the communication interface on the water service aggregation terminal server.

Technical Field

The invention relates to the technical field of water quality monitoring, in particular to a flow control circuit for a water service gathering terminal.

Background

The water supply condition is directly related to the living standard and the health condition of people, the sanitary condition of urban water supply becomes a problem which is generally concerned by people, in order to ensure the water supply quality and facilitate the inquiry of water consumption of users, a water service group is generally provided with an intelligent integrated gathering terminal, specifically, a water service acquisition server is arranged to extract data acquired by a remote field end, the extracted data enters a water service analysis server for standardized processing, and finally enters a resource sharing server to realize water quality monitoring, management and inquiry service, when a server host fails and is repaired again, or when the user access amount is large in a certain time period, the information amount instantaneously received by the server host is far larger than the normal throughput, so that the signal received by the server host is disordered and blocked, the host can be halted repeatedly seriously, and the efficient and stable operation of the water service aggregation terminal server is influenced.

Therefore, a new technical solution is needed to solve this problem.

Disclosure of Invention

In view of the above situation, and in order to overcome the defects of the prior art, the present invention aims to provide a flow control circuit for a water service aggregation terminal, which has the characteristics of ingenious conception and humanized design, and realizes flow control of data storage and access of a water service aggregation terminal server from hardware, thereby effectively solving the problem that the high data storage and access amount of the server causes impact on a network, and affects the efficient and stable operation of the water service aggregation terminal server.

The technical scheme for solving the problem is that the system comprises a throughput controllable amplifying circuit, a voltage-controlled oscillating circuit and a jitter eliminating circuit, and is characterized in that the throughput controllable amplifying circuit amplifies a network throughput signal of a water service gathering terminal server detected in real time through an amplifying circuit consisting of an operational amplifier AR1, a resistor R1-a resistor R4 and a MOS tube T1, the amplification factor is controlled by a deviation value calculated by the detected network throughput signal and a normal network throughput signal through an operational amplifier AR2, the signals enter the voltage-controlled oscillating circuit, a square wave with a certain frequency proportional to the amplified signals is generated through phase inversion of the operational amplifier AR3, integration of the operational amplifier AR4 and comparison of the operational amplifier AR5, the square wave signals finally enter the jitter eliminating circuit, and are compared through a hysteresis comparison circuit taking the operational amplifier AR6 as a core, RTS, a square wave, a voltage and a signal connected to a communication interface on the water service gathering terminal server after jitter elimination are further eliminated, And the CTS end realizes the flow control of data storage and access of the water affair gathering terminal server from hardware, and prevents the data storage access from causing impact on a network and influencing the high-efficiency and stable operation of the water affair gathering terminal server.

Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages:

1, changing the resistance of a T-shaped feedback network by a network throughput signal of a water service aggregation terminal server detected in real time according to a deviation value reflecting the degree of network congestion, and realizing controllable amplification to control voltage, so that the network congestion signal is effectively amplified and then transmitted to a next-stage circuit, and a normal signal of the network is amplified very little, so that the next-stage circuit does not work;

and 2, the control voltage is subjected to phase inversion by an operational amplifier AR3, integration by an operational amplifier AR4 and comparison by an operational amplifier AR5 to generate square waves with a certain frequency which are inversely proportional to the control voltage, the square waves are filtered and pulled up and then enter a hysteresis comparison circuit consisting of the operational amplifier AR6, a resistor R20 and a resistor R22 for comparison, the square waves are further eliminated, the square waves are connected to RTS and CTS ends of a communication interface on the water service aggregation terminal server, the working interval time of the RTS and CTS of the communication interface is changed, and the flow control of data storage and access of the water service aggregation terminal server is realized on hardware.

Drawings

Fig. 1 is a schematic diagram of a throughput-controllable amplifier circuit according to the present invention.

Fig. 2 is a schematic diagram of a voltage controlled oscillator circuit according to the present invention.

Fig. 3 is a schematic diagram of the jitter cancellation circuit of the present invention.

Detailed Description

The foregoing and other aspects, features and advantages of the invention will be apparent from the following more particular description of embodiments of the invention, as illustrated in the accompanying drawings in which reference is made to figures 1 to 3. The structural contents mentioned in the following embodiments are all referred to the attached drawings of the specification.

The flow control circuit for the water service gathering terminal comprises a throughput controllable amplifying circuit, a voltage-controlled oscillating circuit and a jitter eliminating circuit, wherein the throughput controllable amplifying circuit amplifies a network throughput signal of a water service gathering terminal server detected in real time through an amplifying circuit consisting of an operational amplifier AR1, a resistor R1-a resistor R4 and an MOS tube T1, the amplification factor is controlled by a deviation value calculated by the detected network throughput signal and a normal network throughput signal through the operational amplifier AR2, so that a network congestion signal is effectively amplified and transmitted to a later-stage circuit, the network normal signal is amplified very little to enable the later-stage circuit to be out of work, then the network congestion signal enters the voltage-controlled oscillating circuit, the voltage-controlled oscillating circuit is subjected to phase inversion through an operational amplifier AR3, integral through the operational amplifier AR4 and comparison through the operational amplifier AR5 to generate square waves which are inversely proportional to the amplified signal and have a certain frequency, and the specific operational amplifier AR3, The resistor R11, R12 and R14 form an inverting inverter to invert the control voltage, the inverted and divided voltage is divided by the resistor R13 and R14 to provide a drain voltage for the MOS transistor T2, the inverted and divided voltage is fed back to the input end of an integrator consisting of an operational amplifier AR4, a resistor R9, a resistor R15 and a capacitor C2 under the control of a square wave with a certain frequency, the integrator outputs a triangular wave of which the control voltage is inversely proportional to an integration time constant (namely the values of the resistor R9 and the capacitor C2), the triangular wave enters the non-inverting input end of the operational amplifier AR5 to be compared with a direct current voltage +2.5V of the inverting input end, the operational amplifier AR5 respectively outputs a high level of +2.5V or a low level of 0V, namely, the square wave with a certain frequency inversely proportional to the control voltage is generated, and finally enters a jitter elimination circuit, the square wave comparison circuit of which takes the operational amplifier AR6 as a core to further eliminate jitter and is connected to a communication interface RTS collecting terminal server, The CTS end realizes flow control of data storage and access of the water affair gathering terminal server from hardware, and prevents the impact on a network caused by large data storage and access amount and the influence on the efficient and stable operation of the water affair gathering terminal server;

the throughput controllable amplifying circuit conducts a network throughput signal (which can be given by a NETSCOUT 1TG2-3000 network tester test) of the water service gathering terminal server detected in real time in a single direction through a diode D1, then adds the signal to an amplifying circuit consisting of an operational amplifier AR1, a resistor R1-a resistor R4 and an MOS tube T1 for amplification, and finally transmits the signal to a post-stage circuit after amplitude limiting through diodes D2 and D3, wherein the resistor R4, the resistor R2, the resistor R3 and the MOS tube T1 form a T-shaped feedback network of the operational amplifier AR1, when the grid voltage of the MOS tube T1 changes, the resistance of the T-shaped feedback network changes, so that the amplification factor adjustment is realized, and when the grid voltage of the MOS tube T1 is controlled by the detected network throughput signal and a normal network throughput signal (which is given by the network tester test in advance during normal operation of the server test), the differential amplifier AR is calculated by a deviation value calculated by the resistor R5-resistor R8 and the operational amplifier AR2, the capacitor C1 is an anti-crosstalk capacitor, the magnitude of the deviation value reflects the degree of network congestion, when the deviation value is larger, the smaller the resistance value between drain and source of the MOS transistor T1 is, and the larger the resistance value between drain and source of the MOS transistor R4, the resistor R2, the resistor R3 and the MOS transistor T1 is, the feedback resistor RF = resistor R4+ resistor R2+ (resistor R4 × resistor R2) ÷ (resistor R3+ MOS transistor T1) is, the larger the feedback resistor is, the larger the amplification factor of the operational amplifier AR1 is, so that the network congestion signal is effectively amplified and transmitted to the subsequent circuit, and the smaller the network normal signal is amplified, so that the subsequent circuit does not work, and includes the diode D1, the inductor L1 and the inductor L2, one end of the positive electrode of the diode D1 and one end of the inductor L1 are both connected to the network throughput signal of the resource sharing server for real-time detection, the negative electrode of the diode D1 is connected to one end of the resistor R1, and, One end of a resistor R4, the other end of the resistor R4 is connected to one end of a resistor R2 and one end of a resistor R3 respectively, an inverting input end of the operational amplifier AR1 is connected to ground, an output end of the operational amplifier AR1 is connected to the other end of the resistor R2, the anode of a diode D2 and the cathode of a diode D3, the anode of a diode D3 is connected to ground, the cathode of a diode D2 is connected to +5V, the other end of an inductor L1 is connected to one end of a capacitor C1 and one end of a resistor R5 respectively, the other end of a resistor R5 is connected to the inverting input end of an operational amplifier AR2 and one end of a resistor R6 respectively, one end of an inductor L1 is connected to a normal network throughput signal, the other end of an inductor L1 is connected to the other end of a capacitor C1 and one end of a resistor R7 respectively, the other end of a resistor R7 is connected to the non-inverting input end of an operational amplifier AR 7 and, The grid electrode of the MOS transistor T1, the drain electrode of the MOS transistor T1 is connected with the other end of the resistor R3, and the source electrode of the MOS transistor T1 is connected with the ground;

the voltage-controlled oscillator circuit receives an amplified detection network throughput signal, the amplified detection network throughput signal is used as an oscillator circuit with a control voltage control operational amplifier AR3-AR5 as a core to oscillate and is converted into a proportional square wave with a certain frequency, wherein the operational amplifier AR3 inverter is used for changing the integration direction of an integrator of the operational amplifier AR4, the operational amplifier AR5 is a comparator and is used for comparing the integrated triangular wave to output a square wave, the specific operational amplifier AR3, a resistor R11, R12 and R14 form an inverting inverter to invert the control voltage, the inverted control voltage and the divided control voltage are divided by resistors R13 and R14 to provide a drain voltage for a MOS transistor T2, and the inverted and divided control voltage is fed back to the input end of the integrator formed by the operational amplifier AR4, a resistor R9, a resistor R15 and a capacitor C2 under the control of the square wave with a certain frequency, and the integrator outputs the control voltage according to an integration time constant (namely, the resistor R9, the, The value of the capacitor C2) is determined), then the triangular wave with inverse proportion enters the non-inverting input end of the operational amplifier AR5 to be compared with the direct-current voltage +2.5V of the inverting input end, the operational amplifier AR5 respectively outputs +2.5V high level or 0V low level, namely, a square wave with a certain frequency inversely proportional to the control voltage is generated, the square wave comprises a resistor R9 and a resistor R10, one end of the resistor R9 and one end of the resistor R10 are both connected with the output end of the operational amplifier AR1, the other end of the resistor R10 is respectively connected with the inverting input end of the operational amplifier AR3 and one end of the resistor R11, the non-inverting input end of the operational amplifier AR3 is connected with the ground through a resistor R12, the output end of the operational amplifier AR3 is respectively connected with the other end of the resistor R11 and one end of the resistor R14, the other end of the resistor R14 is respectively connected with one end of the ground resistor R13, the drain of the resistor R2, One end of a capacitor C2, one end of a resistor R15 and a source electrode of a MOS transistor T2, a non-inverting input end of an operational amplifier AR4 is connected with +2.5V of a power supply, an output end of an operational amplifier AR4 is respectively connected with the other end of a capacitor C2, the other end of a resistor R15 and one end of a resistor R16, the other end of a resistor R16 is connected with a non-inverting input end of an operational amplifier AR5, power supply ends of the operational amplifier AR5 are respectively connected with +2.5V of the non-inverting input end of the operational amplifier AR5, one end of a grounded capacitor C3, one end of a grounded capacitor C4 and one end of a resistor R17, a ground end of the operational amplifier AR5 is connected with ground, an output end of the operational amplifier AR5 is respectively connected with the other end of a resistor R17 and one end of a resistor;

the jitter elimination circuit filters a received square wave with a certain frequency which is inversely proportional to the magnitude of a control voltage through a resistor R9 and a capacitor C5, the resistor R21 is pulled up and then enters a hysteresis comparison circuit consisting of an operational amplifier AR6, a resistor R20 and a resistor R22 for comparison, the jitter elimination circuit is further connected to RTS and CTS ends of a communication interface on the water service aggregation terminal server after square wave jitter is eliminated, so that the working interval time of RTS and CTS (time interval for sending and receiving requests given by software under normal conditions) of the communication interface is changed, the flow control of data storage and access of the water service aggregation terminal server is realized on hardware, the impact on a network caused by large data storage access amount is prevented, and the efficient and stable operation of the water service aggregation terminal server is influenced, and comprises a resistor R19, one end of the resistor R19 is connected with the output end of an operational amplifier AR5, and the other end of a resistor R19 is respectively connected with one end, one end of a resistor R21 and the non-inverting input end of an operational amplifier AR6, the inverting input end of the operational amplifier AR6 is respectively connected with one end of a grounding resistor R20, one end of a resistor R22 and the emitter of a triode Q3, the other end of a resistor R22 and the collector of the triode Q3 are connected with +5V, the other end of the resistor R21 is connected with +2.5V, and the output end of the operational amplifier AR6 and the base of the triode Q3 are connected with RTS and CTS ends of a communication interface on the water service gathering terminal server.

When the device is used specifically, the throughput controllable amplifying circuit conducts a network throughput signal of a water service gathering terminal server detected in real time in a single direction through a diode D1 and then is added to an amplifying circuit consisting of an operational amplifier AR1, a resistor R1-a resistor R4 and an MOS tube T1 for amplification, and finally is transmitted to a rear-stage circuit after being limited by diodes D2 and D3, wherein the resistor R4, the resistor R2, the resistor R3 and the MOS tube T1 form a T-shaped feedback network of the operational amplifier AR1, when the grid voltage of the MOS tube T1 changes, the resistance of the T-shaped feedback network changes, so that the amplification factor adjustment is realized, when the grid voltage of the MOS tube T1 is controlled by a deviation value calculated by a differential amplifier consisting of the detected network throughput signal and a normal network throughput signal through the resistor R5-the resistor R8 and the operational amplifier AR2, and when the grid voltage of the MOS tube T1 is larger, the leakage source resistance value is smaller, the larger the feedback resistance is, the larger the amplification factor of the operational amplifier AR1 is, so that the network congestion signal is effectively amplified and transmitted to the post-stage circuit, and the normal network signal is amplified very little, so that the post-stage circuit does not work, the voltage-controlled oscillator circuit receives the amplified detection network throughput signal, which is used as an oscillator circuit with a control voltage control operational amplifier AR3-AR5 as a core to oscillate and convert the oscillation into a square wave with inverse proportion and certain frequency, wherein the operational amplifier AR3 is an inverter used for changing the integration direction of an operational amplifier AR4 integrator, the operational amplifier AR5 is a comparator used for comparing the integrated triangular wave to output a square wave, and finally the square wave enters an anti-jitter circuit, is filtered by a resistor R9 and a capacitor C5, is pulled up by the resistor R21 and then enters a hysteresis comparison circuit consisting of the operational amplifier AR6, the resistor R20 and the R22 to be compared, and the RTS connected to a communication interface on the water service aggregation terminal server after the square wave, And the CTS end is used for changing the working interval time of RTS and CTS of the communication interface, controlling the data storage and access flow of the water affair gathering terminal server from hardware, and preventing the data storage access from causing impact on a network and influencing the high-efficiency and stable operation of the water affair gathering terminal server.