阅读说明：本技术 带标准计算机接口的喷墨打印头 (Ink jet printhead with standard computer interface ) 是由 D·L·克尼黑姆 于 2019-05-27 设计创作，主要内容包括：打印头具有标准化计算机接口,以允许打印头直接连接到标准计算机,喷射器阵列,其根据来自标准计算机的图像数据将油墨沉积在基材上,处理元件,其通过标准化计算机接口接收图像数据,缓存器,其存储通过标准化计算机接口接收的图像数据并且当由点时钟触发时将图像数据发送到喷射器阵列,所述缓存器在所述处理元件的控制下并具有灵活的存储深度,以及驱动器,其根据所述图像数据触发所述喷射器阵列中的各个喷射器。(The printhead has a standardized computer interface to allow the printhead to be directly connected to a standard computer, an ejector array to deposit ink on a substrate according to image data from the standard computer, a processing element to receive the image data through the standardized computer interface, a buffer to store the image data received through the standardized computer interface and to send the image data to the ejector array when triggered by a dot clock, the buffer being under control of the processing element and having a flexible storage depth, and a driver to trigger individual ejectors in the ejector array according to the image data.)

1. A printhead, comprising:

a standardized computer interface that allows the printhead to be directly connected to a standardized computer;

an array of ejectors that deposit ink on a substrate according to image data from the standard computer;

a processing element that receives image data through the standardized computer interface;

a buffer storing the image data received through the standardized computer interface and sending the image data to the ejector array when triggered by a dot clock, the buffer under control of the processing element and having a flexible storage depth; and

a driver that activates each ejector in the ejector array according to the image data.

2. The printhead of claim 1, further comprising a connection to an external direct current power supply.

3. The printhead of claim 1, further comprising at least one connection to a position encoder.

4. The printhead of claim 1, wherein the dot clock is generated internally.

5. The printhead of claim 1, wherein the dot clock is generated externally.

6. The printhead of claim 3, wherein the dot clock is generated from the position encoder.

7. The printhead of claim 1, wherein the standardized computer interface comprises a Universal Serial Bus (USB) interface.

8. The printhead of claim 7, wherein the USB interface comprises some of USB2, USB power delivery, or a type C USB interface.

9. The printhead of claim 1, wherein the processing element comprises a field programmable gate array.

10. A printhead as in claim 1, wherein DC power is provided through the standard computer interface.

Technical Field

The present disclosure relates to printheads, and more particularly to printheads and control electronics for printheads.

Background

Inkjet printers typically rely on a source of image data, such as some type of computer, that sends the image data to a print controller within the printing system. The print controller is typically located in the printing system or printer outside of the printhead. Then, the print controller sends a control signal to the print head according to the image data. The printhead contains manifolds and other ink path structures, as well as drop generators and their respective actuators.

The print controller typically generates or receives a clock, sometimes referred to as a "dot clock," to trigger ejection of ink drops by the printhead. The print controller may receive image data from the computer as data words for each drop generator, each word controlling the ejection of multiple successive drops by its associated drop generator. The print controller then generates a set of voltage waveforms for the drop generators immediately after each dot clock, sending these waveforms to the printhead. The waveform set may include analog voltage and control lines defining voltage polarity and timing. Each dot clock also triggers the controller to send data to the printhead to define which ejector is selected for the next waveform set after the next dot clock. Both the waveform set and the data are sent to the printhead precisely timed to the ejection of ink drops triggered by the dot clock.

Typically, each printer has its own control electronics architecture, which is intended to provide the necessary waveforms, control lines and data to the print head. However, it is possible to exclude the print controller from the print head and simplify and efficiently print the system.

Disclosure of Invention

One embodiment includes a printhead having a standardized computer interface to allow the printhead to be directly connected to a standard computer, an ejector array to deposit ink on a substrate according to image data from the standard computer, a processing element to receive the image data through the standardized computer interface, a buffer to store the image data received through the standardized computer interface and to send the image data to the ejector array when triggered by a dot clock, the buffer under control of the processing element and having a flexible storage depth, and a driver to trigger individual ejectors in the ejector array according to the image data.

Drawings

FIG. 1 illustrates a prior art embodiment of a printing system.

Figure 2 illustrates an embodiment of an individual printhead.

FIG. 3 illustrates an embodiment of a processing circuit for an individual printhead.

Detailed Description

Currently available printing systems require external control electronics. Typically, the control electronics are located within the printer but outside the printhead. As shown in FIG. 1, computer system 10 is connected to printing system 12, either by wire or wirelessly. The computer system has an image processor 14 which may be a dedicated image processor or a general purpose processor including a central processing unit of the computer system.

The computer 10 communicates the image data to a printhead controller 16 in the printing system 12. A printhead controller 16 is connected to the computer 10 and the printhead 18. The printhead 18 then controls the ejector stack 20. The jet stack is typically made up of a set of plates stacked together to form a series of channels and chambers for directing ink to an array of ink jets or nozzles 22, which can then be dropped onto a printing substrate 24.

In the embodiments disclosed herein, there is no separate print controller. Instead, the printhead 18 has all of the electronics inside it, as shown in FIG. 2. These may include the processing element 26, the driver 28 that drives the injector stack 20, and its individual injectors 22.

The print head 18 receives image data through a standardized computer interface 30, such as a Universal Serial Bus (USB). As will be discussed in more detail, this may include USB type C, which would allow embodiments to be extended to full frequency applications. For high frequency applications on a normal USB2 connection, an external DC power supply may be applied to the printhead.

The print head may include an internally generated "dot clock" or firing signal. The dot clock triggers a set of waveforms that cause an ejector, such as 22, to actuate and eject ink from the ejector onto the print substrate 24. The dot clock may be generated internally or externally to the printhead. The internal source may be phase locked to the external encoder. FIG. 3 illustrates a printhead architecture of an embodiment of a printhead with internal processing electronics, also referred to herein as a "stand-alone" printhead. It should be noted that the term "independent" does not exclude the use of external components, but they are independent, as they are optional.

In fig. 3, the computer 40 has a standardized computer interface 30 to the print head 18. Interface 30 may be implemented as a USB to ULPI physical interface chip that supports USB 2.0 to computer 40 and ULPI to processing element 26. ULPI is a UTMI (universal transceiver macro cell interface) low pin interface. It should be noted that this is only one example of a standardized computer interface. Any computer interface that complies with the published standards.

The image data comes from the computer 40 in 32-bit words, one word each ejected in ejection number order on a standardized computer interface cable, which is the image column order. The print head consumes data when providing the dot clock externally or internally. The computer interface is connected to a processing element 26. The processing component is any device that can buffer and process image data to generate the waveforms necessary to fire the jets by the driver. In some embodiments, this may be a Field Programmable Gate Array (FPGA) or Application Specific Integrated Circuit (ASIC), or other device capable of buffering data and generating jetting waveforms in response to a dot clock, meaning an integrated circuit that is manufactured and programmed to provide control of the printhead.

Image data from computer 40 typically arrives in bursts (e.g., USB packets) that are not synchronized with the dot clock. The processing element 26 uses a mechanism such as a USB unacknowledged (NAK) token to store the image data in an internal buffer, signaling the computer to pause the image data transmission when the buffer is full.

After each clock point, the processing element 26 performs two simultaneous operations. One operation is to read image data from the internal buffer and send it to the driver 28 for use after the next dot clock.

The image data is typically 1 bit per ejection, but may be greater than 1 bit for a printhead capable of ejecting multiple drop sizes. The image data to the driver 28 is also typically not in jet number (image column) order, but rather in an order dictated by the physical layout of the driver 28 and the jet stack 20. Thus, processing element 26 reads data from its internal buffer in a different order in which it was written, and selects a particular subset of each 32-bit image word for each sprayer. After enough dot clock has occurred to use all 32 bits of the image word,

the word is removed from the buffer, freeing up space to receive more image data from the computer.

The second simultaneous operation of the processing element 26 is to generate the VPP and VSS waveforms used by the driver 28 to fire an injector such as 22. Analog circuitry external to the processing elements completes the implementation of the VPP and VSS waveform rails 34 and 36. This may include an analog pulse amplifier such as that found in us patent 5,677,647. It may also include a DC power converter 32 connected to an external DC power supply 44 or power from the USB interface of the computer. While VPP and VSS are being generated, the processing element 26 sends control signals to the driver 28 indicating when the enabled injector should be connected to VPP or to VSS or neither. The ejectors are enabled or disabled according to image data sent to the driver after the previous dot clock.

Similarly, the dot clock may be generated internally, or at a fixed frequency, or in response to position encoder 42 providing encoder signals such as ENC A and B to the processing elements. These signals can be used to start and stop the dot clock and phase lock the dot clock to track the encoder position. Alternatively, the encoder input may be used directly as a dot clock, referred to herein as an external dot clock. Whether the dot clock is internally or externally generated may depend on the printing application. For example, a fixed frequency internal velocity generator may work well with the movement of the print substrate constant and at a known speed. If the speed of the print substrate does change, the encoder can phase lock the dot clock to track the position of the print substrate. This may include using a Phase Locked Loop (PLL) within the processing element 26 to provide a print resolution that is a scale factor of the encoder resolution.

One example of a PLL dot clock generator can be found in us patent 6,076,922, which is incorporated herein in its entirety.

The position encoder generates an encoder pulse signal in accordance with relative movement of the print head and the print support member along the first axis. The digital phase-locked loop circuit includes a phase comparator for receiving the encoder pulse signal and the feedback signal and generating a phase difference signal having at least first and second states. The dot clock generator has an integrator that outputs a digital signal representing a time integral with respect to the phase difference signal; a pulse generator responsive to the digital signal for generating a pulsed output signal having a period dependent on the integration; and an output circuit for receiving the pulse output signal of the pulse generator and providing a first output signal and a second output signal. The first output signal is a feedback signal and the second output signal is a dot clock signal, and wherein the output circuit includes a divide-by-frequency counter for dividing the frequency of the pulsed output signal by a selected constant to produce the second output signal.

Also, as noted above, for higher frequency applications on a normal USB2 connection, the printhead will be connected to an external DC power source, such as DC power from DC power source 44. When printing at higher resolutions (in dots per inch), the dot clock causes the ejectors to eject faster at a given interval as the print substrate moves. Higher resolution therefore requires higher frequency operation.

One aspect of the on-board processing electronics is that the image data is buffered and consumed when the dot clock occurs without having to trigger the computer clock used to transmit the image data. The processing element includes a flexible depth buffer that allows the processing element to store varying amounts of data for the ejector when receiving the dot clock.

In one embodiment, the printhead has ejectors and all necessary ejection waveforms, including the VPP and VSS power rails, control and data signals internal to them. The internal processing may include a PLL and receive encoder signals from an encoder external to the printhead. This allows the system designer to choose whether to include input from the encoder. This also applies to providing DC power external to the printhead.