阅读说明：本技术 一种驱动电路 (Driving circuit ) 是由 贾宇锋 蔡嘉齐 于 2019-09-25 设计创作，主要内容包括：本发明涉及一种驱动电路,在现有源极驱动的基础上,增加MOS管Q3,电容C4和二极管D5。当MOS管Q2导通时,驱动电路导通MOS管Q3,并由MOS管Q3开通源极驱动MOS管Q1,同时控制第二电压源VCC通过二极管D5给电容C4充电提供驱动能量。当MOS管Q2关断时,MOS管Q3和MOS管Q1的栅极电容参与串联分压,当栅极电压降低后MOS管Q3和MOS管Q1先后关断。本发明可以有效降低MOS管Q1的栅极充电电流流过MOS管Q2,从而降低MOS管Q2的开关损耗,使源极驱动电路满足大功率应用场合使用的要求。(The invention relates to a driving circuit, which is additionally provided with a MOS transistor Q3, a capacitor C4 and a diode D5 on the basis of the conventional source electrode driving. When the MOS transistor Q2 is turned on, the driving circuit turns on the MOS transistor Q3, and the MOS transistor Q3 turns on the source to drive the MOS transistor Q1, and at the same time, controls the second voltage source VCC to charge the capacitor C4 through the diode D5 to provide driving energy. When the MOS transistor Q2 is turned off, the gate capacitors of the MOS transistor Q3 and the MOS transistor Q1 participate in series voltage division, and the MOS transistor Q3 and the MOS transistor Q1 are sequentially turned off after the gate voltage is reduced. The invention can effectively reduce the grid charging current of the MOS transistor Q1 to flow through the MOS transistor Q2, thereby reducing the switching loss of the MOS transistor Q2 and enabling the source electrode driving circuit to meet the use requirement of high-power application occasions.)

1. A drive circuit, characterized by: the voltage source circuit comprises a first voltage source Vs, a second voltage source VCC, a MOS tube Q1, a MOS tube Q2, a MOS tube Q3, a diode D5, a voltage division capacitor C2 and a capacitor C4, wherein the second voltage source VCC is electrically connected with the anode of a diode D5, the cathode of the diode D5 is connected with the drain of the MOS tube Q3, the source of the MOS tube Q3 is connected with the gate of the MOS tube Q1, the capacitor C4 is connected between the drain of the MOS tube Q3 and the source of the MOS tube Q1, the first voltage source Vs is connected with the gate of the MOS tube Q3 through the capacitor C2, the drain of the MOS tube Q2 is connected with the source of the first MOS tube Q1, and the source of the MOS tube Q2 is connected with.

2. The drive circuit according to claim 1, wherein: the voltage divider circuit is connected with the grid of the MOS transistor Q3.

3. The drive circuit according to claim 2, wherein: the voltage division circuit comprises a resistor R2, one end of a resistor R2 is connected with the gate of the MOS transistor Q3 as a voltage division point of the voltage division circuit, and the other end of the resistor R2 is connected with a first voltage source Vs.

4. The drive circuit according to claim 2, wherein: the voltage division circuit comprises a resistor R1 and a voltage regulator tube D4, one end of the resistor R1 is connected with the cathode of the voltage regulator tube D4, the connection point of the resistor R1 is used as the voltage division point of the voltage division circuit and is connected with the grid of the MOS tube Q3, and the anode of the voltage regulator tube D4 is connected with a first voltage source Vs.

5. The drive circuit according to claim 1, wherein: the circuit also comprises a current limiting resistor R5, wherein the current limiting resistor R5 is connected between the diode D5 and the first voltage source VCC in series.

6. The drive circuit according to claim 1, wherein: the MOS transistor Q3 further comprises a capacitor C5, and the capacitor C5 is connected between the gate and the source of the MOS transistor Q3 in parallel.

7. The drive circuit according to claim 1, wherein: the diode D6 is further included, the anode of the diode D6 is connected to the gate of the MOS transistor Q3, and the cathode of the diode D6 is connected to the drain of the MOS transistor Q3.

8. The drive circuit according to claim 1, wherein: the circuit also comprises a resistor R6, wherein the resistor R6 is connected with the capacitor C4 in parallel.

Technical Field

The present invention relates to a driving circuit, and more particularly, to a driving circuit for a high voltage switching power supply.

Background

The flyback switching power supply has the characteristics of simple circuit, high reliability and wide input voltage range, can easily realize the wide voltage range work of alternating current 100V-264V, and even so, can not meet the increasing various applications, such as instrument power supplies in industrial power distribution systems, a small-power switching power supply with nominal input voltage of 85 VAC-528 VAC is often needed, a power supply which can stably work in an ultra-wide range of 64 VAC-660 VAC can be actually required, meanwhile, the volume is small, even direct current input is required to be considered, the input of three-phase alternating current four wires is commonly considered, the flyback switching power supply is called a three-phase four-wire system, namely 3 phase wires and 1 zero wire.

In order to increase the input voltage of the power supply, a source driving scheme is generally adopted, and in the prior art scheme, see patent ZL200810028422.4 entitled "source-driven flyback converter circuit", fig. 1 is a schematic block diagram of a prior art source-driven flyback converter circuit, and fig. 2 is a schematic diagram of a prior art source-driven flyback converter circuit, as shown in the following drawings: when the circuit is started, one path of current passes through the resistor R1, and then the other path of current charges the capacitor C2 of the auxiliary power supply circuit, and the other path of current supplies power to the power supply management chip PWM IC.

When the voltage rises to the working voltage of the power management chip PWM IC, the power management chip PWM IC starts to drive the MOS transistor Q2. In the on duty cycle ton phase of the power management chip PWM IC, the MOS transistor Q2 is turned on, the potential at the V1 point is pulled low, the gate potential of the MOS transistor Q1 is not changed, the gate-source voltage Vgs of the MOS transistor Q1 is increased, so that the MOS transistor Q1 is driven to be turned on, and at this time, the current flows through the primary winding N1 of the transformer T1, the MOS transistor Q1, and the MOS transistor Q2, and gradually rises, and the transformer T1 stores energy.

When the output signal of the power management chip PWM IC is inverted, the output signal jumps from high level to low level, and the MOS transistor Q2 is switched off. When the power management chip PWM IC operates in the off duty ratio toff stage, since the MOS transistor Q2 is turned off, the potential at the point V1 gradually increases, while the gate potential of the MOS transistor Q1 does not change, the gate-source voltage Vgs of the MOS transistor Q1 gradually decreases, until the gate-source voltage Vgs of the MOS transistor Q1 is lower than the off threshold, the MOS transistor Q1 starts to turn off, and the transformer T1 transfers energy to the output circuit. When the output signal of the power management chip PWM IC is inverted again, the output signal jumps from low level to high level, so that the MOS transistor Q2 is turned on again. Thus, the circuit works in a self-oscillation state.

Because the withstand voltage of the source electrode driving circuit is born by the MOS transistor Q1 and the MOS transistor Q2 after the MOS transistor is switched off, the source electrode driving circuit is very suitable for the stable work in an ultra-wide range, and the withstand voltage born by the lower tube Q2 does not exceed: the Vgs turn-on voltage of upper Q1 is subtracted from the regulated value of D4.

If the working power of the power supply is increased, the rated current of the MOS transistor Q1 is also increased. When the rated current of the MOS transistor Q1 is increased, the gate capacitance of the MOS transistor Q1 is also increased simultaneously. In the prior art, the current of the gate capacitor of the MOS transistor Q1 needs to be discharged through the MOS transistor Q2, and the voltage of the MOS transistor Q2 decreases while the charge of the gate capacitor of the MOS transistor Q1 is discharged, which is a synchronous process, and the primary winding of the flyback switching power supply flows through the MOS transistor Q1 to the MOS transistor Q2 while the voltage of the MOS transistor Q2 decreases. Normally, the switching loss of the MOS transistor Q2 mainly depends on the current flowing through the primary winding when the voltage of Q2 decreases, but in the conventional source driving scheme, the current discharged by the gate capacitor of the MOS transistor Q1 is increased, so that as the Vin voltage increases, the rated current of the MOS transistor Q1 increases, and the switching loss of the MOS transistor Q2 is obviously increased.

In summary, when the input voltage is increased, the increase of the operating current in the conventional source driving scheme significantly increases the switching loss of the MOS transistor Q2, thereby limiting the increase of the operating current of the source driving circuit.

Disclosure of Invention

In view of the problem of large switching loss of the conventional source driving scheme under high voltage and large current, the invention provides a driving circuit which can reduce the switching loss of source driving, in particular the switching loss of a MOS transistor Q2 under source driving, so that the source driving circuit can be used under higher power.

The technical scheme of the invention is as follows:

a drive circuit, characterized by: the voltage source circuit comprises a first voltage source Vs, a second voltage source VCC, a MOS tube Q1, a MOS tube Q2, a MOS tube Q3, a diode D5, a voltage division capacitor C2 and a capacitor C4, wherein the second voltage source VCC is electrically connected with the anode of a diode D5, the cathode of the diode D5 is connected with the drain of the MOS tube Q3, the source of the MOS tube Q3 is connected with the gate of the MOS tube Q1, the capacitor C4 is connected between the drain of the MOS tube Q3 and the source of the MOS tube Q1, the first voltage source Vs is connected with the gate of the MOS tube Q3 through the capacitor C2, the drain of the MOS tube Q2 is connected with the source of the MOS tube Q1, and the source of the MOS tube Q2 is connected.

Preferably, the power supply further comprises a voltage dividing circuit, and the voltage dividing point of the voltage dividing circuit is connected with the gate of the MOS transistor Q3.

As a specific embodiment of the voltage divider circuit, the voltage divider circuit includes: the voltage division circuit comprises a resistor R2, one end of a resistor R2 is connected with the gate of the MOS transistor Q3 as a voltage division point of the voltage division circuit, and the other end of the resistor R2 is connected with a first voltage source Vs.

Another specific embodiment of the voltage divider circuit is characterized in that: the voltage dividing circuit comprises a resistor R1 and a voltage regulator tube D4, one end of the resistor R1 is connected with the cathode of the voltage regulator tube D4, the connection point of the resistor R1 is used as the voltage dividing point of the voltage dividing circuit to be connected with the grid of the MOS tube Q3, the anode of the voltage regulator tube D4 is connected with a first voltage source Vs, and the voltage value of the first voltage source Vs is zero.

Preferably, the circuit further comprises a current limiting resistor R5, and the current limiting resistor R5 is connected in series between the diode D5 and the first voltage source VCC.

Preferably, the capacitor C5 is further included, and the capacitor C5 is connected in parallel between the gate and the source of the MOS transistor Q3.

Preferably, the diode device further comprises a diode D6, wherein an anode of the diode D6 is connected to the gate of the MOS transistor Q3, and a cathode of the diode D6 is connected to the drain of the MOS transistor Q3.

Preferably, the device further comprises a resistor R6, and the resistor R6 is connected with the capacitor C4 in parallel.

Interpretation of terms:

electrically coupling: the meaning of representation includes indirect connection (that is, other components can be connected between two electric connection objects) besides direct connection, and includes a manner of inductive coupling and the like.

The invention has the beneficial effects that: after the MOS transistor Q3 is turned on, the gate charging current flowing through the MOS transistor Q1 does not pass through the MOS transistor Q2, and therefore the switching loss increased by the MOS transistor Q2 is not increased by the increase of the operating current. Meanwhile, the MOS tube Q3 adopts a low-voltage MOS tube, the conduction threshold voltage of the grid electrode is low, and the grid electrode charging time is short, so that the switching loss of the MOS tube Q2 added by the grid electrode charging current of the MOS tube Q3 can be controlled in a small range.

Drawings

Fig. 1 is a schematic block diagram of a prior art source-driven flyback converter circuit;

FIG. 2 is a schematic diagram of a prior art source driven flyback converter circuit;

FIG. 3 is a schematic diagram of the drive circuit of the present invention;

fig. 4 is a working schematic diagram of the driving circuit applied to the flyback switching power supply according to the first embodiment of the present invention;

fig. 5 is a working schematic diagram of the driving circuit of the second embodiment of the present invention applied to the flyback switching power supply;

fig. 6 is a schematic diagram of the operation of the driving circuit applied to the flyback switching power supply according to the third embodiment of the present invention.

Detailed Description