阅读说明：本技术 攻击防护方法、装置、设备及可读存储介质 (Attack protection method, device, equipment and readable storage medium ) 是由 苏昆 董逢华 何涛 周杰 肖灵 胡瑞璟 于 2021-07-29 设计创作，主要内容包括：本发明提供一种攻击防护方法、装置、设备及可读存储介质,攻击防护方法包括：检测芯片是否受到外部随机攻击；若检测到芯片受到外部随机攻击,则读取存储器中芯片已被随机攻击次数的数值；若所述数值小于阈值,则更新已被随机攻击次数的值为原值加1后的值；若所述数值大于或等于阈值,则设置芯片的安全策略标记为恶意攻击标记值,当检测到芯片的安全策略标记为恶意攻击标记时,清除芯片重要数据,将芯片锁定；当芯片运行的程序结束,若芯片的安全策略标记为初始值,则设置结束标记为备份标记值。本发明通过程序正常结束与程序被异常攻击都有写标记操作,外部无法区分写操作是否识别到了外部攻击从而不对芯片下电,无法重复攻击芯片。(The invention provides an attack protection method, an attack protection device, equipment and a readable storage medium, wherein the attack protection method comprises the following steps: detecting whether the chip is attacked by external random attack; if the chip is detected to be attacked by external random attacks, reading the numerical value of the random attack times of the chip in the memory; if the numerical value is smaller than the threshold value, updating the value of the random attack times to be the value obtained by adding 1 to the original value; if the value is larger than or equal to the threshold value, setting the security policy mark of the chip as a malicious attack mark value, and when the security policy mark of the chip is detected as the malicious attack mark, clearing important data of the chip and locking the chip; when the program operated by the chip is finished, if the security policy mark of the chip is an initial value, the end mark is set as a backup mark value. According to the invention, the writing marking operation is carried out through the normal ending of the program and the abnormal attack of the program, and the external part can not distinguish whether the external attack is identified by the writing operation, so that the power-off of the chip is avoided, and the chip can not be attacked repeatedly.)

1. An attack protection method, characterized in that the attack protection method comprises:

detecting whether the chip is attacked by external random attack;

if the chip is detected to be attacked by external random attacks, reading the numerical value of the random attack times of the chip in the memory;

if the numerical value is smaller than the threshold value, updating the value of the random attack times to be a value obtained by adding 1 to the original value, and keeping the security strategy mark of the chip unchanged as the initial value;

if the value is larger than or equal to the threshold value, setting the security policy of the chip as a malicious attack marking value, and when the security policy of the chip is detected to be marked as the malicious attack marking value, clearing important data of the chip and locking the chip;

when the program operated by the chip is finished, if the security policy mark of the chip is an initial value, the end mark is set as a backup mark value.

2. The attack protection method according to claim 1, wherein the step of checking whether the chip is attacked by the external random attack is followed by further comprising:

and if the chip is detected to be attacked by external random attacks but the program runs into an unexpected unimportant flow, the program running is terminated.

3. The attack protection method according to claim 1, wherein the step of checking whether the chip is attacked by the external random attack is followed by further comprising:

if the chip is detected not to be attacked by external random but the resources are insufficient during the program operation, setting the global variable to be in a dead loop state;

and when the global variable is detected to be in a dead loop state, the control chip enters the dead loop and circularly executes a section of preset code.

4. The attack protection method according to claim 1, further comprising, before the step of detecting whether the chip is attacked by the external random attack:

initializing a chip, setting a security policy mark of the chip as an initial value, setting a threshold value, wherein the threshold value is the maximum attack frequency minus one, and setting the random attack frequency as 0.

5. The attack protection method according to any one of claims 1 to 4, characterized in that the attack protection method further comprises:

and executing a random delay strategy before all the writing mark operations.

6. An attack protection device, characterized in that the attack protection device comprises:

the detection module is used for detecting whether the chip is attacked by external random attack;

the reading module is used for reading the numerical value of the random attack times of the chip in the memory if the chip is detected to be attacked by the external random attack;

the control module is used for updating the value of the random attack times to be a value obtained by adding 1 to the original value if the numerical value is smaller than the threshold value, and keeping the security strategy mark of the chip unchanged as the initial value;

if the value is larger than or equal to the threshold value, setting the security policy of the chip as a malicious attack marking value, and when the security policy of the chip is detected to be marked as the malicious attack marking value, clearing important data of the chip and locking the chip;

when the program operated by the chip is finished, if the security policy mark of the chip is an initial value, the end mark is set as a backup mark value.

7. The attack protection device according to claim 6, wherein the check module checks whether the chip is under an external random attack, and the control module is further configured to:

and if the chip is detected to be attacked by external random attacks but the program runs into an unexpected unimportant flow, the program running is terminated.

8. The attack protection device according to claim 6, wherein the check module checks whether the chip is under an external random attack, and the control module is further configured to:

if the chip is detected not to be attacked by external random but the resources are insufficient during the program operation, setting the global variable to be in a dead loop state;

and when the global variable is detected to be in a dead loop state, the control chip enters the dead loop and circularly executes a section of preset code.

9. An attack protection device comprising a processor, a memory, and an attack protection program stored on the memory and executable by the processor, wherein the attack protection program, when executed by the processor, implements the steps of the attack protection method according to any one of claims 1 to 5.

10. A readable storage medium, having an attack protection program stored thereon, wherein the attack protection program, when executed by a processor, implements the steps of the attack protection method according to any one of claims 1 to 5.

Technical Field

The invention relates to the field of smart card operating systems, in particular to an attack protection method, device, equipment and readable storage medium.

Background

External attacks may cause the card to enter an unexpected flow, returning some important data; such operations typically determine the attack location and point in time through a large number of iterations. In the prior art, in order to prevent external attacks, whether a program is executed according to an expected flow is generally checked in an application, if the program is not executed according to the expected flow, an exception flag is set in a storage area, then the flow is interrupted, and exception data is prevented from being returned. But the energy consumption for setting the mark is clear in waveform, and an attacker can easily and continuously power down the chip when setting the mark, thereby repeatedly attacking the chip.

Disclosure of Invention

The invention mainly aims to provide an attack protection method, an attack protection device and a readable storage medium, and aims to solve the problem that when an operating system and an application detect that a chip is attacked from the outside, an external attacker easily powers off the chip continuously when an atomic mark is written, so that the chip is repeatedly attacked, and data leakage is caused.

In a first aspect, the present invention provides an attack protection method, including the following steps:

detecting whether the chip is attacked by external random attack;

if the chip is detected to be attacked by external random attacks, reading the numerical value of the random attack times of the chip in the memory;

if the numerical value is smaller than the threshold value, updating the value of the random attack times to be a value obtained by adding 1 to the original value, and keeping the security strategy mark of the chip unchanged as the initial value;

if the value is larger than or equal to the threshold value, setting the security policy of the chip as a malicious attack marking value, and when the security policy of the chip is detected to be marked as the malicious attack marking value, clearing important data of the chip and locking the chip;

when the program operated by the chip is finished, if the security policy mark of the chip is an initial value, the end mark is set as a backup mark value.

Optionally, after the step of checking whether the chip is attacked by external random attacks, the method further includes:

and if the chip is detected to be attacked by external random attacks but the program runs into an unexpected unimportant flow, the program running is terminated.

Optionally, after the step of checking whether the chip is attacked by external random attacks, the method further includes:

if the chip is detected not to be attacked by external random but the resources are insufficient during the program operation, setting the global variable to be in a dead loop state;

and when the global variable is detected to be in a dead loop state, the control chip enters the dead loop and circularly executes a section of preset code.

Optionally, before the step of detecting whether the chip is attacked by external random attacks, the method further includes:

initializing a chip, setting a security policy mark of the chip as an initial value, setting a threshold value, wherein the threshold value is the maximum attack frequency minus one, and setting the random attack frequency as 0.

Optionally, the attack protection method further includes:

and executing a random delay strategy before all the writing mark operations.

In a second aspect, the present invention further provides an attack protection device, including:

the detection module is used for detecting whether the chip is attacked by external random attack;

the reading module is used for reading the numerical value of the random attack times of the chip in the memory if the chip is detected to be attacked by the external random attack;

the control module is used for updating the value of the random attack times to be a value obtained by adding 1 to the original value if the numerical value is smaller than the threshold value, and keeping the security strategy mark of the chip unchanged as the initial value;

if the value is larger than or equal to the threshold value, setting a security strategy mark of the chip as a malicious attack mark value through atomic writing, and when the security strategy mark of the chip is detected as the malicious attack mark value, clearing important data of the chip and locking the chip;

when the program operated by the chip is finished, if the security policy mark of the chip is an initial value, the end mark is set to be a backup mark value through atomic writing.

Optionally, after the step of checking whether the chip is attacked by the external random attack, the control module is further configured to:

and if the chip is detected to be attacked by external random attacks but the program runs into an unexpected unimportant flow, the program running is terminated.

Optionally, after the step of checking whether the chip is attacked by the external random attack, the control module is further configured to:

if the chip is detected not to be attacked by external random but the resources are insufficient during the program operation, setting the global variable to be in a dead loop state;

and when the global variable is detected to be in a dead loop state, the control chip enters the dead loop and circularly executes a section of preset code.

Optionally, before the step of detecting whether the chip is attacked by external random attacks, the attack protection apparatus further includes an initialization module, configured to:

initializing a chip, setting a security policy mark of the chip as an initial value, setting a threshold value, wherein the threshold value is the maximum attack frequency minus one, and setting the random attack frequency as 0.

Optionally, the attack protection method and the attack protection apparatus are further configured to:

and executing a random delay strategy before all the writing mark operations.

In a third aspect, the present invention further provides an attack protection device, where the attack protection device includes a processor, a memory, and an attack protection program that is stored in the memory and can be executed by the processor, where the attack protection program implements the steps of the attack protection method when executed by the processor.

In a fourth aspect, the present invention further provides a readable storage medium, where an attack protection program is stored on the readable storage medium, and when the attack protection program is executed by a processor, the steps of the attack protection method are implemented.

In the invention, whether the chip is attacked by external random attack is detected; if the chip is detected to be attacked by external random attacks, reading the numerical value of the random attack times of the chip in the memory; if the numerical value is smaller than the threshold value, updating the value of the random attack times to be a value obtained by adding 1 to the original value, and keeping the security strategy mark of the chip unchanged as the initial value; if the value is larger than or equal to the threshold value, setting the security policy of the chip as a malicious attack marking value, and when the security policy of the chip is detected to be marked as the malicious attack marking value, clearing important data of the chip and locking the chip; when the program operated by the chip is finished, if the security policy mark of the chip is an initial value, the end mark is set as a backup mark value. The invention achieves the effect of resisting the attack by limiting the times of repeated operation. Before the chip returns the related data, the same mark writing operation is executed in the processes of program operation ending and abnormal attack in the program operation, and the mark content cannot be distinguished from the outside, so that the mark content cannot be distinguished from the outside, and the number of times of repeated operation of external attack is limited to prevent the leakage of the chip data.

Drawings

Fig. 1 is a schematic diagram of a hardware structure of an attack protection device according to an embodiment of the present invention;

FIG. 2 is a flowchart illustrating an attack protection method according to an embodiment of the present invention;

fig. 3 is a functional module diagram of an attack protection apparatus according to an embodiment of the present invention.

The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.

Detailed Description

It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

In a first aspect, an embodiment of the present invention provides an attack protection device.

Referring to fig. 1, fig. 1 is a schematic diagram of a hardware structure of an attack protection device according to an embodiment of the present invention. In this embodiment of the present invention, the attack protection device may include a processor 1001 (e.g., a Central Processing Unit, CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used for realizing connection communication among the components; the user interface 1003 may include a Display screen (Display), an input unit such as a Keyboard (Keyboard); the network interface 1004 may optionally include a standard wired interface, a WIreless interface (e.g., a WI-FI interface, WI-FI interface); the memory 1005 may be a Random Access Memory (RAM) or a non-volatile memory (non-volatile memory), such as a magnetic disk memory, and the memory 1005 may optionally be a storage device independent of the processor 1001. Those skilled in the art will appreciate that the hardware configuration depicted in FIG. 1 is not intended to be limiting of the present invention, and may include more or less components than those shown, or some components in combination, or a different arrangement of components.

With continued reference to fig. 1, a memory 1005, which is one type of computer storage medium in fig. 1, may include an operating system, a network communication module, a user interface module, and an attack protection program. The processor 1001 may call an attack protection program stored in the memory 1005, and execute the attack protection method provided by the embodiment of the present invention.

In a second aspect, an embodiment of the present invention provides an attack protection method.

Referring to fig. 2, fig. 2 is a flowchart illustrating an embodiment of an attack protection method according to the present invention.

In an embodiment of the attack protection method of the present invention, the attack protection method includes:

step S10, detecting whether the chip is attacked by external random attack;

in this embodiment, after the chip is powered on, the operating system and the application start to detect whether the chip is subjected to an external random attack, and if the external random attack is detected at this time, the operating system and the application call different security policies according to different external attacks.

Further, in an embodiment, before the step S10 of detecting whether the chip is attacked by external random attacks, the method further includes:

initializing a chip, setting a security policy mark of the chip as an initial value, setting a threshold value, wherein the threshold value is the maximum attack frequency minus one, and setting the random attack frequency as 0.

In this embodiment, the external attack generally needs a large number of repeated attacks on the chip to enter an unexpected process and return some important data, so as to obtain data expected by the external attacker, therefore, before the chip is issued, the relevant parameters of the chip are initialized, a threshold value of the random attack protection times is preset, and the value of the times that one chip has been randomly attacked is set to 0, so that an operating system and an application limit the times of repeated operations according to the two values of the chip in the EEPROM memory, and the security policy flag of the initial chip is set to a flag value of the normal end of the process, where the security policy flag of the chip is updated according to the number of random attacks and the importance of the program that is randomly attacked.

Step S20, if the chip is detected to be attacked by external random attacks, reading the numerical value of the random attack times of the chip in the memory;

in this embodiment, when it is detected that the chip is attacked by external random attacks, the data of the sub-value of the chip that has been attacked by random attacks, which is stored in the programmable and readable memory EEPROM, is queried and read, and different security policies are invoked according to the read sub-value of the chip that has been attacked by random attacks.

Step S30, if the value is less than the threshold, the value of the random attack times is updated to the value of the original value plus 1, and the security strategy mark of the chip is kept unchanged as the initial value;

in this embodiment, if it is found that the number of times that the chip has been randomly attacked in the memory is smaller than the threshold of the preset number of times that the chip has been randomly attacked, because the number of times that the chip has been randomly attacked does not reach the threshold of the preset number of times that the chip has been randomly attacked, the value of the number of times that the random attack has been made, which is stored in the memory, is updated only by atomic writing, while the security policy flag of the chip remains unchanged as an initial value, the value may represent the number of times the random attack has been made and may be updated in real time according to the number of times the random attack has been made, directly quitting program operation after updating the numerical value, when the chip is powered on again and if the chip is detected to be attacked randomly again, updating the value of the random attack times of the chip stored in the memory in real time again, and by analogy, continuously detecting and updating until the number value of the random attacks on the chip during the program operation reaches a threshold value, and starting to call the corresponding security policy.

Step S40, if the value is larger than or equal to the threshold value, setting the security strategy mark of the chip as a malicious attack mark value, and when the security strategy mark of the chip is detected as the malicious attack mark, clearing important data of the chip and locking the chip;

in this embodiment, if it is found that the number of times that the chip has been randomly attacked in the memory is greater than the threshold of the preset random attack number value, at this time, because the number of times that the chip has been randomly attacked reaches the preset threshold, the operating system and the application can determine that an external attacker repeatedly attacks the chip to obtain desired data, the security policy flag of the chip stored in the memory is updated by atomic write and set as a malicious attack flag value, once the operating system and the application detect that the security policy flag of the chip is a malicious attack flag value, the operating system and the application will clear important data in the memory in the chip and lock the chip, at this time, all external operations on the chip do not have any response, and at this time, the chip is discarded and cannot be reused.

Step S50, when the program run by the chip is finished, if the security policy flag of the chip is an initial value, the end flag is set as a backup flag value.

In this embodiment, when the program run by the chip is ended, and the security policy flag of the chip is still the initial flag value at this time, it indicates that the chip has normally ended the run program without being subjected to random attack or has been subjected to random attack but the number of times of the random attack does not reach the threshold of the preset number of times of the random attack, and at this time, the flag that the chip has ended the program run may be set to be the backup flag value by atomic write, where the backup flag value is different from the address of the initial flag value stored in the EEPROM memory.

In the embodiment, whether the chip is attacked by external random attack is detected; if the chip is detected to be attacked by external random attacks, reading the numerical value of the random attack times of the chip in the memory; if the numerical value is smaller than the threshold value, updating the value of the random attack times to be a value obtained by adding 1 to the original value, and keeping the security strategy mark of the chip unchanged as the initial value; if the value is larger than or equal to the threshold value, setting the security policy of the chip as a malicious attack marking value, and when the security policy of the chip is detected to be marked as the malicious attack marking value, clearing important data of the chip and locking the chip; when the program operated by the chip is finished, if the security policy mark of the chip is an initial value, the end mark is set as a backup mark value.

In the embodiment, when the chip is in the running program, if the chip is attacked from the outside, atomic write operation is performed, including updating data in the EEPROM memory when the numerical value of the random attack times of the chip is subjected to atomic write when the threshold of the random attack times is not reached, and setting the security policy flag of the chip as a malicious attack flag value by atomic write when the threshold of the random attack times is reached; when the chip finishes operating the program, the chip detects that the security policy mark is still the initial security policy mark value, and still sets the ending mark at the time to be a backup mark value through atomic writing, wherein the backup mark value is different from the storage address of the initial mark value in the EEPROM. Because atomic write operation exists when the running program is attacked from the outside and when the running program is still the initial normal mark value after the running program is ended, an external attacker cannot judge whether the energy consumption waveform marks the attack operation of the attacker, and therefore the mark cannot be bypassed, so that the maximum random attack frequency of the chip is limited, and the attacker cannot repeatedly attack the chip to acquire expected data. The problem that in the existing scheme, because the chip only has the operation of atomic write marking on the EEPROM stored in the memory when the chip is detected to be abnormally attacked, an external attacker easily detects the energy consumption waveform of the atomic write marking operation, and therefore the chip is continuously powered off when the chip sets the abnormal mark, so that the atomic write marking operation cannot successfully set the mark, and the times of the random attack cannot be updated, and therefore the attacker can bypass the limitation of the maximum random attack times, continuously and repeatedly attack the chip, enable the chip to enter an unexpected flow, return some important data and obtain the data expected by the external attacker is solved. For example, the payment application obtains the authority through PIN verification and then modifies the payment file, generally, the number of continuous errors of the PIN is 3, that is, the user continuously loses the PIN for 3 times at most, the subsequent card is locked, and the subsequent card cannot be unlocked even if the correct PIN is input. The error times of the PIN are stored in the EEPROM, an attacker generally powers down the card when writing data in the EEPROM, so that the error times of the PIN cannot be updated, and the attacker has numerous chances of trying to input the PIN, thereby bypassing the limit of 3 continuous error times. By the scheme, an attacker cannot judge whether the card needs to be powered off when the chip atom writes data in the EEPROM, the error times of the PIN can be continuously updated, and the attacker cannot bypass the limit of 3 continuous error times.

Further, in an embodiment, the step of checking whether the chip is attacked by the external random attack further includes:

and if the chip is detected to be attacked by external random attacks but the program runs into an unexpected unimportant flow, the program running is terminated.

In this embodiment, if it is detected that the chip is attacked by random external attacks during the running of the program, but the program runs into an unexpected unimportant flow, the program in the chip is always running, so that the externally input data and operations are processed and responded. If the program is terminated, no response is given to external operation at this time, so that when the program is detected to run to an unexpected unimportant flow and the chip is not attacked by external random attacks, the program in the chip can be judged to have an error in running at this time, and the program running can be directly terminated.

Further, in an embodiment, the step of checking whether the chip is attacked by the external random attack further includes:

if the chip is detected not to be attacked by external random but the resources are insufficient during the program operation, setting the global variable to be in a dead loop state;

and when the global variable is detected to be in a dead loop state, the control chip enters the dead loop and circularly executes a section of preset code.

In this embodiment, if it is detected that the chip is not attacked by external random attacks during the running of the program, but resources are insufficient during the running of the program, the global variable is set to be in a dead loop state, then the chip is controlled to enter the dead loop, and a section of preset code is executed in a loop, where the preset code is a section of useless code. When the operating system checks that the global variable is set to be in a dead loop state before running main flow or before writing operation or before algorithm operation and other important operations, the chip is attacked by external random attacks, and then the step S20 is entered, and if the chip is detected to be attacked by external random attacks, the numerical value of the random attack frequency of the chip in the memory is read.

Further, in an embodiment, the attack protection method further includes:

and executing a random delay strategy before all atomic write operations.

In this embodiment, the random delay policy is executed before different security policies are adopted, so that an external attacker is prevented from analyzing a subsequently executed security policy according to a specific service flow. For example, when it is detected that the chip is attacked by external random, the data of the times of attack of the chip stored in the programmable and readable memory EEPROM is queried and read, and if the read times of attack of the chip is smaller than the preset threshold value of the times of attack of the random, the number of times of attack of the chip stored in the memory is updated only by atomic writing because the number of times of attack of the chip does not reach the preset threshold value of the times of attack of the random. Before executing the operation of updating the security policy of the number of times of random attacks stored in the memory by atomic write, executing random delay, namely delaying an unfixed random time to execute the atomic write operation when the random attack is monitored, so as to prevent the security policy which is subsequently executed and is identified by an external attacker when the atomic write operation is performed after the delay time is fixed after the random attack is monitored by an operating system and an application, thereby powering off a chip continuously, and ensuring that the number of times of random attacks stored in the memory cannot be successfully updated by the atomic write operation.

In a third aspect, an embodiment of the present invention further provides an attack protection device.

Referring to fig. 3, a functional module diagram of an embodiment of an attack protection device is shown. As shown in fig. 3, in this embodiment, the attack protection apparatus includes:

the detection module 10 is used for detecting whether the chip is attacked by external random attacks;

a reading module 20, configured to read a value of a random attack frequency of a chip in the memory if it is detected that the chip is attacked by an external random attack;

the control module 30 is configured to update the value of the random attack times to a value obtained by adding 1 to the original value if the value is smaller than the threshold, and keep the security policy flag of the chip unchanged as the initial value;

if the value is larger than or equal to the threshold value, setting the security policy of the chip as a malicious attack marking value, and when the security policy of the chip is detected to be marked as the malicious attack marking value, clearing important data of the chip and locking the chip;

when the program operated by the chip is finished, if the security policy mark of the chip is an initial value, the end mark is set as a backup mark value.

Further, in an embodiment, after the step of checking whether the chip is subjected to the external random attack, the control module 30 is further configured to:

and if the chip is detected to be attacked by external random attacks but the program runs into an unexpected unimportant flow, the program running is terminated.

Further, in an embodiment, after the step of checking whether the chip is attacked by the external random attack, the control module 30 is further configured to:

if the chip is detected not to be attacked by external random but the resources are insufficient during the program operation, setting the global variable to be in a dead loop state;

and when the global variable is detected to be in a dead loop state, the control chip enters the dead loop and circularly executes a section of preset code.

Further, in an embodiment, before the step of detecting whether the chip is attacked by the external random attack, the attack protection apparatus further includes an initialization module, configured to:

initializing a chip, setting a security policy mark of the chip as an initial value, setting a threshold value, wherein the threshold value is the maximum attack frequency minus one, and setting the random attack frequency as 0.

Further, in an embodiment, the attack protection method and the attack protection device are further configured to:

and executing a random delay strategy before all the writing mark operations.

The function implementation of each module in the attack protection device corresponds to each step in the attack protection method embodiment, and the function and implementation process are not described in detail here.

In a fourth aspect, the embodiment of the present invention further provides a readable storage medium.

The readable storage medium of the present invention stores an attack protection program, wherein the attack protection program, when executed by a processor, implements the steps of the attack protection method as described above.

The method for implementing the attack protection program when executed may refer to each embodiment of the attack protection method of the present invention, and details thereof are not described herein.

It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.

The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.

Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for causing a terminal device to execute the method according to the embodiments of the present invention.

The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.