阅读说明：本技术 两电平svpwm调制中窄脉冲消除的方法、装置、系统及逆变器 (method, device and system for eliminating narrow pulse in two-level SVPWM (space vector pulse width modulation) and inverter ) 是由 李�浩 楚育博 彭浩 于 2019-09-06 设计创作，主要内容包括：本发明提供一种两电平SVPWM调制中窄脉冲消除的方法、装置、系统及逆变器,预设窄脉冲判断量Dmin,以此判断SVPWM调制算法获得的三相电压占空比Ta、Tb、Tc是否存在窄脉冲；若存在窄脉冲,则对三相电压占空比Ta、Tb、Tc求取平均值Tav,根据Tav的大小确定补偿量T0；分别对三相电压占空比Ta、Tb、Tc进行补偿,并判断补偿后的三相电压占空比Ta、Tb、Tc是否仍然存在窄脉冲,若存在,则说明进入了SVPWM的过调制区,直接消除窄脉冲,利用DPWM调制输出六方波。本发明通过在识别和判断出现的窄脉冲使得SVPWM调制已经不能满足控制要求时,对窄脉冲进行消除,无需增加专门的硬件电路,从而降低功率器件的故障率,提升了母线电压利用率,且降低了输出谐波。(The invention provides a method, a device and a system for eliminating narrow pulses in two-level SVPWM (space vector pulse width modulation) and an inverter, wherein a narrow pulse judgment quantity Dmin is preset so as to judge whether the three-phase voltage duty ratios Ta, Tb and Tc obtained by an SVPWM algorithm have narrow pulses; if the narrow pulse exists, an average value Tav is obtained for the three-phase voltage duty ratios Ta, Tb and Tc, and the compensation quantity T0 is determined according to the size of Tav; and respectively compensating the three-phase voltage duty ratios Ta, Tb and Tc, judging whether the compensated three-phase voltage duty ratios Ta, Tb and Tc still have narrow pulses, if so, entering an overmodulation region of SVPWM (space vector pulse width modulation), directly eliminating the narrow pulses, and modulating and outputting six square waves by using DPWM (digital pulse width modulation). According to the invention, when the narrow pulse is identified and judged to cause SVPWM modulation to be incapable of meeting the control requirement, the narrow pulse is eliminated without adding a special hardware circuit, so that the fault rate of a power device is reduced, the utilization rate of bus voltage is improved, and output harmonic is reduced.)

1. A method for eliminating narrow pulses in two-level SVPWM modulation is characterized in that: the method comprises the following steps:

S1, presetting a narrow pulse judgment quantity Dmin, and judging whether the three-phase voltage duty ratios Ta, Tb and Tc obtained by the SVPWM algorithm have narrow pulses or not according to the narrow pulse judgment quantity Dmin;

S2, if the narrow pulse exists, calculating an average value Tav of the three-phase voltage duty ratios Ta, Tb and Tc, and determining a compensation quantity T0 according to the size of Tav;

And S3, respectively compensating the three-phase voltage duty ratios Ta, Tb and Tc, judging whether the compensated three-phase voltage duty ratios Ta, Tb and Tc still have narrow pulses, if so, indicating that the three-phase voltage duty ratios Ta, Tb and Tc enter an over-modulation region of SVPWM, directly eliminating the narrow pulses, and modulating and outputting six square waves by using DPWM.

2. The method of claim 1, wherein: the narrow pulse judgment quantity Dmin is calculated by the following formula:

Dmin=D1+D2

Where D1 is the inverter dead time and D2 is the narrowest output pulse width that is acceptable.

3. The method of claim 1, wherein: in S2, if Tav is less than 0.5, T0= 0.5-i Tav-0.5 i, otherwise T0 =itav-0.5 i.

4. the method of claim 1, wherein: in S3, compensation is realized by decreasing the compensation amount T0 for the three-phase voltage duty ratios Ta, Tb, and Tc, respectively.

5. A device for eliminating narrow pulses in two-level SVPWM modulation is characterized in that: the device comprises:

The narrow pulse judgment module is used for presetting a narrow pulse judgment quantity Dmin so as to judge whether the three-phase voltage duty ratios Ta, Tb and Tc obtained by the SVPWM algorithm have narrow pulses;

The compensation quantity calculation module is used for solving an average value Tav of the three-phase voltage duty ratios Ta, Tb and Tc when the narrow pulse exists, and determining the compensation quantity T0 according to the size of Tav;

And the narrow pulse eliminating module is used for respectively compensating the three-phase voltage duty ratios Ta, Tb and Tc, judging whether the compensated three-phase voltage duty ratios Ta, Tb and Tc still have narrow pulses, if so, indicating that the three-phase voltage duty ratios Ta, Tb and Tc still have the narrow pulses, entering an over-modulation region of SVPWM, directly eliminating the narrow pulses, and modulating and outputting six square waves by using DPWM.

6. The apparatus of claim 5, wherein: the narrow pulse judgment quantity Dmin is calculated by the following formula:

Dmin=D1+D2

where D1 is the inverter dead time and D2 is the narrowest output pulse width that is acceptable.

7. The apparatus of claim 5, wherein: in the compensation amount calculation module, if Tav is less than 0.5, T0= 0.5-Tav-0.5, otherwise T0= | Tav-0.5.

8. The apparatus of claim 5, wherein: in the narrow pulse eliminating module, compensation is realized by respectively reducing compensation amount T0 for three-phase voltage duty ratios Ta, Tb and Tc.

9. a system for eliminating narrow pulses in two-level SVPWM modulation is characterized in that: the system comprises a controller and a memory, wherein a computer program is stored in the memory and is called by the controller to complete the method for eliminating the narrow pulse in the two-level SVPWM modulation according to any one of claims 1 to 4.

10. An inverter, characterized by: the present inverter is provided with a system for narrow pulse cancellation in two-level SVPWM modulation as claimed in claim 9.

Technical Field

The invention belongs to the field of space vector modulation (SVPWM) technology, and particularly relates to a method, a device and a system for eliminating narrow pulses in two-level SVPWM and an inverter.

Background

At present, the space vector modulation technology is generally used in a voltage source type inverter, the switching frequency of the space vector modulation technology is low, and the space vector modulation technology is easy to realize in a digital mode. However, the narrow pulse output by the SVPWM modulation strategy may cause a higher turn-off peak voltage in the process that the power devices (IGBT, MOSFET, etc.) of the inverter are turned off after being turned on, thereby causing damage to the power devices, and meanwhile, there are problems of output waveform distortion, increased power device loss, reduced bus voltage utilization rate, and the like.

disclosure of Invention

The technical problem to be solved by the invention is as follows: a method, a device, a system and an inverter for eliminating narrow pulses in two-level SVPWM are provided, so that a series of problems caused by the existence of the narrow pulses are avoided.

The technical scheme adopted by the invention for solving the technical problems is as follows: a method for eliminating narrow pulses in two-level SVPWM modulation is characterized in that: the method comprises the following steps:

S1, presetting a narrow pulse judgment quantity Dmin, and judging whether the three-phase voltage duty ratios Ta, Tb and Tc obtained by the SVPWM algorithm have narrow pulses or not according to the narrow pulse judgment quantity Dmin;

S2, if the narrow pulse exists, calculating an average value Tav of the three-phase voltage duty ratios Ta, Tb and Tc, and determining a compensation quantity T0 according to the size of Tav;

And S3, respectively compensating the three-phase voltage duty ratios Ta, Tb and Tc, judging whether the compensated three-phase voltage duty ratios Ta, Tb and Tc still have narrow pulses, if so, indicating that the three-phase voltage duty ratios Ta, Tb and Tc enter an over-modulation region of SVPWM, directly eliminating the narrow pulses, and modulating and outputting six square waves by using DPWM.

According to the method, the narrow pulse judgment quantity Dmin is calculated by the following formula:

Dmin=D1+D2

Where D1 is the inverter dead time and D2 is the narrowest output pulse width that is acceptable.

According to the method, in S2, if Tav is less than 0.5, T0=0.5- | Tav-0.5|, otherwise T0= | Tav-0.5 |.

according to the method, in S3, the compensation is realized by respectively reducing the compensation amount T0 for the three-phase voltage duty ratios Ta, Tb and Tc.

A device for eliminating narrow pulses in two-level SVPWM modulation is characterized in that: the device comprises:

The narrow pulse judgment module is used for presetting a narrow pulse judgment quantity Dmin so as to judge whether the three-phase voltage duty ratios Ta, Tb and Tc obtained by the SVPWM algorithm have narrow pulses;

the compensation quantity calculation module is used for solving an average value Tav of the three-phase voltage duty ratios Ta, Tb and Tc when the narrow pulse exists, and determining the compensation quantity T0 according to the size of Tav;

and the narrow pulse eliminating module is used for respectively compensating the three-phase voltage duty ratios Ta, Tb and Tc, judging whether the compensated three-phase voltage duty ratios Ta, Tb and Tc still have narrow pulses, if so, indicating that the three-phase voltage duty ratios Ta, Tb and Tc still have the narrow pulses, entering an over-modulation region of SVPWM, directly eliminating the narrow pulses, and modulating and outputting six square waves by using DPWM.

according to the device, the narrow pulse judgment quantity Dmin is calculated by the following formula:

Dmin=D1+D2

Where D1 is the inverter dead time and D2 is the narrowest output pulse width that is acceptable.

According to the device, in the compensation amount calculation module, if Tav is less than 0.5, T0= 0.5-Tav-0.5, otherwise T0= | Tav-0.5| -0.5.

According to the device, compensation is realized in the narrow pulse eliminating module by respectively reducing the compensation quantity T0 of the three-phase voltage duty ratios Ta, Tb and Tc.

a system for eliminating narrow pulses in two-level SVPWM modulation is characterized in that: the system comprises a controller and a memory, wherein a computer program is stored in the memory and is used for being called by the controller to finish the method for eliminating the narrow pulse in the two-level SVPWM modulation.

an inverter, characterized by: the inverter is provided with the system for eliminating the narrow pulse in the two-level SVPWM modulation.

The invention has the beneficial effects that: when the narrow pulse which appears is identified and judged to enable SVPWM to not meet the control requirement, the narrow pulse is eliminated without adding a special hardware circuit, so that the fault rate of a power device is reduced, the utilization rate of bus voltage is improved, and output harmonic waves are reduced.

Drawings

fig. 1 is a schematic diagram of a narrow pulse cancellation according to an embodiment of the present invention.

FIG. 2 is a flow chart of the method of the present invention.

Detailed Description

The invention is further illustrated by the following specific examples and figures.

As shown in fig. 1 and fig. 2, the present invention provides a method for eliminating narrow pulses in two-level SVPWM modulation, comprising the following steps:

S1, presetting a narrow pulse judgment quantity Dmin, and judging whether the three-phase voltage duty ratios Ta, Tb and Tc obtained by the SVPWM algorithm have narrow pulses or not. The narrow pulse judgment amount Dmin is calculated by the following formula:

Dmin=D1+D2

Where D1 is the inverter dead time and D2 is the narrowest output pulse width that is acceptable.

And S2, if the narrow pulse exists, calculating an average value Tav of the three-phase voltage duty ratios Ta, Tb and Tc, and determining a compensation quantity T0 according to the size of the Tav. In this embodiment, if Tav is less than 0.5, T0= 0.5-Tav-0.5 |, otherwise T0= | Tav-0.5 |.

And S3, respectively compensating the three-phase voltage duty ratios Ta, Tb and Tc, for example, respectively reducing the compensation amount T0 on the three-phase voltage duty ratios Ta, Tb and Tc, and judging whether the compensated three-phase voltage duty ratios Ta, Tb and Tc still have narrow pulses or not, if so, indicating that the three-phase voltage duty ratios Ta, Tb and Tc still have narrow pulses, entering an overmodulation region of SVPWM, directly eliminating the narrow pulses, and modulating and outputting six square waves by using DPWM.

The invention also provides a system for eliminating the narrow pulse in the two-level SVPWM, which comprises a controller and a memory, wherein a computer program is stored in the memory and is called by the controller, so that the method for eliminating the narrow pulse in the two-level SVPWM is completed.

in addition, the invention also protects the inverter adopting the method. The narrow pulse elimination method is directly adopted in software, so that the narrow pulse width elimination of two-level SVPWM can be realized without adding a special hardware circuit, the fault rate of a power device is effectively reduced, the utilization rate of bus voltage is improved, and output harmonic waves are reduced.

the above embodiments are only used for illustrating the design idea and features of the present invention, and the purpose of the present invention is to enable those skilled in the art to understand the content of the present invention and implement the present invention accordingly, and the protection scope of the present invention is not limited to the above embodiments. Therefore, all equivalent changes and modifications made in accordance with the principles and concepts disclosed herein are intended to be included within the scope of the present invention.