A kind of SVPWM modulation algorithm inhibiting common-mode voltage for inverter

文档序号:1744332 发布日期:2019-11-26 浏览:16次 中文

阅读说明:本技术 一种用于逆变器抑制共模电压的svpwm调制算法 (A kind of SVPWM modulation algorithm inhibiting common-mode voltage for inverter ) 是由 申波 史荣海 喻敏 于 2019-08-05 设计创作,主要内容包括:本发明公开一种用于逆变器的抑制共模电压的SVPWM调制算法,其包括:步骤1:建立三电平逆变器SVPWM的SIMULINK仿真模型;根据三相输出电压的瞬时值由坐标变换得到参考电压矢量;步骤2:判断参考电压矢量所在位置,从而找出用来合成参考矢量的三个基本矢量;步骤3:根据伏秒平衡计算基本矢量作用时间;步骤4:确定基本矢量的作用顺序。本申请在传统七段式SVPWM调制上进行改进来抑制共模电压,提出一种新的共模电压冲量周期平衡的SVPWM调制方法,在每个开关周期T内,使符号相反的共模电压冲量相平衡,从而实现共模电压的抑制。(The present invention discloses a kind of SVPWM modulation algorithm of inhibition common-mode voltage for inverter comprising: step 1: establishing the SIMULINK simulation model of three-level inverter SVPWM;Reference voltage vector is obtained by coordinate transform according to the instantaneous value of three-phase output voltage;Step 2: reference voltage vector position is judged, to find out three basic vectors for synthesized reference vector;Step 3: basic vector action time is calculated according to voltage-second balance;Step 4: determining the sequence of operation of basic vector.The application improves to inhibit common-mode voltage in seven segmentation SVPWM of tradition modulation, it is proposed a kind of SVPWM method of new common-mode voltage momentum period balance, in each switch periods T, the common-mode voltage momentum for keeping symbol opposite balances each other, to realize the inhibition of common-mode voltage.)

1. a kind of SVPWM modulation algorithm of the inhibition common-mode voltage for inverter, it is characterised in that: include:

Step 1: establishing the SIMULINK simulation model of three-level inverter SVPWM;

Reference voltage vector is obtained by coordinate transform according to the instantaneous value of three-phase output voltage;

Step 2: reference voltage vector position is judged, to find out three basic vectors for synthesized reference vector;

Step 3: basic vector action time is calculated according to voltage-second balance;

Step 4: determining the sequence of operation of basic vector.

2. SVPWM modulation algorithm according to claim 1, it is characterised in that: in step 2, reference voltage vector institute is in place The judgement set includes following content:

Using 6 big sectors are divided, each big sector divides the division mode of 6 small sectors, and it is big that 6 big sector is denoted as first Sector, the second largest sector, the third-largest sector, the fourth-largest sector, the fifth-largest sector and the sixth-largest sector, in the fourth-largest sector The time of 6 small sectors, which calculates, is used as fiducial time computing unit, when reference vector is located at other 5 big sectors, by its etc. The same relative position in the fourth-largest sector is imitated to carry out time calculating, according to vector order of action in different big sectors with The corresponding relationship of logical relation the adjustment basic vector and action time of fiducial time.

3. SVPWM modulation algorithm according to claim 1, it is characterised in that: in step 3, according to voltage-second balance principle, one A vector effect regular hour is equivalent to the sum of several vectors effect same time;The reference voltage arrow that step 2 is obtained Amount is projected in different reference axis respectively, then according to the spatial position where reference voltage vector, chooses spatial position institute Corresponding three nearest space voltage vectors participate in synthesis;According to voltage-second balance principle, reference voltage vector is within a time Effect be equivalent to three space voltage vectors and the sum of acted within the time.

4. SVPWM modulation algorithm according to claim 1, it is characterised in that: in step 4, determine the effect of basic vector Sequence was allocated the corresponding switch state of space voltage vector and to the action time of each switch state, to reach The optimization of switch motion.

5. SVPWM modulation algorithm according to claim 4, it is characterised in that: the sequence of operation for determining basic vector includes Following process:

Start vector in using short vector as a sampling period, the application select just short vector as start vector, following table List the space vector of voltage order of action in different community domain in the fourth-largest sector:

After the action time for calculating basic vector, realizes that 12 final road PWM are exported by following process: calculating 7 sections of vectors Each of the time in distribution;

The order of action of vector is determined according to regional location and M value;

It is the switching signal of each switching tube of inverter by the three-phase output level Combination conversion for representing basic vector;

Wherein, the above process meets: in each switch periods T, the common-mode voltage momentum for keeping symbol opposite balances each other.

6. SVPWM modulation algorithm according to claim 5, it is characterised in that: the calculating of common-mode voltage is public in pwm converter Formula are as follows:

7. SVPWM modulation algorithm according to claim 1, it is characterised in that: each output state of three-level inverter generates Common-mode voltage it is as shown in the table:

Technical field

The present invention relates to the SVPWM modulation algorithm of inverter, especially a kind of inhibition common mode for three-level inverter The SVPWM modulation algorithm of voltage.

Background technique

Novel multi-level converter solves the problems, such as that mesohigh occasion power component is resistance to and forces down, and improves converter Output waveform, thus it is more good to provide as preferred option in the various power supply systems in the fields such as industry and social life Electric energy.

Wherein, SHEPWM (SelectiveHarmonicEliminationPulseWidth Modulation) is by opening " notch " is arranged in output voltage waveforms specific location in the optimum choice for closing the moment, and it is certain selected low to eliminate to generate PWM Subharmonic, it is significant to have the advantages that DC voltage utilization rate is high, wave filter on DC side size is small etc., increasingly by the blueness of people It looks at.The basic principle of SHEPWM is that inverter output voltage waveform is launched into the form of Fourier space, enables low-order harmonic Fourier coefficient is zero, obtains one group of Nonlinear System of Equations, obtains one group of switching angle by solve system of equation.It is corresponding in switching angle At the time of selection be switched on or off specific power device, so that inverter is exported corresponding level, thus reach eliminate it is specific humorous The purpose of wave.Compared with other PWM methods, SHEPWM method has output line voltage waveform quality height, power device switch damage It consumes that small, DC voltage utilization rate is high, DC side current ripples are small, conducive to filter design, effectively eliminates the advantages that low-order harmonic, It is received significant attention in terms of multi-electrical level inverter control.But cannot effectively it inhibit in existing three level SHEPWM method altogether Mode voltage, the application exactly propose for this problem.

Summary of the invention

The brief overview about the embodiment of the present invention is given below, in order to provide about certain aspects of the invention Basic comprehension.It should be appreciated that outlined below is not about exhaustive general introduction of the invention.It is not intended to determine this hair Bright key or pith, nor is it intended to limit the scope of the present invention.Its purpose only provides certain in simplified form A little concepts, taking this as a prelude to a more detailed description discussed later.

According to the one aspect of the application, a kind of SVPWM modulation algorithm of inhibition common-mode voltage for inverter is provided, Include:

Step 1: establishing the SIMULINK simulation model of three-level inverter SVPWM;According to the instantaneous of three-phase output voltage Value obtains reference voltage vector by coordinate transform;

Step 2: reference voltage vector position is judged, to find out three basic arrows for synthesized reference vector Amount;

Step 3: basic vector action time is calculated according to voltage-second balance;

Step 4: determining the sequence of operation of basic vector.

Wherein, in step 2, the judgement of reference voltage vector position includes following content: being fanned greatly using dividing 6 Area, each big sector divide the division mode of 6 small sectors, have 36 kinds of calculating, three basic vectors in this way and correspond to action time Formula group, directly calculating can be comparatively laborious.6 big sector is denoted as first using another time calculation by the application Big sector, the second largest sector, the third-largest sector, the fourth-largest sector, the fifth-largest sector and the sixth-largest sector, due to basic vector point The symmetry of Butut also has certain logical relation between the vector action time of the small sector in different big sectors, therefore The time of 6 small sectors in the fourth-largest sector is used to calculate as fiducial time computing unit, when reference vector is located at other 5 When big sector, its equivalent same relative position into the fourth-largest sector is subjected to time calculating, according to different big sectors The corresponding relationship of middle vector order of action and the logical relation of fiducial time adjustment basic vector and action time.

In step 3, according to voltage-second balance principle, a vector effect regular hour is equivalent to several vectors effect phase With the sum of time;The reference voltage vector that step 2 obtains is projected in different reference axis respectively, then according to reference voltage Spatial position where vector chooses three space voltage vectors nearest corresponding to spatial position and participates in synthesis;According to weber Equilibrium principle, effect of the reference voltage vector within a time are equivalent to three space voltage vectors and act on it within the time With, thus be decomposed within analog reference voltage Vector Rotation one week many space voltage vectors it is coefficient as a result, divide more Finely, the effect simulated is better.

In step 4, determine that the sequence of operation of basic vector is by the corresponding switch state of space voltage vector and to every The action time of a switch state is allocated, to reach the optimization of switch motion.Specifically, determining the effect of basic vector Sequence comprises the following processes:

Start vector in using short vector as a sampling period, the application select just short vector as start vector, Following table lists the space vector of voltage order of action in different community domain in the fourth-largest sector:

The vector order of action switch state table of the fourth-largest sector

After the action time for calculating basic vector, realizes that 12 final road PWM are exported by following process: calculating 7 sections Each of the time in vector distribution;The order of action of vector is determined according to regional location and M value;The three-phase of basic vector will be represented Output level Combination conversion is the switching signal of each switching tube of inverter;Wherein, the above process meets: in each switch periods T, The common-mode voltage momentum for keeping symbol opposite balances each other.

In three-phase grid-connected inverter, common-mode voltage is the shared component of inverter three-phase output voltage over the ground.The application By the way that in each switch periods T, the common-mode voltage momentum for keeping symbol opposite balances each other, the inhibition effect of common-mode voltage is achieved Fruit.

Further, in pwm converter common-mode voltage calculation formula are as follows:

The common-mode voltage that each output state of three-level inverter generates is as shown in the table:

The common-mode voltage that each output state generates

Traditional three level SVPWM central symmetries, seven segmentation vector assignment methods, emphasis is the differential mode voltage synthesized, is not had Have and considers to inhibit the common-mode voltage of output.The application is improved in seven segmentation SVPWM of tradition modulation to inhibit common mode Voltage, proposes a kind of SVPWM method of new common-mode voltage momentum period balance, target be in each switch periods T, The common-mode voltage momentum for keeping symbol opposite balances each other, to realize the inhibition of common-mode voltage.

Detailed description of the invention

The present invention can be by reference to being better understood, wherein in institute below in association with description given by attached drawing Have and has used the same or similar appended drawing reference in attached drawing to indicate same or similar component.The attached drawing is together with following It is described in detail together comprising in the present specification and forming a part of this specification, and is used to that this is further illustrated The preferred embodiment and explanation the principle of the present invention and advantage of invention.In the accompanying drawings:

Fig. 1 is three-level inverter switch models;

Fig. 2 is the basic vector distribution map of three-level inverter;

Fig. 3 is that big sector position judges simulation model;

Fig. 4 is that small sector position judges boundary condition;

Fig. 5 is that small sector position judges simulation model;

Fig. 6 is time phantom;

Fig. 7 is the time to distribute simulation model;

Fig. 8 is seven segmentation times to distribute simulation model;

Fig. 9 is three level SVPWM simulation models;

Figure 10 is the schematic diagram of three-phase photovoltaic grid-connected inverting device.

Specific embodiment

Illustrate the embodiment of the present invention below with reference to accompanying drawings.

In the description of the present invention, it is to be understood that, term " first ", " second ", " third " are used for description purposes only, It is not understood to indicate or imply relative importance.

The SVPWM modulation algorithm of three-level inverter mainly includes point of the fundamental voltage space vector of three-level inverter Cloth, Vector modulation principle, action time calculates, the basic vector order of action of synthesized reference vector and action time distribute, this Application establishes the simulink simulation model of three-level inverter SVPWM modulation algorithm according to the above research, and analysis inverter is each Influence of the common-mode voltage and different vector composite analysis that output state combination generates to common-mode voltage, emulation and experimental result Prove that the SVPWM algorithm for the common-mode voltage momentum period balance that the application proposes has preferable common-mode voltage inhibitory effect.

Referring to Fig. 1 and Fig. 2, it can be seen by three-level inverter switch models and three level voltage space vector distribution maps Out, same vector can correspond to different switch states, and 27 groups of switch states only correspond to 19 space vectors, according to vector Amplitude classification can be classified as 4 classes, be respectively long vector L1V~L6V, middle vector M1V~M6V, short vector S 1V~S6V and Zero vector 0V.

The algorithmic procedure of three level SVPWMs modulation is as follows:

(1) reference voltage vector is obtained by coordinate transform according to the instantaneous value of three-phase output voltage;

(2) reference voltage vector position is judged, to find out three basic vectors for synthesized reference vector;

(3) basic vector action time is calculated according to voltage-second balance;

(4) sequence of operation of basic vector is determined;

Vector state is converted into switch state and exports each switching tube of three-level inverters by calculated action time PWM drive signal.

In step 2, during judging reference voltage vector position, big sector position judges simulation model such as Fig. 3 institute Show, small sector position judges that boundary condition enters shown in Fig. 4, thus judges the small sector in big sector and place where reference vector Position Number.Input parameter of the modulation ratio K as next step time computing module is found out simultaneously.Small sector position judgement emulation Module is as shown in Figure 5.

Wherein, 6 big sectors are shared in vector distribution map, each big sector is divided into 6 small sectors again, has 36 kinds in this way The formula group that three basic vectors correspond to action time is calculated, directly calculating can be comparatively laborious.The application is using another time Calculation, due to the symmetry of basic vector distribution map, between the vector action time of the small sector in different big sectors With certain logical relation, the time of 6 small sectors in the fourth-largest sector can be used to calculate as fiducial time and calculate list Member, when reference vector is located at other 5 big sectors, by its equivalent same relative position into the fourth-largest sector come when carrying out Between calculate, when according to the logical relation of vector order of action and fiducial time adjustment basic vector in different big sectors and effect Between corresponding relationship.Simulation model is as shown in Figure 6 and Figure 7.

In step 3, the order of action of space vector: the start vector in using short vector as a sampling period, this Shen Just short vector please be select as start vector, table 1 lists the space vector of voltage effect in different community domain in the fourth-largest sector Order.

The vector order of action switch state table of the fourth-largest sector of table 1

After the action time for calculating basic vector, divide three steps to realize final 12 road PWM output.

(1) each in 7 sections of vector distribution of time is calculated;It is shown in Figure 8 that seven segmentation times distributed simulation model;

(2) order of action of vector is determined according to regional location and M value;

It (3) is the switching signal of each switching tube of inverter by the three-phase output level Combination conversion for representing basic vector;

The whole simulation model of three-level inverter SVPWM is by DC source, three-phase tri-level inverter bridge, resistance sense load and The SVPWM that submodule is built is emulated according to above-mentioned SVPWM, module composition occurs, as shown in Figure 9.DC bus-bar voltage is 600V, The resistance value of load resistance is 10 Ω × 3, and filter inductance is 1mH × 3, and the reference signal that module occurs for SVPWM is phase voltage amplitude For 311V, frequency is the three-phase ac signal source of 50Hz, switching frequency 10kHz.

In three-phase grid-connected inverter, common-mode voltage is the shared component of inverter three-phase output voltage over the ground.Three-phase light The model of gird-connected inverter is lied prostrate, as shown in Figure 10.

The calculation formula of common-mode voltage in pwm converter are as follows:

In this way, the common-mode voltage that each output state of three-level inverter generates is as shown in table 2.

The common-mode voltage that each output state of table 2 generates

Traditional three level SVPWM central symmetries, seven segmentation vector assignment methods, emphasis is the differential mode voltage synthesized, is not had Have and considers to inhibit the common-mode voltage of output.

This project improves to inhibit common-mode voltage in seven segmentation SVPWM of tradition modulation, proposes a kind of new common mode The SVPWM method of voltage momentum period balance, target is to make the common-mode voltage that symbol is opposite in each switch periods T Momentum balances each other.

In three kinds of SVPWM methods, the output current wave of traditional seven segmentation SVPWM methods is best, distortion Rate is minimum, and the SVPWM current waveform quality of five-part form SVPWM and common-mode voltage momentum period balance is declined, but the latter Obviously it is better than the former.In terms of the common-mode voltage of generation, the high fdrequency component of traditional seven segmentation SVPWM mode output common mode voltages All very high with low frequency component, the common-mode voltage Amplitude Ration tradition SVPWM of five-part form SVPWM output reduces half, common-mode voltage The common-mode voltage of the SVPWM output of momentum period balance is mainly the common-mode voltage that amplitude is Vdc/6, and only a small amount of amplitude is The common-mode voltage of Vdc/3.It can be seen that five-part form SVPWM and common-mode voltage momentum period balanced from fft analysis result SVPWM has preferable common-mode voltage inhibitory effect.

The application is according to the perfect switch model analysis of the three-phase tri-level inverter voltage space of three-level inverter The redundancy of vector formed with distribution and corresponding Switch State Combination in Power Systems, has studied the synthesis principle of space vector of voltage, due to Increasing for vector may be selected, along with short vector is there are two types of Switch State Combination in Power Systems, the space vector of voltage of three-level inverter is closed It can be by many choices at method.

The application is first according to traditional three level SVPWM algorithms (region decision, time calculating, seven segmentation PWM of central symmetry Trigger signal generates) the SIMULINK simulation models of three level SVPWMs has been built, then respectively exported in analysis three-level inverter On the basis of the common-mode voltage that state generates, synthetic method (the basic vector state effect of different voltages space vector is analyzed Order and the distribution of corresponding time) influence to output common mode voltage, propose the SVPWM modulation of common-mode voltage momentum period balance Algorithm, and the modulation algorithm is realized on simulation model, give three level based on the modulation algorithm He other modulation algorithms Inverter output common mode voltage waveform and its spectrum analysis and inverter output current waveform and its spectrum analysis, simulation result Show that there is the SVPWM modulation algorithm for the common-mode voltage momentum period balance that the application proposes preferable common-mode voltage to inhibit effect Fruit.

Method of the invention be not limited to specifications described in time sequencing execute, when can also according to others Between sequentially, in parallel or independently execute.Therefore, the execution sequence of method described in this specification is not to skill of the invention Art range is construed as limiting.

Although being had been disclosed above by the description to specific embodiments of the present invention to the present invention, it answers The understanding, above-mentioned all embodiments and example are exemplary, and not restrictive.Those skilled in the art can be in institute Design is to various modifications of the invention, improvement or equivalent in attached spirit and scope of the claims.These modification, improve or Person's equivalent should also be as being to be considered as included in protection scope of the present invention.

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