阅读说明：本技术 一种数据加密标准协处理器自检的方法 (A kind of method of data encryption standards coprocessor self-test ) 是由 李立 焦英华 范振伟 于 2019-08-16 设计创作，主要内容包括：本发明实施例涉及一种数据加密标准协处理器自检的方法,其特征在于,所述方法包括：在系统区设置启动自检状态字、原始密钥、原始明文、原始密文、协处理器错误状态计数器；在当单片机进行上电复位时,根据启动自检状态字、原始密钥、原始明文、原始密文,对协处理器进行协处理器启动自检处理；在当在完成上电复位之后,根据上位机或上位应用的需求要对协处理器进行状态检查时,根据原始密钥、原始明文、原始密文,对协处理器进行协处理器主动自检处理。通过使用本发明方法,不但可以有常规复位自检与随时主动自检两种模式以供使用,还对自检失败做了鉴别处理,既保障了协处理器的稳定工作状态,也为使用者提供了及时便捷的预警处理手段。(The present embodiments relate to a kind of methods of data encryption standards coprocessor self-test, which is characterized in that the described method includes: starting self-test status word, primary key, original plaintext, original cipher text, coprocessor error status counter is arranged in system area；When single-chip microcontroller carries out electrification reset, according to starting self-test status word, primary key, original plaintext, original cipher text, coprocessor starting self-test processing is carried out to coprocessor；After completing electrification reset, when carrying out status checkout to coprocessor according to host computer or the demand of upper application, according to primary key, original plaintext, original cipher text, coprocessor active self-test processing is carried out to coprocessor.By using the method for the present invention, can not only there be conventional RESET self-test with the both of which of active self-test at any time for using, identification processing also has been done to fail self-test, has both ensured the steady-working state of coprocessor, timely and convenient early warning processing means are also provided for user.)

1. a kind of method of data encryption standards coprocessor self-test, which is characterized in that the described method includes:

Starting self-test status word, primary key, original plaintext, original cipher text, coprocessor mistake is arranged in system area in single-chip microcontroller State counter；

When the single-chip microcontroller carries out electrification reset, the single-chip microcontroller is according to the starting self-test status word, primary key, original Begin plaintext, original cipher text, carries out coprocessor starting self-test processing to coprocessor, the coprocessor starting self-test is specifically wrapped It includes:

The single-chip microcontroller obtains the starting self-test status word from the system area and generates the first self-test status word, obtains the original Beginning key generates first key, obtains the original plaintext and generates first in plain text, obtains the original cipher text and generate the first ciphertext； When the value of the first self-test status word is 1, the single-chip microcontroller is right according to the first key, the first plaintext, the first ciphertext The coprocessor carries out the first self-test processing；After first self-test success, the single-chip microcontroller will be in the system area The coprocessor error status counter is set as 0, and executes starting up's process；

When the single-chip microcontroller is after completing electrification reset, the single-chip microcontroller is right according to the demand of host computer or upper application When the coprocessor carries out status checkout, the single-chip microcontroller is according to the primary key, original plaintext, original cipher text, to institute It states coprocessor and carries out coprocessor active self-test processing, the coprocessor active self-test specifically includes:

The single-chip microcontroller obtains the primary key from the system area and generates the second key, obtains the original plaintext and generates the Two in plain text, obtains the original cipher text and generates the second ciphertext；The single-chip microcontroller is according to second key, second plaintext, second Ciphertext carries out the second self-test processing to the coprocessor；After second self-test success, the single-chip microcontroller is by the system Coprocessor error status counter described in system area is set as 0, and sends at the association to the host computer or upper application Manage device active self-test success.

2. method according to claim 1, which is characterized in that the method also includes:

When the value of the first self-test status word is 0, the single-chip microcontroller exits the coprocessor starting self-test process, and holds Row starting up's process.

3. method according to claim 1, which is characterized in that the method also includes:

After first fail self-test, the single-chip microcontroller is by coprocessor error status counter described in the system area Value add 1, the single-chip microcontroller, which executes, forces electrification reset to restart process.

4. method according to claim 1, which is characterized in that the method also includes:

After second fail self-test, the single-chip microcontroller is by coprocessor error status counter described in the system area Value add 1, and send the coprocessor active fail self-test to the host computer or upper application.

5. method according to claim 1, which is characterized in that the method also includes:

When the value of the coprocessor error status counter is greater than safety threshold value, the single-chip microcontroller is by the coprocessor Use state be set as disabling, and send the coprocessor to the host computer or upper application and disabled.

6. method according to claim 1, which is characterized in that the single-chip microcontroller according to the first key, first in plain text, the One ciphertext carries out the first self-test processing to the coprocessor, specifically includes:

The interim plaintext of the single-chip microcontroller initialization first, the first interim ciphertext；

The single-chip microcontroller is encrypted first plaintext according to the first key, using the coprocessor, raw At the described first interim ciphertext；

When the described first interim ciphertext is equal with first ciphertext, the single-chip microcontroller uses institute according to the first key It states coprocessor first ciphertext is decrypted, generates the described first interim plaintext；

When described first is interim equal in plain text with described first in plain text, the first self-test success.

7. method according to claim 6, which is characterized in that the method also includes:

When the described first interim ciphertext and first ciphertext are unequal, the single-chip microcontroller exits the first self-test process flow, First fail self-test；

When described first is interim unequal in plain text with described first in plain text, the single-chip microcontroller exits the first self-test process flow, First fail self-test.

8. method according to claim 1, which is characterized in that the single-chip microcontroller is according to second key, second plaintext, Two ciphertexts carry out the second self-test processing to the coprocessor, specifically include:

The interim plaintext of the single-chip microcontroller initialization second, the second interim ciphertext；

The single-chip microcontroller is encrypted the second plaintext according to second key, using the coprocessor, raw At the described second interim ciphertext；

When the described second interim ciphertext is equal with second ciphertext, the single-chip microcontroller uses institute according to second key It states coprocessor second ciphertext is decrypted, generates the described second interim plaintext；

When described second is interim equal with the second plaintext in plain text, the second self-test success.

9. method according to claim 8, which is characterized in that the method also includes:

When the described second interim ciphertext and second ciphertext are unequal, the single-chip microcontroller exits the second self-test process flow, Second fail self-test；

When described second is interim unequal with the second plaintext in plain text, the single-chip microcontroller exits the second self-test process flow, Second fail self-test.

Technical field

The present invention relates to singlechip technology field, in particular to a kind of method of data encryption standards coprocessor self-test.

Background technique

Data encryption standards (Data Encryption Standard, abbreviation: DES) coprocessor calculates monolithic in safety It is widely used on machine, is mainly used for improving the ability of single-chip data encryption.If there is function mistake in DES coprocessor Accidentally, then it will lead to the encryption and decryption data error calculated based on DES, further result in the affiliated upper layer application of single-chip microcontroller and execute mistake.

Summary of the invention

The purpose of the present invention provides a kind of data encryption standards coprocessor self-test aiming at the defect of the prior art Method, starting self-test operations are carried out to DES coprocessor in single-chip microcontroller electrification reset, after single-chip microcontroller electrification reset at any time It can initiate to DES coprocessor active self-test operations, early warning can be issued to host computer when coprocessor state exception, at association The numerical value of reason device error status counter can stop the work of DES coprocessor immediately when being more than limit value.

Realize above-mentioned purpose, the present invention provides a kind of methods of data encryption standards coprocessor self-test, comprising:

Starting self-test status word, primary key, original plaintext, original cipher text, coprocessor is arranged in system area in single-chip microcontroller Error status counter；

When the single-chip microcontroller carries out electrification reset, the single-chip microcontroller is according to the starting self-test status word, original close Key, original plaintext, original cipher text carry out coprocessor starting self-test processing to coprocessor, and the coprocessor starts self-test It specifically includes:

The single-chip microcontroller obtains the starting self-test status word from the system area and generates the first self-test status word, obtains institute It states primary key and generates first key, obtain the original plaintext and generate first in plain text, obtain the original cipher text and generate first Ciphertext；When the value of the first self-test status word is 1, the single-chip microcontroller according to the first key, first in plain text, it is first close Text carries out the first self-test processing to the coprocessor；After first self-test success, the single-chip microcontroller is by the system Coprocessor error status counter described in area is set as 0, and executes starting up's process；

When the single-chip microcontroller is after completing electrification reset, the single-chip microcontroller is according to host computer or the demand of upper application When carrying out status checkout to the coprocessor, the single-chip microcontroller according to the primary key, original plaintext, original cipher text, Coprocessor active self-test processing is carried out to the coprocessor, the coprocessor active self-test specifically includes:

The single-chip microcontroller obtains the primary key from the system area and generates the second key, and it is raw to obtain the original plaintext At second plaintext, obtains the original cipher text and generate the second ciphertext；The single-chip microcontroller according to second key, second plaintext, Second ciphertext carries out the second self-test processing to the coprocessor；After second self-test success, the single-chip microcontroller is by institute It states coprocessor error status counter described in system area and is set as 0, and to described in the host computer or upper application transmission Coprocessor active self-test success.

Further, the method also includes:

When the value of the first self-test status word is 0, the single-chip microcontroller exits the coprocessor starting self-test process, And execute starting up's process.

Further, the method also includes:

After first fail self-test, the single-chip microcontroller is by coprocessor error condition meter described in the system area The value of number device adds 1, and the single-chip microcontroller, which executes, forces electrification reset to restart process.

Further, the method also includes:

After second fail self-test, the single-chip microcontroller is by coprocessor error condition meter described in the system area The value of number device adds 1, and sends the coprocessor active fail self-test to the host computer or upper application.

Further, the method also includes:

When the value of the coprocessor error status counter is greater than safety threshold value, the single-chip microcontroller will be at the association The use state of reason device is set as disabling, and sends the coprocessor to the host computer or upper application and disabled.

Further, the single-chip microcontroller is according to the first key, the first plaintext, the first ciphertext, to the coprocessor The first self-test processing is carried out, is specifically included:

The interim plaintext of the single-chip microcontroller initialization first, the first interim ciphertext；

The single-chip microcontroller carries out at encryption first plaintext according to the first key, using the coprocessor Reason generates the first interim ciphertext；

When the described first interim ciphertext is equal with first ciphertext, the single-chip microcontroller makes according to the first key First ciphertext is decrypted with the coprocessor, generates the described first interim plaintext；

When described first is interim equal in plain text with described first in plain text, the first self-test success.

Preferably, the method also includes:

When the described first interim ciphertext and first ciphertext are unequal, the single-chip microcontroller exits the first self-test processing stream Journey, first fail self-test；

When described first is interim unequal in plain text with described first in plain text, the single-chip microcontroller exits the first self-test processing stream Journey, first fail self-test.

Further, the single-chip microcontroller is according to second key, second plaintext, the second ciphertext, to the coprocessor The second self-test processing is carried out, is specifically included:

The interim plaintext of the single-chip microcontroller initialization second, the second interim ciphertext；

The single-chip microcontroller carries out at encryption the second plaintext according to second key, using the coprocessor Reason generates the second interim ciphertext；

When the described second interim ciphertext is equal with second ciphertext, the single-chip microcontroller makes according to second key Second ciphertext is decrypted with the coprocessor, generates the described second interim plaintext；

When described second is interim equal with the second plaintext in plain text, the second self-test success.

Preferably, the method also includes:

When the described second interim ciphertext and second ciphertext are unequal, the single-chip microcontroller exits the second self-test processing stream Journey, second fail self-test；

When described second is interim unequal with the second plaintext in plain text, the single-chip microcontroller exits the second self-test processing stream Journey, second fail self-test.

A kind of method of data encryption standards coprocessor self-test provided by the invention, in single-chip microcontroller electrification reset, such as Fruit starting self-test status word is that 1 pair of DES coprocessor carries out starting self-test, is skipped pair if starting self-test status word is not 1 First starting self-test of DES coprocessor.After single-chip microcontroller electrification reset, the demand according to host computer or upper application is right When DES coprocessor carries out status checkout, single-chip microcontroller starts the first active self-test to DES coprocessor.Wherein, first starts certainly Inspection, the first active self-test are all that preset primary key, original cipher text, original plaintext are obtained from system area, then by using original Beginning key pair original plaintext carries out encryption and generates interim ciphertext, original cipher text is decrypted the interim plaintext of generation, finally to original Begin in plain text be compared with interim plaintext, original cipher text is compared respectively with interim ciphertext, compare successfully later then self-test at Function.If self-test is unsuccessful, the method for the present invention is provided with coprocessor error status counter, the successful counter of each self-test Value return to zero, the value of each fail self-test counter adds 1, when counter value be more than limit value after, single-chip microcontroller can stop The use of DES coprocessor.

Detailed description of the invention

Fig. 1 is a kind of method schematic diagram for data encryption standards coprocessor self-test that the embodiment of the present invention one provides.

Fig. 2 is a kind of method schematic diagram of data encryption standards coprocessor self-test provided by Embodiment 2 of the present invention.

Specific embodiment

To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing to the present invention make into It is described in detail to one step, it is clear that the described embodiments are only some of the embodiments of the present invention, rather than whole implementation Example.Based on the embodiments of the present invention, obtained by those of ordinary skill in the art without making creative efforts All other embodiment, shall fall within the protection scope of the present invention.

The embodiment of the present invention one, if Fig. 1 is provided shown in a kind of method schematic diagram of data encryption standards coprocessor self-test, Method the following steps are included:

Step 11, starting self-test status word, primary key, original plaintext, original cipher text, association is arranged in system area in single-chip microcontroller Processor error state counter.

Step 12, single-chip microcontroller is judged according to the current current state for executing self-test, and current state is electrification reset shape When state, step 131 is gone to；Current state is to initiate active self-test demand by host computer or upper application after completing electrification reset When state, step 141 is gone to.

Step 131, when single-chip microcontroller carries out electrification reset, single-chip microcontroller is according to starting self-test status word, primary key, original Begin plaintext, original cipher text, carries out coprocessor starting self-test processing to coprocessor, and coprocessor starts self-test,

Specifically include: step 1311, single-chip microcontroller obtains starting self-test status word from system area and generates the first self-test status word, It obtains primary key and generates first key, obtain original plaintext and generate first in plain text, obtain original cipher text and generate the first ciphertext；

Step 1312, when the value of the first self-test status word is 1, single-chip microcontroller according to first key, first in plain text, it is first close Text carries out the first self-test processing to coprocessor,

It specifically includes: step 13121, the interim plaintext of single-chip microcontroller initialization first, the first interim ciphertext；

Step 13122, single-chip microcontroller is encrypted the first plaintext using coprocessor according to first key, generates First interim ciphertext；

Step 13123, when the first interim ciphertext is equal with the first ciphertext, single-chip microcontroller is according to first key, at association The first ciphertext is decrypted in reason device, generates the first interim plaintext；

Step 13124, when first is interim equal in plain text with first in plain text, the first self-test success.

Step 1313, after the first self-test success, single-chip microcontroller sets coprocessor error status counter in system area It is set to 0, and executes starting up's process.

Step 141, when single-chip microcontroller is after completing electrification reset, single-chip microcontroller is according to host computer or the demand of upper application When carrying out status checkout to coprocessor, single-chip microcontroller according to primary key, original plaintext, original cipher text, to coprocessor into Row coprocessor active self-test processing, coprocessor active self-test,

Specifically include: step 1411, single-chip microcontroller obtains primary key from system area and generates the second key, obtains original plaintext Second plaintext is generated, original cipher text is obtained and generates the second ciphertext；

Step 1412, single-chip microcontroller carries out the second self-test to coprocessor according to the second key, second plaintext, the second ciphertext Processing,

It specifically includes: step 14121, the interim plaintext of single-chip microcontroller initialization second, the second interim ciphertext；

Step 14122, single-chip microcontroller is encrypted second plaintext using coprocessor according to the second key, generates Second interim ciphertext；

Step 14123, when the second interim ciphertext is equal with the second ciphertext, single-chip microcontroller is according to the second key, at association The second ciphertext is decrypted in reason device, generates the second interim plaintext；

Step 14124, when second is interim equal with second plaintext in plain text, the second self-test success.

Step 1413, after the second self-test success, single-chip microcontroller sets coprocessor error status counter in system area It is set to 0, and sends coprocessor active self-test success to host computer or upper application.

The embodiment of the present invention two, if Fig. 2 is provided shown in a kind of method schematic diagram of data encryption standards coprocessor self-test, Method the following steps are included:

Step 21, starting self-test status word, primary key, original plaintext, original cipher text, association is arranged in system area in single-chip microcontroller Processor error state counter.

Step 22, when single-chip microcontroller carries out electrification reset, single-chip microcontroller obtains starting self-test status word from system area and generates First self-test status word obtains primary key and generates first key, obtains original plaintext and generates first in plain text, obtains original cipher text Generate the first ciphertext.

Step 23, single-chip microcontroller judges whether the value of the first self-test status word is 1, when the value of the first self-test status word is 1 Step 24 is gone to, goes to step 50 when the value of the first self-test status word is 0, when the value of the first self-test status word is not 1 Step 410 is gone to when not being 0.

Step 24, the interim plaintext of single-chip microcontroller initialization first, the first interim ciphertext.

Step 25, single-chip microcontroller is encrypted the first plaintext using coprocessor according to first key, generates first Interim ciphertext.

Step 26, single-chip microcontroller judges whether the first interim ciphertext is equal with the first ciphertext, if the first interim ciphertext and the One ciphertext is equal to go to step 27, if the first interim ciphertext with the first ciphertext is unequal goes to step 420.

Step 27, single-chip microcontroller is decrypted the first ciphertext using coprocessor according to first key, generates first Interim plaintext.

Step 28, single-chip microcontroller judge first it is interim in plain text and whether first is equal in plain text, if first is interim in plain text with the One it is equal in plain text goes to step 29, if first interim unequal in plain text goes to step 420 with first in plain text.

Step 29, the first self-test success, single-chip microcontroller set 0 for coprocessor error status counter in system area, and Execute starting up's process.

Step 50, the single-chip microcontroller exits the coprocessor starting self-test process, and executes starting up's process.

Step 410, the single-chip microcontroller exits the coprocessor starting self-test process, and returns to error message: self-test shape State character error.

Lead to that such problem occurs, typically because the value of self-test status word is modified to mistake not distinguishable state Value.

Step 420, the value of coprocessor error status counter in system area is added 1 by fail self-test, single-chip microcontroller, single-chip microcontroller It executes and electrification reset is forced to restart process.

Herein, if it is after electrification reset, when by the active self-test of host computer and upper application initiation, single-chip microcontroller will While the value of coprocessor error status counter adds 1 in system area, also need to return to mistake letter to host computer and upper application Breath: active fail self-test；

In addition, this step can also make further after the value of coprocessor error status counter is more than limit value Processing operation: the use state of coprocessor is set as disabling by single-chip microcontroller, and sends association's processing to host computer or upper application Device has disabled.

A kind of method of data encryption standards coprocessor self-test provided by the invention, in single-chip microcontroller electrification reset, such as Fruit starting self-test status word is that 1 pair of DES coprocessor carries out starting self-test, is skipped pair if starting self-test status word is not 1 First starting self-test of DES coprocessor.After single-chip microcontroller electrification reset, the demand according to host computer or upper application is right When DES coprocessor carries out status checkout, single-chip microcontroller starts the first active self-test to DES coprocessor.Wherein, first starts certainly Inspection, the first active self-test are all that preset primary key, original cipher text, original plaintext are obtained from system area, then by using original Beginning key pair original plaintext carries out encryption and generates interim ciphertext, original cipher text is decrypted the interim plaintext of generation, finally to original Begin in plain text be compared with interim plaintext, original cipher text is compared respectively with interim ciphertext, compare successfully later then self-test at Function.If self-test is unsuccessful, the method for the present invention is provided with coprocessor error status counter, the successful counter of each self-test Value return to zero, the value of each fail self-test counter adds 1, when counter value be more than limit value after, single-chip microcontroller can stop The use of DES coprocessor.By using the method for the present invention, can not only there are conventional RESET self-test and two kinds of active self-test at any time Mode has also done identification processing to fail self-test for using, and has both ensured the steady-working state of DES coprocessor, also for User provides timely and convenient early warning processing means.

Professional should further appreciate that, described in conjunction with the examples disclosed in the embodiments of the present disclosure Unit and algorithm steps, can be realized with electronic hardware, computer software, or a combination of the two, hard in order to clearly demonstrate The interchangeability of part and software generally describes each exemplary composition and step according to function in the above description. These functions are implemented in hardware or software actually, the specific application and design constraint depending on technical solution. Professional technician can use different methods to achieve the described function each specific application, but this realization It should not be considered as beyond the scope of the present invention.

The step of method described in conjunction with the examples disclosed in this document or algorithm, can be executed with hardware, processor The combination of software module or the two is implemented.Software module can be placed in random access memory (RAM), memory, read-only memory (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technical field In any other form of storage medium well known to interior.

Above-described specific embodiment has carried out further the purpose of the present invention, technical scheme and beneficial effects It is described in detail, it should be understood that being not intended to limit the present invention the foregoing is merely a specific embodiment of the invention Protection scope, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should all include Within protection scope of the present invention.