阅读说明：本技术 跨阻放大器电路 (transimpedance amplifier circuit ) 是由 约翰·克里斯托弗·斯谢特 谢尔吉·古德里耶夫 于 2018-05-15 设计创作，主要内容包括：本发明涉及一种包括用于将两个输入电流转换成两个输出电压的跨阻放大器的电路,所述电路具有包括第一输入电压被施加到的以及第一输入电流流入的第一输入的第一放大器部件,并且具有包括第二输入电压被施加到的以及第二输入电流流入的第二输入的第二放大器部件,其中,第一放大器部件和第二放大器部件连接到公共电源电压,第一放大器部件和第二放大器部件连接到公共电流源,第一放大器部件的输入和第二放大器部件的输入具有不同的直流电压,并且第一放大器部件和第二放大器部件被设计为使得第一放大器部件的输出电压与第一放大器部件的输入电流成比例,并且第二放大器部件的输出电压与第二放大器部件的输入电流成比例。(The invention relates to a circuit comprising a transimpedance amplifier for converting two input currents into two output voltages, the circuit has a first amplifier section comprising a first input to which a first input voltage is applied and into which a first input current flows, and has a second amplifier section including a second input to which a second input voltage is applied and into which a second input current flows, wherein the first amplifier section and the second amplifier section are connected to a common supply voltage, the first amplifier section and the second amplifier section are connected to a common current source, an input of the first amplifier section and an input of the second amplifier section have different direct current voltages, and the first amplifier means and the second amplifier means are designed such that the output voltage of the first amplifier means is proportional to the input current of the first amplifier means, and the output voltage of the second amplifier component is proportional to the input current of the second amplifier component.)

1. A circuit comprising a transimpedance amplifier (20) for converting two input currents (Iin +, Iin-) into two output voltages (Uvo-, Uvo +), the circuit comprising a first amplifier part (30) comprising a first input (32) to which a first input voltage (Uin +) is applied and into which the first input current (Iin +) flows, and comprising a second amplifier part (31) comprising a second input (34) to which a second input voltage (Uin-) is applied and into which the second input current (Iin-) flows, characterized in that the first amplifier part (30) and the second amplifier part (31) are connected to a common supply voltage (9), the first amplifier part (30) and the second amplifier part (31) being connected to a common current source (11), the input (32) of the first amplifier part (30) and the output of the second amplifier part (31) being connected to a common current source (11) -34 have different DC voltages, and the first amplifier means (30) and the second amplifier means (31) are configured in such a way that an output voltage (Uvo-) of the first amplifier means (30) is proportional to the input current (Iin +) of the first amplifier means (30) and an output voltage (Uvo +) of the second amplifier means (31) is proportional to the input current (Iin-) of the second amplifier means (31).

2. A circuit according to claim 1, characterized in that the current source (11) is replaced by a short circuit.

3. The circuit according to one of claims 1 to 2, characterized in that the first amplifier means (30) and the second amplifier means (31) are configured as a single-stage or multi-stage transistor arrangement.

4. A circuit as claimed in one of claims 1 to 3, characterized in that a sensor (2), in particular a photodiode, is connected directly via a first terminal to the first input terminal (32) of the first amplifier component (30) and via a second terminal to the second input terminal (34) of the second amplifier component (31).

5. Circuit according to one of claims 1 to 4, characterized in that the first amplifier means (30) and the second amplifier means (31) comprise the same transistors and/or the same number of transistors.

6. The circuit according to one of claims 1 to 5, characterized in that the transimpedance amplifier (20) is configured for converting an input current (Iin) supplied by a sensor (2) into an output voltage (Uo), wherein the sensor (2) is directly connected to two input terminals (32, 34) of the transimpedance amplifier (20); the transimpedance amplifier (20) comprising two parallel current branches (7, 8) each having a plurality of transistors (T1, T2, T3, T4), wherein the current branches (7, 8) extend between a power supply terminal (9) and a first terminal of a current source (11), wherein the second terminal of the current source is connected to ground,

-a first terminal (3) of the sensor (2) is connected to a base terminal of a first amplifying transistor (T1) arranged in a first current branch (7) and to a collector terminal of the first amplifying transistor (T1) via a first resistor (Rfp); the collector of the first amplifying transistor (T1) is connected to the supply voltage via a third resistor (Rdp),

-a second terminal (5) of the sensor (2) is connected to a base terminal of a second amplifying transistor (T2) arranged in a second current branch (8) and to a collector terminal of the second amplifying transistor (T2) via a second resistor (Rfn),

-in the first current branch (7), a first operating point adjusting means (12) is provided for adjusting the input and output voltages of the first amplifying transistor (T1), said means being arranged between the emitter of the first amplifying transistor (T1) and the first terminal of the current source (11),

-in the second current branch (8), a second operating point adjusting means (12') is provided for adjusting the input and output voltages of the second amplifier transistor (T2), said means being connected between the collector of the second amplifying transistor (T2) and a first terminal of a fourth resistor (Rdn), wherein the fourth resistor (Rdn) is connected at its second terminal to the supply voltage (9).

7. Circuit according to one of claims 1 to 6, characterized in that the first operating point adjusting means (12) comprises a transistor (T3) having a short circuit between its base and collector, and the second operating point adjusting means (12') also comprises a transistor (T4) having a short circuit between its base and collector.

8. Circuit according to one of claims 1 to 7, characterized in that said first resistor (Rfp) and said second resistor (Rfn) are identical on the one hand and said third resistor (Rdp) and said fourth resistor (Rdn) are identical on the other hand.

9. the circuit according to one of claims 1 to 8, characterized in that a plurality of transistors (T5) of the first operating point adjusting component (12) are provided as a function of the operating point voltage of the sensor (2).

10. circuit according to one of claims 1 to 9, characterized in that a plurality of transistors (T6) of the second operating point adjusting means (12') are provided for symmetrical operation of the entire circuit.

11. Circuit according to one of claims 1 to 10, characterized in that the positive output terminal (35, Vo +) of the transimpedance amplifier (20) is connected to the collector terminal of the second operating point adjusting means (12', T4) and the negative output terminal (33, Vo-) of the transimpedance amplifier (20) is connected to the collector terminal of the first amplifying transistor (T1).

12. The circuit according to one of the claims 1 to 11, characterized in that at the output terminals (35, 33; Vo +, Vo-) of the transimpedance amplifier (20) a plurality of amplifier stages (16) are connected to a positive output terminal (Vo + ') and a negative output terminal (Vo-').

13. The circuit according to one of claims 1 to 12, characterized in that at the output terminals (35, 33; Vo +, Vo-) of the transimpedance amplifier (20) or at the amplifier stage (16) a differential voltage balancing unit (13, 13 ') is provided, by means of which differential voltage balancing unit (13, 13') the DC voltage difference (Udif) between the voltage (Uvo +) at the positive output terminal (35, Vo +) of the transimpedance amplifier (20) and the voltage (Uvo-) at the negative output terminal (Vo-, 33) is reduced to zero.

14. The circuit according to claim 13, characterized in that the differential voltage balancing unit (13) is formed by a differential passive high-pass filter formed by a capacitor (C) connected to the respective output terminals (33, 35; Vo +, Vo-) of the transimpedance amplifier (20).

15. The circuit according to claim 13, characterized in that the differential voltage balancing unit (13') is formed by a feedback circuit part (14), the feedback circuit part (14) comprising several components connected in series:

-a differential low-pass filter (15), said differential low-pass filter (15) being connected to said output terminals (33, 35; Vo +, Vo-) of said transimpedance amplifier (20) or to said amplifier stage (16, Vo + ', Vo-'),

-an error correction amplifier (17),

-a transistor circuit component (21), the transistor circuit component (21) being connected to the first terminal (3) and the second terminal (5) of the sensor (2) in such a way that the differential DC voltage present at the outputs (33, 35) of the transimpedance amplifier (20) becomes zero.

16. A circuit according to claim 15, characterized in that the feedback circuit means (14) between the error correction amplifier (17) and the transistor circuit means (21) comprises a series circuit of an a/D converter (19), a register (22) and a D/a converter (18).

Technical Field

The invention relates to a circuit comprising a transimpedance amplifier for converting two input currents into two output voltages, the circuit comprising a first amplifier part comprising a first input to which a first input voltage is applied and into which a first input current flows, and comprising a second amplifier part comprising a second input to which a second input voltage is applied and into which a second input current flows.

Background

the transimpedance amplifier is used, inter alia, to convert an input current signal into an output voltage signal. The input current signal may be, for example, the current of a photodiode. The transimpedance amplifier receives a current signal output by the photodiode, converts the current signal into a corresponding voltage signal, and outputs the voltage signal. The voltage signal may optionally be amplified by means of an amplifier.

US 5345073 a discloses a circuit comprising a transimpedance amplifier to the input of which photodiodes are symmetrically connected. In this case, the cathode and anode of the photodiode are directly connected to the input of the transimpedance amplifier. A transimpedance amplifier comprises two parallel current branches in each of which a plurality of transistors is arranged for amplification purposes. The advantage of the circuit is that the photodiode is directly connected to the amplifier input, i.e. no coupling capacitor is required, because as a result there are no additional components in the signal path, so that the high frequency characteristics and noise are improved and the cost is reduced. The photodiodes are symmetrically connected so that on the one hand a differential operation of the photodiodes is possible and, therefore, on the one hand, the common-mode rejection ratio is improved and, on the other hand, both the current of the anode and the current of the cathode of the diode can be used as input currents for the amplifier. The photodiode can be biased using a suitable operating point voltage. One disadvantage of the known circuit of the transimpedance amplifier is that an additional amplifier (transistor and current source transistor) is required at its input, making the circuit more complex and reducing the noise performance. An additional disadvantage is that the additional amplifier at the input causes an increase in the supply voltage required for at least two collector-emitter voltages, in particular the collector-emitter voltage of the current source transistor and the collector-emitter voltage of the transistor in the common base circuit, including the operating point voltage of the diode.

Disclosure of Invention

It is an object of the invention to develop a circuit comprising a transimpedance amplifier to which a photodiode is symmetrically connected on the input side without a coupling capacitor and which makes it possible to set the operating point voltage of the photodiode such that noise, supply voltage and circuit complexity are reduced.

To achieve this object, the invention related to patent claim 1 is characterized in that the first amplifier section and the second amplifier section are connected to a common supply voltage, the first amplifier section and the second amplifier section are connected to a common current source, the input of the first amplifier section and the input of the second amplifier section have different DC voltages, and the first amplifier section and the second amplifier section are configured in such a way that the output voltage of the first amplifier section is proportional to the input current of the first amplifier section and the output voltage of the second amplifier section is proportional to the input current of the second amplifier section.

according to the present invention, a transimpedance amplifier having a relatively small noise behavior, a low supply voltage and a lower circuit complexity is provided. It can be used in a number of ways, in particular for low-noise amplification of the current signal of a detector or sensor in the high-frequency range, for example a photodetector, a hall sensor, a pressure sensor or a temperature sensor.

according to a preferred embodiment of the invention, the photodiode is symmetrically connected to the transimpedance amplifier on the input side, wherein the anode and the cathode of the photodiode are directly connected to the input terminals of the transimpedance amplifier. At the input of the transimpedance amplifier, no additional components such as capacitors and resistors are required, which would reduce the bandwidth and sensitivity of the transimpedance amplifier or degrade noise. The present invention enables the provision of a transimpedance amplifier in a cost-effective manner. The transimpedance amplifier comprises an operating point adjusting component by means of which, for example, an adjustment of the blocking voltage of the photodiode is made possible. Advantageously, as a result thereof, different types of photodiodes may be connected to the input of the transimpedance amplifier in a simple manner, or the operating point of the photodiode may be set such that the dark current may be minimized or the bandwidth may be maximized. Since no additional components are arranged on the input side of the transimpedance amplifier, the noise of the transimpedance amplifier can be kept low and the bandwidth can be kept high.

According to a refinement of the invention, a differential voltage comparison unit is provided on the output side of the transimpedance amplifier, by means of which the DC voltage difference between the positive output terminal and the negative output terminal of the transimpedance amplifier can be reduced to zero.

According to a preferred embodiment of the invention, the differential voltage balancing unit is formed by a passive high-pass filter. The high-pass filter is constituted by a capacitor connected to the output terminal. Advantageously, the voltage signal distribution at the positive output terminal and at the negative output terminal may thus be set to a common DC voltage level.

According to a refinement of the invention, the differential voltage balancing unit is formed by a feedback circuit component. The components comprise a low-pass filter, an error correction amplifier and transistor circuit components, such that on the input side of the transimpedance amplifier an automatically achieved flow of a differential current causes the voltage signal distribution at the positive output terminal and at the negative output terminal to be set to a common DC voltage level. RSSI (received signal strength indicator), burst mode operation and channel failure monitoring may thus also be achieved, as compared to the improvements described above.

The invention achieves in particular a low supply voltage inverse (high supply rejection ratio, PSRR) of the amplification factor with a low common mode gain due to the fully differential input level of the transimpedance amplifier and the simultaneously high differential mode gain of the fully differential design. Since the photodiode is directly connected to the input terminal at the input of the transimpedance amplifier, there is no additional parasitic capacitance. The invention may preferably be used in monolithic multi-channel receivers based on silicon photonics, for example.

Drawings

Exemplary embodiments of the present invention are described in more detail based on the accompanying drawings.

The description is as follows:

FIG. 1: block diagram of the invention

FIG. 2: exemplary detailed embodiments of the invention

FIG. 3: alternative embodiment of the circuit according to the invention comprising a differential voltage balancing unit without feedback

FIG. 4: alternative embodiment of the circuit according to the invention comprising a differential voltage balancing unit with feedback

Detailed Description

According to fig. 1, the circuit according to the invention comprises a transimpedance amplifier 20 having a first amplifier component 30 and a second amplifier component 31. The first amplifier section 30 and the second amplifier section 31 are connected to a common supply voltage 9. To set the operating point, the first amplifier section 30 and the second amplifier section 31 are each connected to the same or a common current source 11. The circuit 20 is configured as a transimpedance amplifier.

The first amplifier section 30 has a first input terminal 32 to which a first input voltage Uin + is applied and into which a first input current Iin + flows. Furthermore, the first amplifier component 30 has a first output terminal 33, at which first output terminal 33 an output voltage Uvo-is present.

The second amplifier section 31 has a second input terminal 34 to which a second input voltage Uin-is applied and into which a second input current Iin-flows. Furthermore, the second amplifier component 31 has a second output terminal 35, at which second output terminal 35 a second output voltage Uvo + is present.

According to an alternative embodiment of the circuit 20, which is not shown, the current source 11 may be omitted such that the first amplifier part 30 and the second amplifier part 31 are each connected to a ground terminal. The omission of the current source 11 is advantageous for use cases where the circuit operates at a relatively low supply voltage. A higher inverse power supply voltage (lower power supply rejection ratio, PSRR) of the amplification factor is disadvantageous.

The first amplifier section 30 and the second amplifier section 31 may each be configured as a single-stage or multi-stage transistor arrangement. Advantageously, they contain the same transistors or number of transistors. The first amplifier section 30 and the second amplifier section 31 are each configured such that the first output voltage Uvo-is proportional to the first input current Iin + and the second output voltage Uvo + is proportional to the second input current Iin-. Advantageously, a transimpedance amplifier with significantly lower noise and lower supply voltage than the transimpedance amplifier described in US 5345073A is thereby provided. The circuit 20 may also be used as a pure voltage amplifier with no attached sensors. Alternatively, sensors or detectors, for example hall sensors or photodiodes, may be connected to the inputs 32, 34 of the first amplifier part 30 and the second amplifier part 31. In fig. 1, by way of example, the photodiode 2 is connected between the first input terminal 32 of the first amplifier section 30 and the second input terminal 34 of the second amplifier section 31.

The sensor 2 is directly connected via a first terminal to the input 32 of the first amplifier component 30 and via a second terminal to the input 34 of the second amplifier component 31. Preferably, the sensor 2 is adapted to have symmetrical electrical characteristics in order to achieve optimal performance of the transimpedance amplifier. For this purpose, the input terminals 32, 34 of the amplifier components 30, 31 have the same characteristics and charging conditions. Alternatively, the circuit 20 also operates to have asymmetric electrical characteristics.

In another embodiment of the invention, the sensor 2 may be connected to only one input, i.e. to only the input 32 of the first amplifier section 30 or the input 34 of the second amplifier section 31. The respective other input remains, e.g. unconnected. In this case, the sensor operates asymmetrically, and the transimpedance amplifier 20 supplies a differential output signal proportional to the sensor current. Furthermore, two sensors 2 may also be connected to the inputs 32, 34 such that one sensor 2 is connected to the input 32 of the first amplifier part 30 and the other sensor 2 is connected to the input 34 of the second amplifier part 31. The transimpedance amplifier 20 then outputs a differential voltage proportional to the difference between the sensor currents.

One possible detailed embodiment of the transimpedance amplifier 20 is shown in fig. 2. The transimpedance amplifier 20 has two parallel current branches 7, 8 extending between a supply voltage terminal 9 and a ground terminal 10. The current source 11 is provided on the ground terminal side.

The first current branch 7 has a first amplifying transistor T1 which is configured as an NPN transistor. The first amplifying transistor T1 has a positive input terminal 32 connected to the transimpedance amplifier 20 via a resistor Rfp, and a collector connected to the power supply voltage via a resistor Rdp. The base of the amplifying transistor T1 is directly connected to the positive input terminal 32. In the second current branch 8, a second amplifying transistor T2 is arranged, which is also configured as an NPN transistor. The amplifying transistor T2 has a collector connected to the negative input terminal 34 of the transimpedance amplifier 20 via a resistor Rfn. The base of the amplifying transistor T2 is also connected to the negative input terminal 34. The amplifying transistors T1 and T2 form a differential amplifier. If the pair of resistors Rfn and Rfp is identical to the pair of resistors Rdp and Rdn, the value Rfn-Rfp-Rf approximately represents the amplification or transimpedance Z by which the input current Iin is amplified to the output voltage Uo. The input current Iin is obtained as the difference between the input currents Iin + and Iin-. The output voltage Uo is obtained from the difference between the voltages Uvo + and Uvo-plus a constant offset voltage.

In addition, the transimpedance amplifier 20 includes an operating point adjusting section 12 in the first current branch 7 for adjusting the input and output voltages of the amplifying transistor T1. Meanwhile, the operating point voltage at the cathode 5 of the photodiode 2 is set by adjusting the operating point voltage at the input of the amplifying transistor T1. In the present exemplary embodiment, it is assumed that there is a germanium photodiode in which the desired operating point is a blocking voltage of about 1V. For this purpose, the operating point adjusting section 12 has a transistor T3 in a diode connection, i.e., a short circuit of the base and the collector. In the first current branch 7, the first transistor T3 is arranged in a diode connection, wherein the collector of the transistor T3 is connected to the emitter of the amplifying transistor T1. The emitter of the transistor T3 is connected to the current source 11.

In addition, the transimpedance amplifier 20 has an operating point adjusting section 12' in the second current branch 8 for adjusting the input and output voltages of the amplifier transistor T2. Meanwhile, the operating point voltage at the anode 3 of the photodiode 2 is set by adjusting the operating point voltage at the input of the amplifying transistor T2. For this purpose, the operating point adjusting means 12' comprise a transistor T4 in the diode connection, i.e. in the second current branch 8 with a short-circuit of base and collector. In this case, the emitter of the transistor T4 is connected to the collector of the amplifying transistor T2, and the collector and the base of the transistor T4 are connected to the power supply terminal 9 via the resistor Rdn.

The collector of the transistor T1 is connected to the power supply terminal 9 via a resistor Rdp. The transistors T1, T2 achieve an amplification of the input-side differential signal Iin ═ Iin + — Iin — to the output voltage Uo with the amplification factor Rf, wherein, in addition, a constant offset voltage is included in Uo. The transistors T3, T4 enable a shift of the differential input and output voltages according to the desired operating point voltage of the photodiode 2.

The shift in the differential output voltage is shown in fig. 3. The voltages Uvo + and Uvo-are present at the output terminals Vo + and Vo-35, 33 of the circuit shown in fig. 3 and have different DC components and have the same AC component in terms of magnitude, so that the differential output voltage Uo Uvo + -Uvo-has a constant offset voltage.

An additional embodiment of the invention for canceling the offset of the differential output voltage Uo is shown in fig. 3. It comprises a transimpedance amplifier 20 connected symmetrically on the input side to the photodiode 2. The anode 3 of the photodiode 2 is connected to the negative input terminal 34 of the transimpedance amplifier 20, and the cathode 5 of the photodiode 2 is connected to the positive input terminal 32 of the transimpedance amplifier 20. As is apparent from fig. 3, the transimpedance amplifier 20 has a positive output terminal 35 or Vo +, and a negative output terminal 33 or Vo-. The two voltages are phase shifted by 180 ° and have different DC voltage components, so that an offset voltage Udif is available. Typically, Udif is constant or slowly varying. In order to reduce the offset voltage Udif to zero, a differential voltage balancing unit 13 according to fig. 3 is provided, by means of which differential voltage balancing unit 13 the offset voltage or DC voltage difference Udif between the positive output terminal Vo + and the negative output terminal Vo-of the transimpedance amplifier 20 is reduced to zero. The differential voltage balancing unit 13 is configured as a passive high pass filter comprising capacitors C each connected to the output terminals Vo +, Vo-, such that at modified output terminals Vo + 'and Vo-' having the same DC voltage component, output signals Uvo + 'and Uvo-' are obtained which are different from the voltages Uvo +, Uvo-present at the output terminals Vo +, Vo-.

According to an alternative embodiment according to fig. 4, a differential voltage balancing unit 13' formed by the feedback circuit part 14 may be provided. The feedback circuit part 14 has a differential low pass filter 15 directly connected to the transimpedance amplifier 20 or an additional amplifier stage 16 arranged on the output side of the transimpedance amplifier 20. In the feedback branch an error correction amplifier 17 is connected to the low pass filter 15. The a/D converter 19, the register 22, and the D/a converter 18 are connected to the error correction amplifier 17. On the output side of the D/a converter 19, a transistor circuit section 21 composed of two transistors T5, T6 is provided.

The collectors of the transistors T5, T6 are each connected to the negative input terminal 34 and the positive input terminal 32 of the transimpedance amplifier 20. In the operating state, collector currents Iosp, Iosn of the transistors T5, T6 flow to the input terminals 34 and 32, and a current Iph flows through the photodiode 2. Via the feedback circuit part 14, the variation of the DC component of the input current Iin at the transimpedance amplifier 20 by means of the generated offset current results in the output voltage signals Uvo + 'and Uvo-' having the same DC voltage component. One advantage of using a/D converter 19, register 22 and D/a converter 18 is that the clock to register 22 can be activated or deactivated as needed. If the clock is activated, the currents Iosp and Iosn are re-adjusted accurately and continuously. On the other hand, if the clock is disabled, the newly detected settings for currents Iosp and Iosn are retained and are not altered. This may be advantageous if, for example, the dynamic control behavior of the feedback circuit part 14 adversely affects the output signal of the transimpedance amplifier 20. In this case, fixed settings of Iosp and Iosn may be required.

According to an alternative embodiment of the present invention, which is not shown, the a/D converter 19, the register 22, and the D/a converter 18 may be omitted, and the output of the error correction amplifier 17 may be directly connected to the inputs of the transistors T5 and T6.

It goes without saying that the above-described transistors T1, T2, T3, T4, T5, T6 may be configured as other types than bipolar transistors, for example, field effect transistors. Although bipolar transistors are provided in the embodiments described herein, it will be clear to a person skilled in the art that in alternative embodiments any of the bipolar transistors may be replaced by various other types of transistors, such as field effect transistors. In this regard, the emitter, collector and base terminals of the bipolar transistors described herein correspond to the source, drain and gate terminals in embodiments incorporating field effect transistors, and may be used interchangeably in describing embodiments. Thus, the use of the terms emitter, collector and base terminals do not act in a limiting manner on the embodiments or the invention. Similarly, it is clear to a person skilled in the art that PNP transistors can be used instead of NPN transistors or P field effect transistors can be used instead of N field effect transistors with appropriate settings of the operating point voltage and current of the transistors.

The block diagram images described herein are examples only. Many modifications to these block diagram images or the operations described herein are possible without departing from the spirit of the invention. For example, circuits may be arranged in a different order, or circuits may be added, deleted or modified. All of these modifications are considered an integral part of the claimed invention.

In additional embodiments, the amplifier formed by the amplifying transistors T1 and T2 may also be replaced by a multi-stage amplifier circuit. This may for example enable higher bandwidths.

In an additional embodiment, the operating point adjusting means 12 and 12' may also be formed by VBE multipliers (see, for example, "VBE-Multiplier" in Crecraft, David; Gergely, Stephen (5.21.2002. Butterworth-Heinemann. p.188.ISBN 0080475833). In the case of a VBE multiplier, it is advantageous compared to diodes that a voltage with a size k VBE can be generated therefrom, wherein k does not have to be an integer.