阅读说明：本技术 有源像素传感器计算机断层摄影(ct)检测器和读出方法 (Active pixel sensor Computed Tomography (CT) detector and readout method ) 是由 比朱·雅各布 于 2018-05-07 设计创作，主要内容包括：本方法涉及将CT闪烁体组集成在快速、低电子噪声和可扩展CMOS有源像素传感器衬底上的CT检测器的实施方式。在一个实施方案中,使用具有集成在相同晶圆上的内置列模数转换(ADC)电路(例如,ASIC)的大型3侧可对接CMOS有源像素阵列。(The method relates to an embodiment of a CT detector that integrates a set of CT scintillators on a fast, low electronic noise and scalable CMOS active pixel sensor substrate. In one embodiment, a large 3-sided dockable CMOS active pixel array using built-in column analog-to-digital conversion (ADC) circuitry (e.g., ASIC) integrated on the same wafer.)

1. A detector module for a Computed Tomography (CT) detector, the detector module comprising:

A pixel array formed on a substrate, each pixel comprising an array of sub-pixels;

Readout circuitry integrated on one end of the substrate such that three remaining edges of the substrate are configured to abut corresponding edges of other detector modules, wherein the readout circuitry for each column of pixels comprises a plurality of readout channels for that column, each readout channel configured to sequentially readout a plurality of pixels within the respective column.

2. The detector module of claim 1, wherein each sub-pixel within a column of pixels has a dedicated data line attached to a column amplifier and analog-to-digital converter (ADC).

3. The detector module of claim 2, wherein the readout channel for a given column of pixels comprises a respective amplifier and ADC of the column of pixels.

4. The detector module of claim 1, wherein each sub-pixel comprises at least two charge storage elements.

5. The detector module of claim 1, wherein the charge storage elements of each sub-pixel are configured to operate alternately or sequentially such that for a given sub-pixel a first charge storage element is read out and a second charge storage element accumulates charge.

6. The detector module of claim 1, wherein the substrate is a panel formed from a single silicon wafer, such that the pixel array and the readout circuitry are formed on the same silicon wafer.

7. The detector module of claim 1, wherein each sub-pixel comprises a pinned photodiode.

8. The detector module of claim 1, wherein each sub-pixel comprises two or more capacitors operating sequentially or alternately with each other.

9. The detector module of claim 8, wherein each capacitor comprises a metal-insulator-metal capacitor.

10. A detector module configured for a Computed Tomography (CT) detector, the detector module comprising:

A plurality of columns of pixels formed on a substrate, wherein the pixels within each column are grouped into blocks of two or more pixels;

A readout circuit integrally formed on the substrate, wherein the readout circuit comprises a separate readout channel for each pixel block in each column, such that the number of readout channels per column corresponds to the number of pixel blocks in each column.

11. The detector module of claim 10, wherein each pixel comprises an array of sub-pixels.

12. The detector module of claim 11, wherein each sub-pixel comprises at least two charge storage elements.

13. the detector module of claim 12, wherein the charge storage elements of each sub-pixel are configured to operate alternately or sequentially such that for a given sub-pixel a first charge storage element is read out and a second charge storage element accumulates charge.

14. The detector module of claim 1, wherein each sub-pixel comprises a pinned photodiode.

15. The detector module of claim 10, wherein each readout channel includes analog-to-digital conversion (ADC) circuitry such that each pixel block within a column has a separate ADC circuit.

16. The detector module of claim 10, wherein the substrate is a panel formed from a single c-Si wafer such that the pixel columns and the readout circuitry are formed on the same c-Si wafer.

17. A method for reading out a Computed Tomography (CT) detector, comprising:

For each column of pixels in the pixel array, reading out blocks of pixels within the respective column using a different analog-to-digital (ADC) conversion readout channel for each block;

wherein the ADC readout channels for a block of pixels are formed on the same substrate as the pixel array.

18. The method of claim 17, wherein each pixel comprises an array of sub-pixels.

19. The method of claim 18, wherein each sub-pixel comprises two or more charge storage elements.

20. The method of claim 19, wherein the charge storage elements of each sub-pixel are read out alternately or sequentially such that for a given sub-pixel, a first charge storage element is read out while a second charge storage element accumulates charge.

Technical Field

The subject matter disclosed herein relates to the manufacture and use of radiation detectors, including X-ray radiation detectors manufactured using pixel arrays with integrated readout electronics.

Background

non-invasive imaging techniques allow for non-invasive acquisition of images of internal structures or features of a subject (patient, article of manufacture, baggage, package, or passenger). In particular, such non-invasive imaging techniques rely on various physical principles (such as differential transmission of X-rays through the target volume or reflection of sound waves) to acquire data and construct images or otherwise represent internal features of the subject.

By way of example, a Computed Tomography (CT) imaging system is used to generate images in a non-invasive manner by acquiring X-ray transmission data over a series of angular views about a patient and reconstructing the measurement data to generate volumetric or cross-sectional views of the patient. Such computed tomography methods may be used for medical imaging, as well as for certain industrial or security screening applications.

In CT, a portion of the radiation passes through the subject or object and strikes a detector, where a representative signal is acquired. To acquire data over a useful angular range, the detector acquires data almost continuously during the examination, as compared to conventional radiography, where the detector would only acquire data in discrete acquisitions or shots. Therefore, certain requirements are placed on the CT detector that are unnecessary for other detectors where less continuous types of data collection occur. In particular, to facilitate fast readout, each pixel of the detector typically has its own readout channel, resulting in a massively parallel readout architecture. However, such architectures may create their own counterpart problems, such as noise associated with the distance that the analog signal must travel before being digitized, and in arrangements where the digital conversion circuitry is placed close to the photodiode structure generating the signal, heat from these circuits may degrade the performance of the detection circuitry.

Disclosure of Invention

The following summarizes certain embodiments commensurate in scope with the originally claimed subject matter. These embodiments are not intended to limit the scope of the claimed subject matter, but rather these embodiments are intended only to provide a brief summary of possible embodiments. Indeed, the invention may comprise various forms which may be similar to or different from the embodiments set forth below.

In one embodiment, a detector module configured for a Computed Tomography (CT) detector is provided. According to this embodiment, the detector module includes an array of pixels formed on a substrate, each pixel including an array of sub-pixels. The detector module further includes readout circuitry integrated on one end of the substrate such that three remaining edges of the substrate are configured to abut corresponding edges of other detector modules. The readout circuitry for each column of pixels includes a plurality of readout channels for that column, each readout channel being configured to sequentially readout a plurality of pixels within a respective column.

In another embodiment, a detector module configured for a Computed Tomography (CT) detector is provided. According to this embodiment, the detector module includes a plurality of columns of pixels formed on the substrate, wherein the pixels within each column are grouped into blocks of two or more pixels. The detector module also includes readout circuitry integrally formed on the substrate. The readout circuit comprises a separate readout channel for each pixel block in each column, such that the number of readout channels per column corresponds to the number of pixel blocks in each column.

In additional embodiments, methods for reading out a Computed Tomography (CT) detector are provided. According to the method, for each column of pixels in the pixel array, a different analog-to-digital (ADC) conversion readout channel is used for each block to read out a block of pixels within the respective column. The ADC readout channels for the pixel blocks are formed on the same substrate as the pixel array.

Drawings

These and other features, aspects, and advantages of the present invention will become better understood when the following detailed description is read with reference to the accompanying drawings in which like characters represent like parts throughout the drawings, wherein:

Fig. 1 is a schematic diagram of an embodiment of a Computed Tomography (CT) system, according to aspects of the present disclosure;

FIG. 2 depicts an exploded view of a detector panel and scintillator pack, according to aspects of the present disclosure;

FIG. 3 depicts a progressively enlarged view of features of a detector panel in accordance with aspects of the present disclosure;

FIG. 4 depicts feature block-based readout features of a detector panel, according to aspects of the present disclosure;

FIG. 5 depicts the circuit and charge flow of a pixel circuit during dual energy image acquisition, in accordance with aspects of the present disclosure; and is

FIG. 6 illustrates the scalability of the detector panel of the present approach in accordance with aspects of the present disclosure.

Detailed Description

One or more specific embodiments will be described below. In an effort to provide a concise description of these embodiments, not all features of an actual implementation are described in the specification. It should be appreciated that in the development of any such actual implementation, as in any engineering or design project, numerous implementation-specific decisions must be made to achieve the developers' specific goals, such as compliance with system-related and business-related constraints, which may vary from one implementation to another. Moreover, it should be appreciated that such a development effort might be complex and time consuming, but would nevertheless be a routine undertaking of design, fabrication, and manufacture for those of ordinary skill having the benefit of this disclosure.

While the following discussion is generally provided in the context of medical imaging, it should be understood that the present technology is not limited to such medical contexts. Indeed, any examples and explanations provided in this medical context are intended only to facilitate the explanation by providing examples of actual implementations and applications. However, the present methods may also be used in other contexts, such as non-destructive inspection of manufactured parts or goods (i.e., quality control or quality audit applications), and/or non-intrusive inspection of packages, boxes, luggage, etc. (i.e., security or screening applications).

The method relates to a method for manufacturing a radiation detector for a Computed Tomography (CT) imaging system using a plurality of tiled detector panels. In particular, the method employs a matrix readout of an array of pixels formed on a panel, where a group of pixels is multiplexed to a readout channel. This is in contrast to conventional approaches where each pixel is physically connected to a dedicated readout channel. In one embodiment of the method, a three-sided dockable CMOS (complementary metal oxide semiconductor) active pixel array is used (i.e., the pixel array is configured to abut other pixel arrays on three sides), with column analog-to-digital conversion (ADC) circuitry integrated onto the same wafer on which the photodiode array is formed. As used herein, an "active pixel" has an amplifier formed within each pixel circuit so that an amplified analog signal is read out from each pixel. As described above, the digital conversion may be performed by an integrated ADC associated with each column or a subset of each column of pixels. The proposed architecture allows the X-ray detector to operate at a frame rate greater than 10kHz, which is required to support fast CT applications. This is achieved by an active pixel sensor with global shutter capability implemented on a 3-sided dockable CMOS imager architecture as described above. As discussed herein, a platform concept for detectors is also contemplated that can be extended across CT product combinations with different coverage requirements.

Furthermore, another benefit of the architecture discussed herein is improved thermal performance. In particular, the proposed 3-sided dockable architecture simplifies thermal issues by keeping the heat source (e.g., ASIC readout circuitry) away from sensitive elements of the detector (such as photodiodes and scintillators) whose performance may change in the presence of temperature changes.

In view of the foregoing discussion, fig. 1 illustrates an embodiment of an imaging system 10 for acquiring and processing image data in accordance with aspects of the present disclosure. In the illustrated embodiment, system 10 is a Computed Tomography (CT) system that is designed to acquire X-ray projection data, reconstruct the projection data into a tomographic image, and process the image data for display and analysis. The depicted CT imaging system 10 includes an X-ray source 12. As discussed in detail herein, the source 12 may include one or more X-ray sources, such as an X-ray tube or one or more packages containing solid state emissive structures. According to certain contemplated embodiments, the X-ray source 12 is configured to emit X-ray beams 20 from one or more emission points (e.g., focal points), which may correspond to X-ray emission areas on a target structure (e.g., an anode structure) impinged by the directed electron beams.

In certain embodiments, the source 12 may be positioned near a filter assembly or beam shaper 22, which may be used to manipulate the X-ray beam 20, define the shape and/or extent of high intensity regions of the X-ray beam 20, control or define the energy distribution of the X-ray beam 20, and/or otherwise limit X-ray exposure on those portions of the patient 24 that are not within the region of interest. In practice, a filter assembly or beam shaper 22 may be incorporated within the gantry between the source 12 and the imaging volume.

The X-ray beam 20 enters a region in which a subject (e.g., a patient 24) or an object of interest (e.g., a manufactured part, baggage, package, etc.) is positioned. The subject attenuates at least a portion of the X-rays 20, producing attenuated X-rays 26 that will impinge upon a detector array 28 formed of a plurality of detector modules or panels (e.g., a tiled array of such panels or modules) as described herein. Each detector module has a plurality of detector elements (e.g., pixels), as discussed below. Each detector element produces an electrical signal that represents the intensity of an X-ray beam incident at the detector element location when the beam strikes detector 28. The electrical signals are acquired and processed to generate one or more scan data sets. In the embodiments discussed herein, detector 28 includes integrated readout circuitry and control logic, allowing for output of digitized signals to downstream components. In the depicted example, the detector 28 is coupled to a system controller 30 that commands acquisition of digital signals generated by the detector 28.

The system controller 30 commands the imaging system 10 to operate to perform filtering, inspection and/or calibration protocols and to process acquired data. With respect to the X-ray source 12, the system controller 30 provides power, focal spot position, control signals, etc. for X-ray examination sequences. According to certain embodiments, the system controller 30 may control the operation of the filter assembly 22, the CT gantry (or other structural support to which the X-ray source 12 and detector 28 are attached), and/or the translation and/or tilt of the patient support during the examination.

Further, via the motor controller 36, the system controller 30 may control the operation of the linear positioning subsystem 32 and/or the rotational subsystem 34 for moving components of the imaging system 10 and/or the subject 24. The system controller 30 may include signal processing circuitry and associated memory circuitry. In such embodiments, the memory circuits may store programs, routines, and/or encoded algorithms that are executed by the system controller 30 to operate the imaging system 10 (including the X-ray source 12 and/or the filter assembly 22) and process the digital measurements acquired by the detector 28 according to the steps and processes discussed herein. In one embodiment, the system controller 30 may be implemented as all or part of a processor-based system.

the source 12 may be controlled by an X-ray controller 38 contained within the system controller 30. The X-ray controller 38 may be configured to provide power, timing signals, and/or focus size and spot position to the source 12. Furthermore, in some embodiments, the X-ray controller 38 may be configured to selectively activate the source 12 so that tubes or emitters at different locations within the system 10 may operate in synchronization with or independent of each other, or switch the source between different energy profiles during an imaging session.

The system controller 30 may include a Data Acquisition System (DAS) 40. DAS 40 receives data collected by readout electronics of detector 28, such as digital signals from detector 28. The DAS 40 may then convert and/or process the data for subsequent processing by a processor-based system, such as a computer 42. In certain embodiments discussed herein, circuitry within detector 28 may convert the analog signal of the photodetector to a digital signal prior to transmission to data acquisition system 40. The computer 42 may include or be in communication with one or more non-transitory memory devices 46 that may store data processed by the computer 42, data to be processed by the computer 42, or instructions to be executed by the processor 44 of the computer 42. For example, a processor of the computer 42 may execute one or more sets of instructions stored on a memory 46, which may be a memory of the computer 42, a memory of the processor, firmware, or similar instances.

The computer 42 may also be adapted to control features (i.e., scanning operations and data acquisition) enabled by the system controller 30, such as in response to commands and scanning parameters provided by an operator via the operator workstation 48. The system 10 may further include a display 50 coupled to the operator workstation 48 that allows an operator to view relevant system data, imaging parameters, raw imaging data, reconstructed data, contrast agent density maps generated in accordance with the present disclosure, and the like. Additionally, the system 10 may include a printer 52 coupled to the operator workstation 48 and configured to print any desired measurements. The display 50 and printer 52 may also be connected to the computer 42 directly or via the operator workstation 48. In addition, the operator workstation 48 may include or be coupled to a Picture Archiving and Communication System (PACS) 54. PACS 54 may be coupled to a remote system 56, radiology department information system (RIS), Hospital Information System (HIS), or an internal or external network so that others at different locations may access the image data.

In view of the foregoing discussion of the overall imaging system 10, FIG. 2 depicts a detector panel 80 having an array of pixels that may be used in conjunction with other such detector panels 80 to form the overall detector 28. By way of example, the depicted panel 80 may constitute a base fillable, independent subunit of the detector assembly. For example, a certain number of detector panels 80 may be arranged (such as linearly arranged) into higher-level component units (such as detector modules). The detector modules themselves may then be arranged to form the overall detector 28 of the CT imager.

in the depicted example, the detector panel 80 is comprised of an active pixel array 82, which, as described above, indicates the presence of amplifier circuitry within the pixel circuitry. In one such example, the readout and/or digitization circuits are formed on the same continuous wafer as the pixel array, as compared to separately connected interconnect structures, where data transmission occurs along data lines formed on the wafer itself. In the depicted example, the integrated ASIC 86 is located at one end of the active pixel array 82. The depicted arrangement of positioning the readout circuitry 86 at the periphery of the pixel matrix 82 (i.e., outside the X-ray field of view) keeps the sensitive pixel circuitry and scintillator material 90 (discussed below) away from the heat generated by the readout circuitry 86, thereby improving thermal performance. This may be in contrast to conventional arrangements in which the scintillator, photodiode array and ASIC are formed as a vertical stack (such as may be applicable to massively parallel readout operations in which each pixel has a dedicated readout channel), which may subject sensitive pixel circuitry and scintillator material to heat generated by the ASIC during operation.

The active pixel sensor array 82 may be scaled appropriately based on the detector configuration. For example, an active pixel sensor array 82 having a length of 150mm may be formed from an 8-inch c-Si wafer (i.e., an 8-inch CMOS wafer). Larger panels, such as an array 82 of about 200mm, may be formed from larger diameter c-Si wafers.

Further, a scintillator group 90 is shown in fig. 2. In operation, scintillator group 90 is positioned proximate to the active surface of active pixel sensor array 82 and emits lower energy photons in response to X-ray photons, such as photons in the optical energy range or other energy range suitable for detection by photodetectors. The photodiodes of the active pixel array 82 then detect the optical (or other non-X-ray) photons emitted by the scintillator group 90 to generate electrical charges that are read out by the readout electronics 86.

a data output connector 88 (described herein as a flex circuit connector) is in electronic communication with the readout electronics (i.e., ASIC 86), which can be used to connect the detector module 80 into a connector structure provided in communication with the data acquisition circuitry and/or controller. Thus, data 92 acquired by the detector module 80 is transmitted to downstream circuitry via the output connector 88.

as previously mentioned, the depicted detector panel 80 arrangement is a structure that may be three-sided dockable. That is, the depicted detector panel 80 may abut other comparable detector panels 80 on each side except the side having the data output connector 88. This feature allows the detector to be constructed with a wide coverage (e.g., about 160 mm).

turning to fig. 3, the active matrix architecture is shown in more detail by progressively enlarging the features of the architecture from left to right in the figure. Thus, the rightmost abstraction level shows the active pixel array 82 and the integrated readout circuitry 86 of the detector panel 80. In the depicted example, the portion of the active pixel array 82 corresponding to the pixel electronics is a 32 x 128 pixel array 96 (i.e., 32 pixels in width and 128 pixels in length). It will be appreciated that other pixel array sizes may be employed, and that this example is provided merely for illustration and to provide a realistic example. The remaining length of the panel 80 includes integrated readout electronics 86. As described above, the pixel array 82 may be contiguous with other pixel arrays 82 on each side except the side having the readout electronics 86.

moving progressively to the right in fig. 3, the area of the active pixel array 82 is shown, with the pixels 96 shown in greater detail. In the depicted example, the pixel 96 is approximately 1mm by 1 mm. Proceeding to the right in the figure, a single pixel 96 of about 1mm on each side is shown. In this example, and as discussed in more detail below, in one embodiment, each pixel 96 includes an array of subpixels 98.

In a typical CT detector, the scintillator is pixelated and the interpixel gaps are filled with an optically reflective material to improve light output. The image sensor array is designed to match the scintillator pixelation geometry such that perfect overlap of scintillator pixels and photosensors is achieved. In a typical CT detector, the interpixel gap is about 100 μm.

In view of this, in the present embodiment, each pixel 96 includes an array of sub-pixels 98, such as a 10 × 10 array of sub-pixels 98 having a pitch of 100 μm. This structure is different from that conventionally found in CT detectors. At the far right of fig. 3, a circuit schematic of a sub-pixel 98 according to one such embodiment is shown. In this example, the photosensitive element is a photodiode 102, which generates a photocurrent proportional to the energy of the X-ray photon absorbed in the scintillator pixel above it. Each sub-pixel has a built-in amplifier 104 that improves the signal-to-noise ratio. Unlike conventional image sensor pixels, there is more than one charge storage element (e.g., capacitors 106A and 106B) in one implementation. The additional storage and associated integrated readout electronics enable readout of the pixels 96 during X-ray image data acquisition. This in turn enables global shutter operation and ultrafast frame rates (e.g., >10kHz) that facilitate certain CT acquisition modes (e.g., ultrafast kV switching in dual energy imaging). Embodiments of the charge storage element 106 are also relevant for CT applications that benefit from a high linear signal response. The combination of a pinned photodiode 102 (which carries negligible capacitance) and a linear metal-insulator-metal (MIM) capacitor is a suitable design choice. In particular, the use of pinned photodiodes as photodiodes 102 provides benefits in terms of linearity of the pixel response and improved radiation hardness of the pixels 96.

With the benefits of fast signal readout, a readout architecture suitable for use with the present active pixel array 82 is described, taking into account the above and turning to fig. 4. Conventional detector designs attempt to provide fast readout by employing massively parallel readout architectures (e.g., a dedicated channel for each photodiode). In contrast, the presently described method employs several analog-to-digital conversion (ADC) readout channels per pixel column of the active pixel array 82. For example, referring to the example of fig. 4, in this example, sixteen ADCs 110, each having an approximate width of about 60 μm, are located within a column width of 1mm (denoted as column 114). Each ADC 110 is designed to service a block 112 of eight pixels 96. The described configuration achieves a viewing rate of 12.5kHz with a line time of 10 mus. Signals from sub-pixels within a pixel can be integrated within the pixel for readout at the pixel level, thereby avoiding the need to individually address the sub-pixels. In other configurations, more ADCs may be provided for each pixel to achieve a higher viewing rate. Thus, each column 114 of pixels 96 is divided into blocks 112 (here, blocks of eight pixels 96), where each block is read out by its own ADC 110. Thus, in this example, each ADC 119 serves about eight pixels 96 (i.e., pixel blocks 112) with each pixel having 16 data lines and the ADC layout being 60 μm x 3mm, relative to the wiring. In terms of the readout speed of this example, the line time is about 10 μ s, and the read time is the number of pixels per block (e.g., eight) multiplied by the line time (e.g., about 10 μ s), and thus is 80 μ s in this example. In this example, the view per second is 12,500 Hz.

Several benefits are realized with respect to the present design methodology. For example, as described above, the dual energy imaging method may switch the X-ray source between two kVps during the scan (e.g., between low and high energies). During CT acquisition, the fast kV switching benefits from the same integration (i.e., time) window for all pixels 96. From the point of view of the design of the image sensor, this amounts to a true global shutter operation (i.e. compared to a continuous sequential readout). An example of one embodiment of a global shutter pixel in the context of the present detector panel architecture is shown in fig. 5.

In this example, it can be seen that capacitor 106A is used to store charge generated during low energy exposure. While the low energy exposure charge is stored in capacitor 106A, capacitor 106B, which may store charge accumulated during a previous high energy exposure, is read out and reset. Conversely, during a subsequent high energy exposure, the capacitor 106B is used to store charge generated during the high energy exposure, and the capacitor 106A storing charge accumulated during a previous low energy exposure is read out and reset. Thus, the present architecture enables the imager to acquire a new view/image during readout of the previous view.

Furthermore, another benefit of the presently contemplated detector architecture is the improvement of the electronic noise entitlement theory (i.e., the theoretical limit in noise performance). Various design options may be employed to reduce noise. Examples of techniques that may be employed include, but are not limited to, active reset, in-pixel correlated double sampling, and the like.

one example of a low noise design is as follows: for a front-illuminated diode, the charge per view is about 50pC, the subpixel design is as described above (e.g., one pixel 96-10 × 10 μm subpixel 98), and the maximum well-to-capacitance (FWC) of each pixel is 3 Me-. In view of this design, the readout method may be to connect the subpixels 98 in parallel during exposure, disconnect the subpixels 98 after exposure, and then read out from the center pixel, effectively integrating the subpixel signals within the respective pixels to allow readout at the pixel level and avoid the need to individually address the subpixels. In this case, the readout noise may consist of kTC (basically thermal noise on the capacitor 106) and analog read noise. kTC may be about 2,190e- (C ═ 30pF) and the analog read noise may be about 3,000 × 0.22 ═ 660e-, yielding a total read noise of 2,290 e-. This estimate is comparable to the noise level of prior art CT detectors.

Another benefit of this approach is scalability, as described above. Turning to fig. 6, three examples are depicted, which illustrate the scalability of the present approach. Typical CT product assemblies have different levels of CT systems with different spatial coverage (e.g., isocentric coverage from 40mm to 160mm), performance, and cost. An important factor for a cost effective detector 28 is that the design is scalable in such product combinations. This translates into a platform technology that can take advantage of volume and cost.

With the proposed 3-sided dockable active matrix architecture, a system with wide/varying coverage can be built, as shown in fig. 6. For example, in the uppermost example, two detector panels 80 of 80mm length are shown abutting at their ends opposite the readout connectors to provide 160mm coverage at the isocenter 120. Similarly, for detectors with less coverage at the isocenter 120, as shown in the middle example, two 40mm long detector panels 80 may abut to provide 80mm coverage at the isocenter 120. Where less coverage is required, a single detector panel 80 (such as a detector panel 80 of length 40 mm) may be centered at the isocenter 120 to provide 40mm coverage.

The integration of a CT scintillator pack on a fast, low electronic noise and scalable active pixel sensor yields the best CT and flat panel X-ray technologies to build a high performance detector. This is in contrast to cone-beam CT methods that employ standard X-ray flat panel detectors, where the low detection efficiency of the X-ray scintillator and the slow readout speed of the flat panel lead to poor detector performance.

Technical effects of the invention include matrix readout of a pixel array in which pixel blocks are multiplexed to a readout channel. In one implementation, a large 3-sided buttable CMOS active pixel array with built-in column ADCs integrated onto the same wafer is used. In other aspects, multiple ADC readout channels are provided for each pixel column to facilitate multiplexed readout of the detector panel. In one embodiment, each image sensor pixel includes an array of subpixels.

This written description uses examples to disclose the invention, including the best mode, and also to enable any person skilled in the art to practice the invention, including making and using any devices or systems and performing any incorporated methods. The patentable scope of the invention is defined by the claims, and may include other examples that occur to those skilled in the art. Such other examples are intended to be within the scope of the claims if they have structural elements that do not differ from the literal language of the claims, or if they include equivalent structural elements with insubstantial differences from the literal languages of the claims.