阅读说明：本技术 一种N型TOPCon电池及其制备方法 (N-type TOPCon battery and preparation method thereof ) 是由 郑波 于 2021-08-10 设计创作，主要内容包括：本申请实施例提供一种N型TOPCon电池及其制备方法,涉及光伏太阳能电池领域。N型TOPCon电池包括硅衬底,硅衬底的正面由里往外设置有硼扩散层、正面氧化铝层、正面氮化硅层,硅衬底的背面由里往外设置有隧穿氧化层、掺杂多晶硅层、背面氧化硅层、背面氮化硅层和背面氧化铝层。制备方法是在硅衬底的正面形成硼扩散层,在背面依次形成隧穿氧化层、掺杂多晶硅层；采用臭氧氧化法和等离子体化学气相沉积法相结合的方法在掺杂多晶硅层上依次制备背面氧化硅层、背面氮化硅层；同时在硼扩散层和背面氮化硅层上沉积氧化铝,分别形成正面氧化铝层和背面氧化铝层；形成正面氮化硅层。该制备方法工艺简单,钝化效果好,电池效率高。(The embodiment of the application provides an N-type TOPCon cell and a preparation method thereof, and relates to the field of photovoltaic solar cells. The N-type TOPCon battery comprises a silicon substrate, wherein a boron diffusion layer, a front-side aluminum oxide layer and a front-side silicon nitride layer are arranged on the front side of the silicon substrate from inside to outside, and a tunneling oxide layer, a doped polycrystalline silicon layer, a back-side silicon oxide layer, a back-side silicon nitride layer and a back-side aluminum oxide layer are arranged on the back side of the silicon substrate from inside to outside. The preparation method comprises the steps of forming a boron diffusion layer on the front surface of a silicon substrate, and sequentially forming a tunneling oxide layer and a doped polycrystalline silicon layer on the back surface; preparing a back silicon oxide layer and a back silicon nitride layer on the doped polycrystalline silicon layer in sequence by adopting a method combining an ozone oxidation method and a plasma chemical vapor deposition method; simultaneously depositing aluminum oxide on the boron diffusion layer and the back silicon nitride layer to respectively form a front aluminum oxide layer and a back aluminum oxide layer; and forming a front silicon nitride layer. The preparation method has the advantages of simple process, good passivation effect and high battery efficiency.)

1. The N-type TOPCon battery is characterized by comprising a silicon substrate, wherein a boron diffusion layer, a front-side aluminum oxide layer and a front-side silicon nitride layer are arranged on the front side of the silicon substrate from inside to outside, and a tunneling oxide layer, a doped polycrystalline silicon layer, a back-side silicon oxide layer, a back-side silicon nitride layer and a back-side aluminum oxide layer are arranged on the back side of the silicon substrate from inside to outside.

2. The N-type TOPCon cell of claim 1, wherein the back side silicon oxide layer has a thickness of 1-3 nm;

and/or the thickness of the back silicon nitride layer is 70-100 nm;

and/or the thickness of the back alumina layer is 3-7 nm.

3. The N-type TOPCon cell of claim 1, wherein the front side aluminum oxide layer has a thickness of 3-7 nm;

and/or the thickness of the front silicon nitride layer is 70-100 nm.

4. The N-type TOPCon cell of claim 1 wherein the boron diffusion layer has a depth of 700-1400 nm;

and/or the thickness of the tunneling oxide layer is 0.5-3 nm;

and/or the thickness of the doped polycrystalline silicon layer is 40-150 nm.

5. A method for preparing a TOPCon cell of the type N defined in any of claims 1 to 4, comprising the following steps:

forming a boron diffusion layer on the front side of the silicon substrate, and sequentially forming a tunneling oxide layer and a doped polycrystalline silicon layer on the back side of the silicon substrate;

preparing a back silicon oxide layer and a back silicon nitride layer on the doped polycrystalline silicon layer in sequence by adopting a method combining an ozone oxidation method and a plasma chemical vapor deposition method;

simultaneously depositing aluminum oxide on the boron diffusion layer and the back silicon nitride layer to respectively form a front aluminum oxide layer and a back aluminum oxide layer;

a front side silicon nitride layer is formed on the front side aluminum oxide layer.

6. The method of claim 5, wherein an ozone generator is installed on the equipment for performing the plasma CVD process, and the back silicon oxide layer is first formed by the ozone oxidation process and then the back silicon nitride layer is formed by the plasma CVD process.

7. The method for preparing the N-type TOPCon battery as claimed in claim 5 or 6, wherein the process conditions of the ozone oxidation method are as follows: the temperature is 100 ℃ and 400 ℃, the pressure is 3-800mbar, and the time is 3-20 min.

8. The method for preparing N-type TOPCon cell as claimed in claim 5 or 6, wherein the plasma chemical vapor deposition process conditions are: the temperature is 450 ℃ and 500 ℃, the pressure is 3-800mbar, and the time is 3-20 min.

9. The method for preparing an N-type TOPCon cell according to claim 5, wherein the depositing of the alumina is by a single atomic layer deposition process under the following process conditions: the temperature is 200 ℃ and 250 ℃, and the process comprises the following steps: TMA, 4-8 s-purge 7-10s-H₂And O, 4-8 s-purging for 7-10s, wherein the cycle number is 22-51.

10. The method for preparing N-type TOPCon cell as claimed in claim 5, wherein the front silicon nitride layer is prepared by plasma CVD under the following process conditions: the temperature is 450-500 ℃, and the pressure is 200-300 Pa.

Technical Field

The application relates to the field of photovoltaic solar cells, in particular to an N-type TOPCon cell and a preparation method thereof.

Background

The passivation Contact solar cell is a currently popular technology in the photovoltaic industry, and the main result is an N-type TOPCon cell adopting a TOPCon (Tunnel Oxide Passivated Contact) technology, wherein the TOPCon technology is to generate an ultrathin tunnelable Oxide layer and a highly doped polysilicon layer on the surface of the cell. In particular, in recent years, various large photovoltaic companies and equipment manufacturers have been invested in the technology, so that the N-type TOPCon battery has been rapidly developed, and the mass production is on the day. In order to realize the industrialization of the N-type TOPCon battery, the continuous improvement of the battery efficiency becomes a research target of various large enterprises, and the optimization of the passivation effect of the battery becomes an important part for improving the battery efficiency.

At present, due to the limitation of a preparation process of a passivation film, some N-type TOPCon batteries are easy to prepare double-sided passivation films, so that aluminum oxide layers are directly prepared on the front side and the back side of the battery to serve as the passivation films, the aluminum oxide layer on the back side is in contact with silicon, a large amount of negative fixed charges can be generated at an interface, and the field passivation of the back side is influenced. In addition, since thermal oxidation is required for preparing the silicon oxide film, experimental data show that the high temperature during thermal oxidation damages the N-type TOPCon cell and causes the cell efficiency to be low, and therefore, many TOPCon cells can be prepared by eliminating the silicon oxide film as a passivation film or by adopting other complicated processes.

Therefore, a scheme for designing and preparing a passivation film of the N-type TOPCon battery, which has the advantages of simple and convenient process, easy realization and good passivation effect, is needed.

Disclosure of Invention

The embodiment of the application aims to provide an N-type TOPCon battery and a preparation method thereof, and the N-type TOPCon battery is simple in process, good in passivation effect and high in battery efficiency.

In a first aspect, an embodiment of the present application provides an N-type TOPCon cell, which includes a silicon substrate, a boron diffusion layer, a front-side aluminum oxide layer, and a front-side silicon nitride layer disposed from inside to outside on a front surface of the silicon substrate, and a tunneling oxide layer, a doped polysilicon layer, a back-side silicon oxide layer, a back-side silicon nitride layer, and a back-side aluminum oxide layer disposed from inside to outside on a back surface of the silicon substrate.

In the above technical scheme, the front side aluminum oxide layer and the front side silicon nitride layer constitute a front side passivation film, and the tunneling oxide layer, the back side silicon nitride layer and the back side aluminum oxide layer constitute a back side passivation film. Wherein, the front alumina layer and the front silicon nitride layer are combined together to achieve better front passivation effect, especially the contact of the alumina and the silicon substrate can reduce the dangling unsaturated bonds on the surface of the silicon substrate and reduce the dangling unsaturated bondsRecombination of few electron hole pairs; the tunneling oxide layer, the back silicon nitride layer and the back aluminum oxide layer are combined together, so that a better back passivation effect can be achieved, and particularly, the silicon oxide layer and the silicon nitride layer are combined to isolate poly silicon and aluminum oxide in the tunneling oxide layer, so that Si-Al is prevented from being formed₂O₃The reverse effect of the back alumina layer on passivation is eliminated at the interface, so that the formed N-type TOPCon battery has good passivation effect and high battery efficiency.

In one possible implementation, the thickness of the back side silicon oxide layer is 1-3 nm;

and/or the thickness of the back silicon nitride layer is 70-100 nm;

and/or the thickness of the back alumina layer is 3-7 nm.

In one possible implementation, the thickness of the front side alumina layer is 3-7 nm;

and/or the thickness of the front silicon nitride layer is 70-100 nm.

In one possible implementation, the depth of the boron diffusion layer is 700-;

and/or the thickness of the tunneling oxide layer is 0.5-3 nm.

And/or the thickness of the doped polysilicon layer is 40-150 nm.

In a second aspect, an embodiment of the present application provides a method for preparing an N-type TOPCon battery provided in the first aspect, which includes the following steps:

forming a boron diffusion layer on the front side of the silicon substrate, and sequentially forming a tunneling oxide layer and a doped polycrystalline silicon layer on the back side of the silicon substrate;

preparing a back silicon oxide layer and a back silicon nitride layer on the doped polycrystalline silicon layer in sequence by adopting a method combining an ozone oxidation method and a plasma chemical vapor deposition method;

simultaneously depositing aluminum oxide on the boron diffusion layer and the back silicon nitride layer to respectively form a front aluminum oxide layer and a back aluminum oxide layer;

a front side silicon nitride layer is formed on the front side aluminum oxide layer.

In the technical scheme, the method combining the ozone oxidation method and the plasma chemical vapor deposition method is adopted to sequentially prepare the back silicon oxide layer and the back silicon nitride layer on the tunneling oxide layer, and the ozone oxidation is added in the production process of the back silicon nitride layer to grow the single-sided silicon oxide layer on the back, so that the process is simple and can be used for mass production of the N-type TOPCon battery; and the prepared N-type TOPCon battery has good passivation effect and high battery efficiency.

In a possible implementation mode, an ozone generator is additionally arranged on equipment for realizing the plasma chemical vapor deposition method, firstly, the back silicon oxide layer is prepared by adopting an ozone oxidation method, and then, the back silicon nitride layer is prepared by adopting a plasma chemical vapor deposition method.

In the technical scheme, the back silicon oxide and the back silicon nitride are prepared by only adding the ozone generator on the chemical vapor deposition equipment, namely adding the ozone generator on the back film machine table to realize a two-in-one mode of ozone oxidation and chemical vapor deposition, so that the method is compatible with the existing TOPCon battery production line, saves the cost, has small influence on the productivity and is easy to popularize on a large scale.

In one possible implementation, the process conditions of the ozone oxidation process are: the temperature is 100 ℃ and 400 ℃, the pressure is 3-800mbar, and the time is 3-20 min.

In the technical scheme, the silicon oxide is prepared in a relatively low-temperature environment, the N-type TOPCon battery cannot be damaged, and the formed back silicon oxide layer can play a good passivation effect; the quality of the prepared silicon oxide film is equivalent to that of a silicon oxide film prepared by conventional oxygen saturated thermal oxidation, and the silicon oxide film has good uniformity.

In one possible implementation, the process conditions of the plasma chemical vapor deposition method are as follows: the temperature is 450 ℃ and 500 ℃, the pressure is 3-800mbar, and the time is 3-20 min.

In one possible implementation manner, the manner of depositing the aluminum oxide is to use a monoatomic layer deposition method, and the process conditions of the monoatomic layer deposition method are as follows: the temperature is 200 ℃ and 250 ℃, and the process comprises the following steps: TMA, 4-8 s-purge 7-10s-H₂And O, 4-8 s-purging for 7-10s, wherein the cycle number is 22-51.

In the technical scheme, the process conditions are simple, and the compact aluminum oxide layer can be rapidly deposited on the front side and the back side of the battery.

In one possible implementation manner, the front-side silicon nitride layer is prepared by a plasma chemical vapor deposition method under the following process conditions: the temperature is 450-500 ℃, and the pressure is 200-300 Pa.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a schematic structural diagram of a prior art N-type TOPCon battery;

fig. 2 is a schematic structural diagram of an N-type TOPCon battery according to an embodiment of the present disclosure.

Icon: 01-a silicon substrate; 02-boron diffusion layer; 03-front side alumina layer; 04-front side silicon nitride layer; 05-tunneling an oxide layer; 06-doping the polysilicon layer; 07-a back side alumina layer; 08-back side silicon nitride layer; 110-silicon substrate, 120-boron diffusion layer; 130-front side alumina layer; 140-front side silicon nitride layer; 150-tunneling oxide layer; 160-doped polysilicon layer; 170-back side silicon oxide layer; 180-back side silicon nitride layer; 190-back side alumina layer.

Detailed Description

In the process of implementing the application, the applicant finds that: TOPCon is a tunneling oxide layer passivation contact solar cell technology based on a selective carrier principle, and the TOPCon cell structure is an N-type silicon substrate, and generally, a layer of ultrathin silicon oxide is prepared on the back surface of a cell, and then a doped silicon thin layer is deposited, so that a passivation contact structure is formed by the TOPCon cell structure and the doped silicon thin layer, and surface recombination and metal contact recombination are effectively reduced.

At present, the tunneling oxide layer, silicon oxide, silicon nitride and aluminum oxide are used as good passivation films in the battery. For topocon cells, the back side is typically passivated with double-sided aluminum oxide, front side silicon nitride, and back side silicon nitride after tunnel oxidation and polysilicon doping are performed. The structure of the N-type TOPCon cell is shown in fig. 1, and comprises an N-type silicon substrate 01, wherein a boron diffusion layer 02(p + emitter), a front aluminum oxide layer 03 and a front silicon nitride layer 04 are sequentially arranged on the front surface of the silicon substrate 01, and a tunneling oxide layer 05, a doped polysilicon layer 06(N + poly silicon), a back aluminum oxide layer 07 and a back silicon nitride layer 08 are sequentially arranged on the back surface of the silicon substrate 01.

For this N-type TOPCon cell, the front alumina layer 03 has a very good passivation effect, while the back alumina layer 07 affects the field passivation of the cell due to the large amount of fixed negative charges present at the silicon interface of the alumina and doped polysilicon layer 06. If only one side of the front side alumina layer 03 is desired to be prepared, the current technology is very complicated, and the silicon wafers are usually prepared back to back by using an ALD (atomic layer deposition) method, and a severe wraparound plating is formed on the back side, which affects the appearance, yield and efficiency of the battery.

In addition, applicants have also found that although silicon oxide passivates dangling bonds at the silicon interface and has the property of a fixed positive charge, it carries better chemical and field passivation for the back side of an N-type cell. However, the conventional silicon oxide layer is prepared by oxygen saturation and thermal oxidation, but experiments show that high temperature can damage the N-type TOPCon cell when thermal oxidation is carried out, so that the cell efficiency is low, and therefore, many photovoltaic companies remove the silicon oxide layer when preparing the TOPCon cell.

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the embodiments of the present application will be clearly and completely described below. The examples, in which specific conditions are not specified, were conducted under conventional conditions or conditions recommended by the manufacturer. The reagents or instruments used are not indicated by the manufacturer, and are all conventional products available commercially.

The following is a detailed description of the N-type TOPCon battery and the method of manufacturing the same according to the examples of the present application.

Referring to fig. 2, an embodiment of the present invention provides an N-type TOPCon cell, which includes a silicon substrate 110, a boron diffusion layer 120, a front aluminum oxide layer 130, and a front silicon nitride layer 140 disposed on a front surface of the silicon substrate 110 from inside to outside, and a tunneling oxide layer 150, a doped polysilicon layer 160, a back silicon oxide layer 170, a back silicon nitride layer 180, and a back aluminum oxide layer 190 disposed on a back surface of the silicon substrate 110 from inside to outside.

Wherein the silicon substrate 110 is an n-type silicon substrate 110; the depth of the boron diffusion layer 120(P + emitter) is 700-1400nm, illustratively 700mm, 800nm, 900nm, 1000nm, 1100nm, 1200nm, 1300nm, or 1400 nm; the front side alumina layer 130 has a thickness of 3-7nm, illustratively 3nm, 4nm, 5nm, 6nm, or 7 nm; the front side silicon nitride layer 140 has a thickness of 70-100nm, illustratively 70nm, 80nm, 90nm, or 100 nm.

The tunneling oxide layer 150 has a thickness of 0.5-3nm, illustratively 0.5nm, 1nm, 1.5nm, 2nm, 2.5nm, or 3 nm; the doped polysilicon layer 160(n + poly silicon) has a thickness of 40-150nm, illustratively 40nm, 50nm, 70nm, 90nm, 100nm, 110nm, 130nm, or 150 nm; the thickness of the back silicon oxide layer 170 is 1-3nm, illustratively 1nm, 1.5nm, 2nm, 2.5nm, or 3 nm; the back side silicon nitride layer 180 has a thickness of 70-100nm, illustratively 70nm, 80nm, 90nm, or 100 nm; the back aluminum oxide layer 190 has a thickness of 3-7nm, illustratively 3nm, 4nm, 5nm, 6nm, or 7 nm.

The embodiment of the present application further provides a method for preparing the above N-type TOPCon battery, which includes the following steps:

(1) the pre-treatment of the silicon substrate 110 is carried out according to the conventional preparation route of TOPCon battery in the pre-sequence step: texturing, boron diffusion, etching, tunneling oxidation, in-situ doping of amorphous silicon, annealing, and de-winding plating, namely preparing the silicon substrate 110, texturing the silicon substrate 110, forming the boron diffusion layer 120 on the front side by boron diffusion, etching and tunneling oxidation to form the tunneling oxidation layer 150 on the back side of the silicon substrate 110, and in-situ doping of amorphous silicon, annealing, and de-winding plating to form the doped polysilicon layer 160. The specific process is as follows:

texturing: placing the N-type silicon wafer into a texturing groove, wherein the volume concentration of KOH in the groove is 1-20%, the temperature is 40-80 ℃, and 2-20L of additive is added, then washing with water, pickling (the volume concentration of HF is 1-30%), washing with water, slowly pulling, drying, and drying at the temperature of 80-105 ℃.

B, expanding boron: placing the textured silicon wafer in a boron expansion tube, wherein the ventilation temperature is 700-.

Etching: etching the boron-expanded silicon wafer in a chain type acid etching machine, and etching HNO in a groove₃The volume concentration is 1-20%, and the volume concentration of HF is 1-20%.

Tunneling oxidation: thermal oxidation is adopted, the oxidation temperature is 500-700 ℃, and the tunneling oxide layer 150 on the back surface is obtained.

In-situ doping of amorphous silicon: by means of pH₃And SiH₄The mixed gas is prepared by PECVD with the process temperature of 200 ℃ and 600 ℃.

Annealing: the silicon wafer after the amorphous silicon is processed for 1-120min at the temperature of 700-1000 ℃.

Unwinding degree: growing silicon oxide on the back surface of the annealed silicon wafer, washing the silicon oxide in the front surface roughness area by using HF (volume concentration is 1-40%), and then putting the silicon wafer into an alkali polishing groove (KOH volume concentration is 1-20%, the temperature is 40-90 ℃, and alkali polishing additives are 2-20L) to carry out alkali polishing to remove the front surface polysilicon roughness, so as to obtain a doped polysilicon layer 160 on the tunneling oxide layer 150 on the back surface.

(2) After the step (1) is completed, a back silicon oxide layer 170 and a back silicon nitride layer 180 are sequentially formed on the doped polysilicon layer 160 by a method of combining an ozone oxidation method and a Plasma Enhanced Chemical Vapor Deposition (PECVD).

The method for realizing the combination of the ozone oxidation method and the plasma chemical vapor deposition method is usually to additionally arrange an ozone generator on equipment for realizing the plasma chemical vapor deposition method, for example, the ozone generator is additionally arranged beside tubular PECVD equipment, oxygen is introduced, then high-voltage discharge is carried out to prepare ozone, and the tubular PECVD equipment can realize single-sided coating; by using the equipment, the back silicon oxide layer 170 is prepared by adopting an ozone oxidation method, and then the back silicon nitride layer 180 is prepared by adopting a plasma chemical vapor deposition method.

Firstly, the ozone oxidation method is realized by utilizing chemical vapor deposition equipment additionally provided with an ozone generator, and the process conditions of the ozone oxidation method are as follows: the temperature is 100 ℃ and 400 ℃, the pressure is 3-800mbar, and the time is 3-20 min.

Then the chemical vapor deposition equipment is utilized to realize the plasma chemical vapor deposition method, generally other process conditions of the ozone oxidation method are continued, only the temperature is increased, and the gas type is changed from O₃Changing into silane and ammonia, and the process conditions of the plasma chemical vapor deposition method are as follows: the temperature is 450 ℃ and 500 ℃, the pressure is 3-800mbar, and the time is 3-20 min.

(3) After the step (2) is completed, aluminum oxide is deposited on the boron diffusion layer 120 and the back silicon nitride layer 180 at the same time to form a front aluminum oxide layer 130 and a back aluminum oxide layer 190, respectively, and the thicknesses of the front aluminum oxide layer 130 and the back aluminum oxide layer 190 are approximately equal because the front aluminum oxide layer 130 and the back aluminum oxide layer 190 are deposited at the same time.

In the embodiment of the present application, a method for depositing aluminum oxide is an Atomic Layer Deposition (ALD) method, and process conditions of the ALD method are as follows: the temperature is 200 ℃ and 250 ℃, and the process comprises the following steps: TMA, 4-8 s-purge 7-10s-H₂And O, 4-8 s-purging for 7-10s, wherein the treatment mode of each period is that TMA is firstly introduced for 4-8s, purging is carried out for 7-10s, then steam is introduced for 4-8s, purging is carried out for 7-10s, and the cycle number is 22-51. Wherein TMA is Al (CH)₃)₃TMA and water together produce an aluminum oxide film.

(4) After the double-sided deposition of aluminum oxide in step (3) is completed, a front-side silicon nitride layer 140 is formed on the front-side aluminum oxide layer 130.

In the embodiment of the present application, the front surface silicon nitride layer 140 is prepared by a plasma chemical vapor deposition method, and the process conditions are as follows: the temperature is 450-500 ℃, and the pressure is 200-300 Pa.

(5) The subsequent steps are printing, sintering and testing according to a TOPCon conventional route.

The features and properties of the present application are described in further detail below with reference to examples.

Example 1

This example provides a N-type TOPCon cell, which is prepared according to the following preparation method:

(1) texturing: the n-type silicon substrate 110 is placed in a texturing tank, the volume concentration of KOH in the tank is 5%, the temperature is 60 ℃, and the additive is 10L, and then the n-type silicon substrate is washed by water, pickled (the volume concentration of HF is 10%), washed by water, slowly pulled, dried, and dried at the drying temperature of 90 ℃.

B, expanding boron: and placing the textured silicon wafer in a boron extension tube, and forming a boron diffusion layer 120 with the thickness of 800nm on the front surface at the source introduction temperature of 800 ℃ for 600s, the junction push temperature of 1000 ℃ for 2000 s.

Etching: etching the back of the boron-expanded silicon wafer in a chain type acid etching machine, and etching HNO in a groove₃The volume concentration is 10%, and the HF volume concentration is 10%.

Tunneling oxidation: and forming a tunneling oxide layer 150 with the thickness of 2nm on the back surface by thermal oxidation at the oxidation temperature of 600 ℃.

In-situ doping of amorphous silicon: by means of pH₃And SiH₄The mixed gas is prepared by a PECVD mode, the thickness of the amorphous silicon is 100nm, and the process temperature is 350 ℃.

Annealing: the silicon wafer with the amorphous silicon is subjected to constant temperature of 850 ℃ for 60 min.

Unwinding plating: growing silicon oxide on the back surface of the annealed silicon wafer, washing the silicon oxide in the front surface waviness area by using HF (volume concentration is 20%), and then putting the silicon wafer into an alkali polishing groove (KOH volume concentration is 5%, temperature is 60 ℃, and alkali polishing additive is 10L) to carry out alkali polishing to remove the front surface amorphous silicon waviness.

(2) After the step (1) is completed, adding an ozone generator beside the tubular PECVD equipment, and firstly preparing the back silicon oxide layer 170 by using the tubular PECVD equipment with the ozone generator, wherein the process conditions of the ozone oxidation method are as follows: the temperature was 300 deg.C, the pressure 500mbar, and the time 10min, resulting in a back side silicon oxide layer 170.

And then, preparing the back silicon nitride layer 180 by using a tubular PECVD (plasma enhanced chemical vapor deposition) device through a plasma chemical vapor deposition method, namely heating to 450 ℃ for 15min to obtain the back silicon nitride layer 180 with the thickness of 80 nm.

(3) After the step (2) is completed, depositing aluminum oxide on the boron diffusion layer 120 and the back silicon nitride layer 180 simultaneously by using ALD to form a front aluminum oxide layer 130 and a back aluminum oxide layer 190 respectively, wherein the process conditions are as follows: the temperature is 200 ℃, and the process comprises the following steps: TMA, 6 s-purge 9s-H₂And O, 6 s-purging for 9s, wherein the cycle number is 37 times, and a front aluminum oxide layer 130 with the thickness of 5nm and a back aluminum oxide layer 190 with the thickness of 5nm are obtained.

(4) After the double-sided deposition of aluminum oxide in the step (3) is completed, a front-side silicon nitride layer 140 is formed on the front-side aluminum oxide layer 130 by adopting a PECVD technology, and the process conditions are as follows: the temperature was 470 ℃ and the pressure was 250Pa, resulting in a front side silicon nitride layer 140 with a thickness of 90 nm.

(5) The subsequent steps are printing, sintering and testing according to a TOPCon conventional route.

Example 2

This example provides a N-type TOPCon cell, which is prepared according to the following preparation method:

1) texturing: the n-type silicon substrate 110 is placed in a texturing tank, the volume concentration of KOH in the tank is 5%, the temperature is 60 ℃, and the additive is 10L, and then the n-type silicon substrate is washed by water, pickled (the volume concentration of HF is 10%), washed by water, slowly pulled, dried, and dried at the drying temperature of 90 ℃.

B, expanding boron: and placing the textured silicon wafer in a boron extension tube, and forming a boron diffusion layer 120 with the thickness of 800nm on the front surface at the source introduction temperature of 800 ℃ for 600s, the junction push temperature of 1000 ℃ for 2000 s.

Etching: etching the back of the boron-expanded silicon wafer in a chain type acid etching machine, and etching HNO in a groove₃The volume concentration is 10%, and the HF volume concentration is 10%.

Tunneling oxidation: and forming a tunneling oxide layer 150 with the thickness of 2nm on the back surface by thermal oxidation at the oxidation temperature of 600 ℃.

In-situ doping of amorphous silicon: by means of pH₃And SiH₄The mixed gas is prepared by a PECVD mode, the thickness of the amorphous silicon is 100nm, and the process temperature is 350 ℃.

Annealing: the silicon wafer with the amorphous silicon is subjected to constant temperature of 850 ℃ for 60 min.

Unwinding plating: growing silicon oxide on the back surface of the annealed silicon wafer, washing the silicon oxide in the front surface waviness area by using HF (volume concentration is 20%), and then putting the silicon wafer into an alkali polishing groove (KOH volume concentration is 5%, temperature is 60 ℃, and alkali polishing additive is 10L) to carry out alkali polishing to remove the front surface amorphous silicon waviness.

(2) After the step (1) is completed, adding an ozone generator beside the tubular PECVD equipment, and firstly preparing the back silicon oxide layer 170 by using the tubular PECVD equipment with the ozone generator, wherein the process conditions of the ozone oxidation method are as follows: the temperature was 320 deg.C, the pressure was 500mbar, and the time was 15min, resulting in a back side silicon oxide layer 170.

And then, preparing the back silicon nitride layer 180 by using a tubular PECVD (plasma enhanced chemical vapor deposition) device through a plasma chemical vapor deposition method, namely heating to 450 ℃ for 15min to obtain the back silicon nitride layer 180 with the thickness of 80 nm.

(3) After the step (2) is completed, depositing aluminum oxide on the boron diffusion layer 120 and the back silicon nitride layer 180 simultaneously by using ALD to form a front aluminum oxide layer 130 and a back aluminum oxide layer 190 respectively, wherein the process conditions are as follows: the temperature is 200 ℃, and the process comprises the following steps: TMA, 6 s-purge 9s-H₂And O, 6 s-purging for 9s, wherein the cycle number is 37 times, and a front aluminum oxide layer 130 with the thickness of 5nm and a back aluminum oxide layer 190 with the thickness of 5nm are obtained.

(4) After the double-sided deposition of aluminum oxide in the step (3) is completed, a front-side silicon nitride layer 140 is formed on the front-side aluminum oxide layer 130 by adopting a PECVD technology, and the process conditions are as follows: the temperature was 470 ℃ and the pressure was 250Pa, resulting in a front side silicon nitride layer 140 with a thickness of 90 nm.

(5) The subsequent steps are printing, sintering and testing according to a TOPCon conventional route.

Comparative example 1

Referring to fig. 1, the present comparative example provides an N-type TOPCon battery, which is prepared as follows:

(1) the same as step (1) of example 1, and will not be described again.

(2) After the step (1) is completed, depositing aluminum oxide on the boron diffusion layer 02 and the doped polysilicon layer 06 simultaneously by using ALD to form a front aluminum oxide layer 03 and a back aluminum oxide layer 07 respectively, wherein the process conditions are as follows: the temperature is 200 ℃ and 250 ℃, and the process comprises the following steps: TMA, 6 s-purge 9s-H₂And O, 6 s-purging for 9s, wherein the cycle number is 37, and a front alumina layer 03 with the thickness of 5nm and a back alumina layer 07 with the thickness of 5nm are obtained.

(3) After the aluminum oxide is deposited on the two sides in the step (2), a front silicon nitride layer 04 and a back silicon nitride layer 08 are simultaneously formed on the front aluminum oxide layer 03 and the back aluminum oxide layer 07 by adopting a PECVD technology, and the process conditions are as follows: the temperature was 450 ℃ and the pressure was 200Pa, resulting in a front silicon nitride layer 04 having a thickness of 90nm and a back silicon nitride layer 08 having a thickness of 80 nm.

(4) The subsequent steps are printing, sintering and testing according to a TOPCon conventional route.

TABLE 1 test data for various examples and comparative examples

As can be seen from table 1, compared with the conventional N-type TOPCon battery of comparative example 1, the passivation film scheme adopted by the N-type TOPCon battery of the embodiment of the present application greatly improves the battery passivation, and both the open-circuit voltage and the short-circuit current are improved more, so that the improvement effect is obvious.

In summary, the N-type TOPCon battery and the preparation method thereof in the embodiments of the present application have the advantages of simple process, good passivation effect and high battery efficiency.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.